KR102554230B1 - Light emitting device - Google Patents

Abstract

The light emitting element includes a substrate, a plurality of protruding patterns protruding from the substrate, a first semiconductor layer provided on the substrate, an active layer provided on the semiconductor layer, and a second semiconductor layer provided on the active layer, each protruding pattern includes a first layer formed integrally with the substrate and protruding from the upper surface of the base substrate, and a second layer provided on the first layer and made of a material different from that of the first layer, If the distance between the centers of two adjacent protruding patterns is called a pitch, the ratio of the diameter of the protruding patterns to the pitch is 0.8 to 1.0.

Description

Light emitting device {LIGHT EMITTING DEVICE}

The present invention relates to a light emitting device.

As one of the self-emitting light sources, a light emitting diode (LED) has recently been widely used. Light emitting diodes use the properties of compound semiconductors to convert electrical signals into light forms such as infrared, visible, and ultraviolet light. As the light efficiency of the light emitting device increases, the light emitting device is applied to various fields including display devices and lighting devices.

An object of the present invention is to provide a light emitting device having high light extraction efficiency and reliability and a manufacturing method thereof.

A light emitting device according to an embodiment of the present invention includes a substrate, a plurality of protruding patterns protruding from the substrate, a first semiconductor layer provided on the substrate, an active layer provided on the semiconductor layer, and a second semiconductor provided on the active layer. Each protruding pattern is formed integrally with the substrate and protrudes from the upper surface of the base substrate, and is provided on the first layer and is made of a material different from that of the first layer. Including the second layer, if a distance between the centers of two protruding patterns adjacent to each other is referred to as a pitch, the ratio of the diameter of the protruding pattern to the pitch is 0.8 to 1.0.

According to one embodiment of the present invention, the diameter of each protruding pattern may be 2.5 micrometers to 3.5 micrometers, and the pitch may be 2.5 micrometers or more and less than 3.5 micrometers.

According to one embodiment of the present invention, the diameter of each protruding pattern may be 2.6 micrometers to 2.8 micrometers, and the pitch may be 2.9 micrometers to 3.1 micrometers.

According to one embodiment of the present invention, the diameter of each protruding pattern may be 2.8 micrometers.

According to one embodiment of the present invention, the height ratio of the first layer and the second layer may be 0.2 to 1.5, and the height ratio of the first layer and the second layer may be 0.75 to 1.5. Alternatively, the height of the second layer may be higher than that of the first layer.

According to one embodiment of the present invention, the diameter of the protrusion pattern may be equal to or smaller than the pitch.

According to one embodiment of the present invention, the protrusion pattern may have an inverted cone shape.

According to one embodiment of the present invention, the side slope of the first layer and the side slope of the second layer may be different from each other.

According to one embodiment of the present invention, the first semiconductor layer may be provided with a cavity provided in a portion of a region corresponding to a side of the protruding pattern.

According to an embodiment of the present invention, the first layer includes any one of SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, and Ga ₂ O ₃ , and the second layer includes SiO _x , SiO _x N _y and SiN _x may be included.

According to one embodiment of the present invention, the protruding patterns may be regularly or irregularly arranged.

One embodiment of the present invention provides a light emitting device with high light extraction efficiency and high reliability and a manufacturing method thereof.

1 is a schematic cross-sectional view showing a light emitting device according to an embodiment of the present invention.
FIG. 2 is a plan view of a substrate provided with a protruding pattern among components of the light emitting device of FIG. 1 viewed from a plane, and FIG. 3 is a cross-sectional view taken along line II′ of FIG. 2 .
FIG. 4A is a diagram illustrating a growth direction of a substrate on which a protruding pattern is formed and a first semiconductor layer in a light emitting device according to an embodiment of the present invention, and FIG. 4B is a view illustrating FIG. This is a picture showing the actual growth.
FIG. 5A is an enlarged view of a rectangle formed by dotted lines in FIG. 4A, and FIG. 5B is a photograph of a portion of FIG. 5A.
6 is a cross-sectional view of a semiconductor chip according to an embodiment of the present invention, showing a lateral type semiconductor chip.
7 is a cross-sectional view of a semiconductor chip according to an exemplary embodiment of the present invention, illustrating a flip chip type semiconductor chip.
8 is a graph showing light output efficiency according to the pitch of protruding patterns in Table 1;
9 is a graph illustrating light output efficiency according to the pitch of protruding patterns in Table 2;
10 is a graph showing light emission efficiency according to diameter in Tables 3 to 6;

Since the present invention may have various changes and various forms, specific embodiments are illustrated in the drawings and described in detail in the text. However, it should be understood that this is not intended to limit the present invention to the specific disclosed form, and includes all modifications, equivalents, and substitutes included in the spirit and scope of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the accompanying drawings.

1 is a schematic cross-sectional view showing a light emitting device according to an embodiment of the present invention.

Referring to FIG. 1 , a light emitting device according to an embodiment of the present invention includes a substrate 10 and a light emitting laminate provided on the substrate 10 .

The light emitting stack includes a first semiconductor layer 20 , an active layer 30 , and a second semiconductor layer 40 sequentially provided on a substrate 10 .

The substrate 10 may be a light-transmitting or non-light-transmitting substrate, and may be a conductive or insulating substrate. The substrate 10 may be a growth substrate for growing a semiconductor single crystal, for example, a nitride single crystal.

A sapphire substrate may be used as the substrate 10 . However, the material of the substrate 10 is not limited thereto, and may be made of various materials such as SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, Ga ₂ O ₃ and the like. In particular, sapphire may have crystals having hexagon-Rhombo R3c symmetry. In the case of sapphire, the lattice constants in the c-axis and a-axis directions are 13.001 Å and 4.758 Å, and it has a C (0001) plane, an A (1120) plane, and an R (1102) plane, and the C plane is relatively grown as a nitride thin film. Since it is easy and stable at high temperatures, it can be used as a substrate for growth of nitride semiconductors.

In one embodiment of the present invention, the substrate 10 is patterned, and a plurality of protruding patterns 11 are provided on its upper surface. In other words, the protrusion pattern 11 is provided in a form protruding upward from the top surface of the substrate 10 . In one embodiment of the present invention, the protruding pattern 11 may be provided in an inverted conical shape, the width of which decreases toward the top, so that the protruding pattern 11 is perpendicular to the substrate 10. When cut, the cross section of the protruding pattern 11 may be triangular.

The protruding pattern 11 includes a first layer 13 and a second layer 15 sequentially stacked from the upper surface of the substrate 10 . A first layer 13 is provided on the substrate 10 and a second layer 15 is provided on the first layer 13 .

The first layer 13 is integrally formed without being separated from the substrate 10 . Thus, the first layer 13 is made of the same material as the substrate 10 .

The second layer 15 is made of a material different from that of the first layer 13 . The material of the second layer 15 may be a material having a different refractive index from that of the first layer 13, and in one embodiment of the present invention, the refractive index of the first layer 13 is the refractive index of the second layer 15 can be bigger In this case, as the material of the second layer 15 , various insulating materials having a refractive index smaller than that of the first layer 13 , for example, an insulating material having a refractive index of about 1.0 to about 1.7 may be used. As a material having such a refractive index, the second layer 15 includes, for example, SiO _x , SiO _x N _y , and SiN _x . In one embodiment of the present invention, the first layer 13 may be made of sapphire, and the second layer 15 may be made of SiO ₂ . In this case, the refractive index of the first layer 13 is 1.76, and the second layer 13 is 1.76. The refractive index of the layer 15 is about 1.46, which may be smaller than the refractive index of the substrate 10 .

A plurality of compound semiconductor layers may be provided on the substrate 10 provided with the protrusion pattern 11 . The plurality of compound semiconductor layers can be formed by various methods, such as electron beam deposition, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD), and dual-type thermal evaporation. Thermal evaporation, sputtering, metal organic chemical vapor deposition (MOCVD), and the like may be used. However, the method of forming a plurality of compound layers is not limited thereto.

The first semiconductor layer 20 may be provided on the substrate 10 . The first semiconductor layer 20 is a semiconductor layer doped with a first conductivity type dopant. The first conductivity-type dopant may be an n-type dopant. The first conductivity type dopant may be Si, Ge, Se, Te or C.

In one embodiment of the present invention, the first semiconductor layer 20 may include a nitride-based semiconductor material. For example, the first semiconductor layer 20 is made of a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) can In one embodiment of the present invention, semiconductor materials having the above composition formula include GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and the like. The first semiconductor layer 20 may be formed by growing the semiconductor material to include an n-type dopant such as Si, Ge, Sn, Se, or Te.

In one embodiment of the present invention, the first semiconductor layer 20 may further have a structure formed by alternately stacking two types of layers having different band gaps. A structure formed by alternately stacking two types of layers having different band gaps may have a superlattice structure, and thus, current spreading of the first semiconductor layer 20 may be improved and stress may be relieved.

The two types of layers having different band gaps are alternately formed but may include different thin film crystal layers. In this case, when two layers having different band gaps are alternately stacked, a crystal lattice having a periodic structure longer than the basic unit lattice may be formed. The two layers having different band gaps are a layer having a wide band gap and a layer having a narrow band gap. In one embodiment of the present invention, the layer having a wide band gap may be Al _a Ga _b In _(1-ab) N (0≤a<1, 0<b≤1), for example, a GaN layer can A layer with a narrow band gap may be Al _a Ga _b In _(1-ab) N (0≤a<1, 0<b≤1), for example, Ga _b In _(1-b) N _{(0 <b} ≤ ₁₎ .

In one embodiment of the present invention, at least one of the wide band gap layer and the narrow band gap layer may include an n-type impurity.

The active layer 30 is provided on the first semiconductor layer 20 and corresponds to a light emitting layer.

In the active layer 30, electrons (or holes) injected through the first conductivity-type semiconductor layer and holes (or electrons) injected through the second semiconductor layer 40 meet each other, and It is a layer that emits light by the difference in the band gap of the energy band. The active layer 30 may emit light with a peak wavelength of at least one of ultraviolet, blue, green, and red.

The active layer 30 may be implemented as a compound semiconductor. The active layer 30 may be implemented with at least one of group 3-5 or group 2-6 compound semiconductors, for example. A quantum well structure may be employed in the active layer 30 and may have a multi-quantum well structure in which quantum well layers and barrier layers are alternately stacked. However, the structure of the active layer 30 is not limited thereto, and may be a quantum wire structure or a quantum dot structure.

In one embodiment of the present invention, the quantum well layer is disposed of a material having a composition formula of In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) It can be. The barrier layer may be formed of a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), and a composition ratio different from that of the well layer. can be provided as Here, the barrier layer may have a band gap wider than that of the well layer.

The well layer and the barrier layer may be made of, for example, AlGaAs/GaAs, InGaAs/GaAs, InGaN/GaN, GaN/AlGaN, AlGaN/AlGaN, InGaN/AlGaN, InGaN/InGaN, InGaP/GaP, AlInGaP/InGaP, or InP/GaAs. It may consist of at least one of the pair. In one embodiment of the present invention, the well layer of the active layer 30 may be implemented with InGaN, and the barrier layer may be implemented with AlGaN-based semiconductor. In one embodiment of the present invention, the indium composition of the well layer may have a higher composition than the indium composition of the barrier layer, and the barrier layer may have no indium composition. Also, aluminum may not be included in the well layer and aluminum may be included in the barrier layer. However, the composition of the well layer and the barrier layer is not limited thereto.

According to one embodiment of the present invention, the barrier layer may have a thickness greater than that of the well layer. However, if the thickness of the well layer is too thin, the confinement efficiency of the carrier is lowered, and if the thickness is too thick, the carrier may be excessively confined. When the thickness of the barrier layer is too thin, electron blocking efficiency is lowered, and when the barrier layer is too thick, electrons may be excessively blocked.

Accordingly, by appropriately adjusting the thickness of the barrier layer and the well layer, each carrier can be effectively confined to the well layer according to the wavelength of light and the structure of the quantum well.

In one embodiment of the present invention, the thickness of each well layer is not particularly limited, and each thickness may be the same or different. When the thickness of each well layer is the same, since the quantum level is the same, the emission wavelength of each well layer can be the same. In this case, an emission spectrum with a narrow half-width can be obtained. When the thickness of each well layer is different, the emission wavelength of each well layer may be different, and thus the width of the emission spectrum may be widened.

In one embodiment of the present invention, at least one of the plurality of barrier layers may include a dopant, for example, at least one of an n-type and a p-type dopant. The barrier layer may be an n-type semiconductor layer when an n-type dopant is added. When the barrier layer is an n-type semiconductor layer, the injection efficiency of electrons injected into the active layer 30 may be increased.

In one embodiment of the present invention, the barrier layer may have various thicknesses, but the uppermost barrier layer may have the same thickness as or a greater thickness than the other barrier layers.

When the active layer 30 has a multi-quantum well structure, the composition of the quantum well layer and the barrier layer may be set according to the emission wavelength required for the light emitting device. In one embodiment of the present invention, the composition of a plurality of well layers may or may not be the same. For example, an impurity may be included in a well layer of a lower side, but an impurity may not be included in a well layer of an upper side.

The second semiconductor layer 40 is provided on the active layer 30 .

The second semiconductor layer 40 is a semiconductor layer having a second conductivity type dopant having a polarity opposite to that of the first conductivity type dopant. The second conductivity type dopant may be a p-type dopant, and the second conductivity type dopant may include, for example, Mg, Zn, Ca, Sr, or Ba.

In one embodiment of the present invention, the second semiconductor layer 40 may include a nitride-based semiconductor material. The second semiconductor layer 40 may be formed of a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). In one embodiment of the present invention, semiconductor materials having the above composition formula include GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and the like. The second semiconductor layer 40 may be formed by growing the semiconductor material to include a p-type dopant such as Mg, Zn, Ca, Sr, or Ba.

Although not shown, in addition to the substrate 10, the first semiconductor layer 20, the active layer 30, and the second semiconductor layer 40, a functional layer such as a buffer layer and/or an electron blocking layer may be further provided. .

For example, a buffer layer may be provided on the substrate 10 and the first semiconductor layer 20 . The buffer layer may be formed as a single layer or a multi-layer. In one embodiment of the present invention, the buffer layer may be made of In _x AlyGa _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), for example GaN, It may include at least one of materials such as AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and ZnO.

The buffer layer may be formed in a super lattice structure by alternately disposing different semiconductor layers. The buffer layer may be disposed to alleviate a difference in lattice constant between the substrate 10 and the nitride-based semiconductor layer, and may be defined as a defect control layer. The lattice constant of the buffer layer may have a value between the lattice constant between the substrate 10 and the nitride-based semiconductor layer. The buffer layer may not be formed, but is not limited thereto.

In addition, an electron blocking layer may be additionally disposed between the second semiconductor layer 40 and the active layer 30 . The electron blocking layer may reduce crystallinity degradation due to dopants in the second semiconductor layer 40 and prevent diffusion of dopants into the active layer 30 in the second semiconductor layer 40 . In addition, the electron blocking layer can block electrons from the active layer 30 from proceeding to the second semiconductor layer 40, thereby preventing the current from spreading between the electron blocking layer and the second semiconductor layer 40. can do. In one embodiment of the present invention, the electron blocking layer is a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) can be formed As an example, the electron blocking layer may be formed of at least one of GaN, AlGaN, InGaN, InAlGaN, and AlInN.

In one embodiment of the present invention, the electron blocking layer of the embodiment may have a thickness of about 3 nm or more and less than about 30 nm. If the thickness of the electron blocking layer is smaller than the above range, functions such as improving crystallinity or preventing diffusion of dopants from the second semiconductor layer 40 may not be sufficiently performed. Resistance may be increased during movement of carriers, and thus hole injection efficiency may be reduced. However, the thickness of the electron blocking layer is not limited thereto, and may be provided with a different thickness depending on circumstances.

The electron blocking layer may have a band gap wider than that of the barrier layer in the active layer 30 . The band gap of the electron blocking layer may vary depending on the composition of the material constituting the electron blocking layer. For example, when the electron blocking layer is made of AlGaN, the band gap can be set differently by changing the composition ratio of aluminum, and the wider the band gap, the better the electron blocking effect.

In one embodiment of the present invention, the electron blocking layer may be disposed in a single layer or multiple layers, and may include a second conductivity type dopant, for example, a p type conductivity type dopant. Accordingly, the electron blocking layer may be, for example, a p-type semiconductor layer having a p-type dopant such as Mg, Zn, Ca, Sr, or Ba, and the electron blocking layer may include a p-type dopant such as GaN, AlGaN, or InGaN. It may be at least one of them. In one embodiment of the present invention, the electron blocking layer may be formed of a superlattice structure in which at least two different layers are alternately arranged.

In this embodiment, the buffer layer and the electron blocking layer are disclosed as an example, and at least one of the buffer layer and the electron blocking layer may be omitted. In addition, it goes without saying that additional functional layers other than the buffer layer and the electron blocking layer may be further added to the light emitting device.

As described above, in the light emitting device according to an embodiment of the present invention, a plurality of protruding patterns 11 are provided on the substrate 10, and the protruding patterns 11 will be described in detail.

FIG. 2 is a plan view of a substrate 10 provided with a protruding pattern 11 among components of the light emitting device of FIG. 1 viewed from a plane, and FIG. 3 is a cross-sectional view taken along the line II' of FIG. 2 .

Referring to FIGS. 2 and 3 , a protruding pattern 11 is provided on the upper surface of the substrate 10 , and the protruding pattern 11 includes a first layer 13 and a second layer 15 .

Each protruding pattern 11 may have a circular shape when viewed on a plane. When the protruding pattern 11 is provided in a conical shape, the vertex portion of the cone becomes the center.

The protrusion pattern 11 may be provided in a size having a predetermined diameter DM and height HT. The diameter DM means the width of the lowest end of the protruding pattern 11 when viewed in cross section, and the height HT means the distance from the upper surface of the substrate 10 to the vertex of the protruding pattern 11 . In this embodiment, each protruding pattern 11 may have the same diameter DM and height HT. However, each protruding pattern 11 may not have exactly the same diameter DM and height HT, and may have a difference in diameter DM and height HT within a predetermined range.

When viewed from a plan view, the first layer 13 and the second layer 15 may have different diameters, but may be provided in the shape of concentric circles having the same center. When the protruding pattern 11 is provided in a conical shape, the diameter of the first layer 13 is greater than that of the second layer 15 . Here, the diameter of the first and second layers 13 and 15 means the width of the lowermost end of the first and second layers 13 and 15 when viewed in cross section.

In one embodiment of the present invention, the protrusion pattern 11 may be arranged on the upper surface of the substrate 10 in various forms. For example, the protruding patterns 11 may be disposed at each vertex of a quadrangle in a quadrangular lattice pattern, or may be disposed at each vertex of a hexagon in a hexagonal lattice pattern. In one embodiment of the present invention, it is shown as an example that the protrusion pattern 11 is disposed at each vertex of a square in a square grid pattern.

Each protruding pattern 11 may be arranged with a predetermined pitch PT and spacing DT from each other. The pitch PT is the distance between the centers of two protruding patterns 11 adjacent to each other when viewed from a plane, and the spacing DT is the distance between the edges of the two protruding patterns 11 adjacent to each other when viewed from a plane.

In one embodiment of the present invention, the diameter DM of the protrusion pattern 11 may be equal to or smaller than the pitch PT. When the diameter DM of the protruding patterns 11 is greater than the pitch PT, the protruding patterns 11 overlap on a plane, and the area of the upper surface of the substrate 10 at the portion where the protruding patterns 11 are not provided is decrease too much The upper surface of the substrate 10 not covered by the protruding pattern 11 is where the growth of the first semiconductor layer 20 takes place. Therefore, when the diameter DM of the protrusion pattern 11 is larger than the pitch PT, the growth of the first semiconductor layer 20 (see FIG. 1) does not sufficiently occur, which is disadvantageous in manufacturing a light emitting device.

According to an embodiment of the present invention, the pitch (PT) and spacing may have different values depending on the arrangement direction. Although the pitch PT and/or the spacing DT are shown to be the same in this embodiment, this is for convenience of explanation, and the pitch PT and spacing do not have to be all the same, and the pitch PT and / or the interval DT may have some difference within a predetermined range.

In one embodiment of the present invention, the pitch (PT) of the protruding pattern 11 has a value within a predetermined range according to the diameter (DM), the diameter (DM) of the protruding pattern 11 and the pitch (PT) The ratio of may be in the range of about 0.8 to about 1.0. For example, when the diameter DM of the protrusion pattern 11 is 2.5 micrometers to 3.5 micrometers, the pitch PT may be 2.5 micrometers or more and less than 3.5 micrometers. Alternatively, when the diameter DM of the protrusion pattern 11 is 2.6 micrometers to 2.8 micrometers, the pitch PT may be 2.9 micrometers to 3.1 micrometers.

In one embodiment of the present invention, in the protruding pattern 11, the first layer 13 and the second layer 15 may be formed with various height ratios. Here, the height H1 of the first layer 13 is formed to have a predetermined value or more. If the height H1 of the first layer 13 is 0, the growth of the first semiconductor layer 20 from the substrate 10 may be hindered by impurities remaining on the upper surface of the substrate 10 during the process. . In one embodiment of the present invention, the ratio of the height H1 of the first layer 13 and the height H2 of the second layer 15 may be 0.2 to 1.5. In another embodiment of the present invention, the ratio of the height H1 of the first layer 13 and the height H2 of the second layer 15 may be 0.75 to 1.5, or the first layer 13 A ratio of the height H1 to the height H2 of the second layer 15 may exceed 1. In one embodiment of the present invention, the ratio of the height H1 of the first layer 13 and the height H2 of the second layer 15 is 0.75, the first layer 13 is 0.9 μm, the second layer ( 15) may be 1.2 μm, and the diameter (DM) of the protrusion pattern 11 at this time may be about 2.7 to 2.9 μm, for example, 2.8 μm.

In one embodiment of the present invention, when the height H2 of the second layer 15 is formed to a greater value than the height H1 of the first layer 13, the lateral direction of the first layer 13 The quality of the crystal can be improved by reducing the growth of the crystal into the .

In one embodiment of the present invention, at least a part of the side slope of the first layer 13 and the second layer 15 may be the same or different from each other. Although the drawing shows that the slopes of the first layer 13 and the second layer 15 have the same value, it is not limited thereto, and the side slopes of the first layer 13 and the second layer 15 are At least some of them may be the same or different. In particular, inclination at a portion where the first layer 13 and the second layer 15 come into contact may be different from each other. Since the materials of the first layer 13 and the second layer 15 are different from each other, the side slope may be set differently according to process conditions during the etching process. In one embodiment of the present invention, by forming different gradients between the first layer 13 and the second layer 15, the scattering degree of light emitted from the light emitting device can be increased, thereby improving the light emission efficiency.

In one embodiment of the present invention, the arrangement of the protruding patterns 11 may be regular as shown, but is not limited thereto. For example, the protruding patterns 11 may be arranged irregularly. Even in this case, the pitch PT and spacing of the protruding patterns 11 per single area are within a predetermined range when viewed from the entire substrate 10, and in this case, the density may be provided at substantially the same level.

In one embodiment of the present invention, only the conical shape of the protruding pattern 11 is shown for convenience of description, but the protruding pattern 11 can be transformed into various shapes without departing from the concept of the present invention. there is. For example, the protrusion pattern 11 may have a polygonal pyramid shape. In addition, even though it is provided in a conical shape, the shape of the curved surface forming the side surface may be partially deformed.

A light emitting device having the above structure will be described with reference to FIGS. 1 to 3 .

First, the substrate 10 is prepared, and an insulating layer is laminated on the substrate 10 using a material for forming the second layer 15 . As described above, the substrate 10 may be made of, for example, SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, Ga ₂ O ₃ and the like, and the insulating layer may be SiO _x , SiO _x It may be made of a material such as N _y , SiN _x .

Next, after applying photoresist on the insulating layer and forming a photoresist pattern through exposure and development, the insulating layer and a part of the substrate 10 are etched using the photoresist pattern as a mask. Accordingly, the second layer 15 is formed by etching the insulating layer except for the portion where the protrusion pattern 11 is to be formed. An upper surface of the substrate 10 is exposed in a portion where the second layer 15 is not formed. Here, the first layer is formed by further etching the upper surface of the substrate 10 than the original upper surface of the substrate 10 through additional etching. If only the second layer 15 is formed and etched so that the original upper surface of the substrate 10 is exposed, theoretically, it can be determined that the growth of the semiconductor layer will easily occur later as the upper surface of the substrate 10 is exposed. In practice, the subsequent growth of the first semiconductor layer 20 does not occur properly due to etching residues or impurities present on the upper surface of the substrate 10 . Therefore, additional etching is performed to completely remove etching residues or impurities from the substrate 10 . Thus, the first layer 13 is formed.

Etching to form the first layer 13 and the second layer 15 may be performed using various methods and under various conditions according to materials. For example, the insulating layer and a portion of the substrate 10 may be patterned using dry etching.

In the above method, the second layer 15 and the first layer 13 are sequentially formed, and may be patterned using the same or different etching gases.

A first semiconductor layer 20 is formed on the substrate 10 on which the protrusion pattern 11 is formed. The first semiconductor layer 20 is first grown upwards from the exposed surface of the substrate 10, and then grown upwards and sideways.

FIG. 4A shows the growth direction of the substrate 10 on which the protruding pattern 11 is formed and the first semiconductor layer 20 in the light emitting device according to an embodiment of the present invention, and FIG. 4B shows the protruding pattern of FIG. 4A. (11) This is a photograph showing a state in which the first semiconductor layer 20 is actually grown on the substrate 10 formed thereon. FIG. 5A is an enlarged view of a rectangle formed by dotted lines in FIG. 4A, and FIG. 5B is a photograph of a portion of FIG. 5A. In FIGS. 4A and 5A , main growth directions of the semiconductor layer are indicated by arrows for convenience of description.

Referring to FIGS. 4A, 4B, 5A, and 5B, first, a first semiconductor layer 20 is formed in an upward direction.

The first semiconductor layer 20 may be formed of a semiconductor layer of various materials, for example, an n-type nitride-based semiconductor layer, and may be formed using metalorganic vapor phase epitaxy or molecular beam epitaxy (MBE). beam epitaxy) or hydride vapor phase epitaxy (HVPE).

The initial growth of the first semiconductor layer 20 mainly occurs in an upward direction from the exposed surface of the substrate 10 , and growth does not occur on the upper surface of the second layer 15 .

After partially growing in the upward direction, the first semiconductor layer 20 is grown in the upper and side directions. In the drawing, for convenience of explanation, the first growth pattern 21 mainly grown in the upper direction and the second growth pattern 23 which grow in the upper and side directions, but the growth in the side direction is dominant, are shown.

In one embodiment of the present invention, epitaxial lateral over-growth (ELOG) is performed by a metal-organic chemical vapor deposition (MOCVD) method for growth of the first semiconductor layer 20 in a lateral direction (horizontal direction in the drawing). can be used The first semiconductor layer 20 is merged to cover the entire surface of the substrate 10 including the surface of the second layer 15 by continuously growing in the lateral and upper directions. Accordingly, the first semiconductor layer 20 has a plate shape covering the entire surface of the substrate 10 .

In one embodiment of the present invention, when forming the protruding pattern 11, the ratio of the diameter DM and the pitch of the protruding pattern 11 is formed to be within a range of about 0.8 to about 1.0, which is the first semiconductor layer. (20) to reduce defects during growth.

In one embodiment of the present invention, the upper surface of the substrate 10 of the exposed substrate 10 between the protruding patterns 11 is a portion that becomes a substantial growth nucleus, and from the upper surface of the substrate 10, the first growth pattern ( 21), growth occurs in the upward direction. After that, the first semiconductor layer 20 is grown along the horizontal direction by the ELOG method like the second growth pattern 23 . When the first semiconductor layer 20 is grown, if the upper surface is called the top surface and the side surface is called the side surface, when the first semiconductor layer 20 is epitaxially grown by ELOG, the growth of the side surface is performed by ELOG conditions It occurs much more dominantly than the growth of the upper surface, and the growth ratio of the m-axis and c-axis is about 2:1. During growth, the side surface of the first semiconductor layer 20 may be perpendicular to the top surface of the first semiconductor layer 20, but is not limited thereto, and may be a facet surface inclined to the top surface of the first semiconductor layer 20. may be In one embodiment of the present invention, the top surface of the first semiconductor layer 20 may correspond to the (0001) surface, and the side surface of the first semiconductor layer 20 may correspond to the (10-11) surface.

In one embodiment of the present invention, since the pitch between the protruding patterns 11 is provided within the above-described range, the growth of the first semiconductor layer 20 is facilitated and light extraction efficiency in the final light emitting device is increased.

If the pitch is smaller than the above-mentioned range, the growth of crystals is slow because the distance between adjacent protruding patterns 11 is not sufficient. In addition, even if growth occurs, growth in the lateral direction occurs in a state where the area to be grown is small, so that a cavity VD is formed on the side. Here, the cavity VD is eventually formed corresponding to the growth direction of the crystal plane, and is formed on the side corresponding to each vertex of the hexagon based on the center of the protruding pattern 11 . In the case where the cavity VD is formed large, crystals are formed in the overall growth direction and even on the side surface of the protruding pattern 11 of the first layer 13 corresponding to the portion where the cavity VD is formed (the portion indicated by the dotted ellipse in the drawing). As it grows differently, it appears as a defect. The defect eventually causes a decrease in light extraction efficiency of the light emitting device. If the pitch is larger than the above-mentioned range, the spacing between adjacent protruding patterns 11 is wide enough to allow rapid growth of crystals, so that the size of the cavity is small and the occurrence of defects on the side of the protruding patterns is reduced. , The light scattering effect by the protruding patterns 11 is reduced due to the distance between the protruding patterns 11, and thus the light extraction efficiency is reduced.

After forming the entire first semiconductor layer 20 through lateral growth, selectively, the first semiconductor layer 20 may be further grown upward by using HVPE. When the first semiconductor layer 20 is formed using MOCVD, since the film formation speed is slower than that of HVPE, HVPE can be used when the first semiconductor layer 20 is to be quickly grown to a sufficient thickness.

Again, referring to FIGS. 1 to 3 , in one embodiment of the present invention, a buffer layer may be further formed on the substrate 10 before forming the first semiconductor layer 20 . In one embodiment of the present invention, a superlattice structure may be formed by alternately stacking two types of layers having different band gaps on the first semiconductor layer 20 . An active layer 30 is formed on the first semiconductor layer 20 . In one embodiment of the present invention, a quantum well structure may be formed by alternately stacking quantum well layers and barrier layers as the active layer 30 . An electron blocking layer is formed on the active layer 30 , and then a second semiconductor layer 40 is formed on the active layer 30 , thereby manufacturing a light emitting stack.

The light emitting device having the above structure has improved light extraction efficiency and reduced defects, so reliability is high.

The light emitting device having the above structure may be implemented in various types of semiconductor chips.

6 is a cross-sectional view of a semiconductor chip according to an embodiment of the present invention, showing a lateral type semiconductor chip.

Referring to FIG. 6 , the semiconductor chip includes a light emitting element and first and second electrodes 110 and 120 connected to the light emitting element. The light emitting element includes a substrate 10 and a first semiconductor layer 20 provided on the substrate 10, an active layer 30, a second semiconductor layer 40, a first electrode 110, a second electrode 120, It includes an insulating film 130 .

In this embodiment, the first electrode 110 is disposed on the first semiconductor layer 20 on which the active layer 30 and the second semiconductor layer 40 are not provided, and the second semiconductor layer 40 on the second semiconductor layer 40. An electrode 120 is disposed.

The first and/or second electrodes 110 and 120 may be made of a single layer or multi-layer metal. Materials for the first and/or second electrodes 110 and 120 include Al, Ti, Cr, Ni, Au, Ag, Cr, Cu, Ti, Ru, Rh, Ir, Mg, Zn, Al, In, and Ta. , Pd, various metals such as Co and their alloys may be included.

Here, a plurality of protruding patterns 11 are provided on the upper surface of the substrate 10 to increase the light emission efficiency (HT). As described in the foregoing embodiment, the projecting pattern may be provided on the substrate 10 in a conical shape including the first layer 13 and the second layer 15 .

An insulating layer 130 is provided on the first and second electrodes 110 and 120 , and contact holes exposing the first electrode 110 and the second electrode 120 are provided on the insulating layer 130 . The insulating film 130 may be disposed on a top surface of the second semiconductor layer 40 and on side surfaces of the semiconductor layers, and may selectively contact the first and second electrodes 110 and 120 . The insulating layer 130 may include an insulating material or an insulating resin formed of at least one of oxide, nitride, fluoride, and sulfide having at least one of Al, Cr, Si, Ti, Zn, and Zr. The insulating layer 130 may be selectively formed from among, for example, SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , and TiO ₂ . The insulating film 130 may be formed as a single layer or multiple layers, but is not limited thereto.

In one embodiment of the present invention, the first electrode 110 and the second electrode 120 may be connected to other components through contact holes exposing them. For example, first and second pads connected through contact holes may be provided to the first and second electrodes 110 and 120 . In addition, in one embodiment of the present invention, although the light emitting element has been briefly described with drawings, the light emitting element may further include components having additional functions in addition to the above-described layers. For example, various layers may be further included, such as a reflective layer that reflects light, an additional insulating layer for insulating a specific component, a solder prevention layer that prevents solder from spreading, and the like.

In addition, in forming the lateral type light emitting device, the mesa may be formed in various forms, and the positions or shapes of the first and second electrodes 110 and 120 may also be variously changed.

The light emitting device according to an embodiment of the present invention emits light when a signal is applied to the first electrode 110 and the second electrode 120 of the light emitting element to turn them on, and the emitted light is emitted from the first semiconductor layer 20 It may proceed in a lower direction of the second semiconductor layer 40 or may proceed in an upper direction of the second semiconductor layer 40 .

Although the above-described semiconductor chip employing the light emitting device according to an embodiment of the present invention is of a lateral type, it is not limited thereto. For example, it goes without saying that the light emitting device according to an embodiment of the present invention can be applied to a vertical type or flip chip type semiconductor chip.

7 is a cross-sectional view of a semiconductor chip according to an exemplary embodiment of the present invention, illustrating a flip chip type semiconductor chip. A flip-chip type semiconductor may be mounted on another component by being inverted after being formed on the substrate 10, and is shown in an inverted form in the drawings.

Referring to FIG. 7 , a semiconductor chip includes a light emitting element and first and second electrodes 110 and 120 connected to the light emitting element. The light emitting element includes a substrate 10, a first semiconductor layer 20, an active layer 30, a second semiconductor layer 40, a first electrode 110, and a second electrode 120 stacked on the substrate 10. , and an insulating film 130 .

In this embodiment, the light emitting device may include at least one mesa including the active layer 30 and the second semiconductor layer 40 . The mesa may include a plurality of protruding patterns 11, and the plurality of protruding patterns 11 may be spaced apart from each other. An insulating layer 130 is provided on the mesa, and the insulating layer 130 has a contact hole through which a portion of the first semiconductor layer 20 and the second semiconductor layer 40 are exposed. The first electrode 110 is connected to the exposed first semiconductor layer 20 through the contact hole between the mesas, and the second electrode 120 is exposed through the contact hole formed on the second semiconductor layer 40. It is connected to the second semiconductor layer 40 .

As described above, the light emitting device according to an embodiment of the present invention can be manufactured in various forms and employed in other devices, and the use or number thereof is not limited.

Although the above has been described with reference to preferred embodiments of the present invention, those skilled in the art or those having ordinary knowledge in the art do not deviate from the spirit and technical scope of the present invention described in the claims to be described later. It will be understood that the present invention can be variously modified and changed within the scope not specified.

Therefore, the technical scope of the present invention is not limited to the contents described in the detailed description of the specification, but should be defined by the claims.

Experimental Example 1: Light emission efficiency according to pitch when diameter and height are constant

Table 1 is data showing light emission efficiency according to a change in pitch when the diameter and height of a protruding pattern on a substrate are the same in a light emitting device. 8 is a graph showing light output efficiency according to the pitch of protruding patterns in Table 1;

In all the following examples, the light intensity change rate represents the light intensity change rate of the light emitting device according to the existing invention in which the protruding pattern is made of only the first layer without the second layer, and the protruding pattern of the existing invention has a pitch of 3 μm , the total height was 1.7 μm, and the diameter was 2.7 μm.

Pitch (μm) Height (μm) First layer height (μm) Second layer height (μm) Diameter (μm) Amount of light in the upper direction (arbitrary unit) Side direction light amount (arbitrary unit) Total output light amount (arbitrary unit) Light intensity change rate (%) 2.7 2.1 0.4 1.7 2.7 7.53X10 ^-09 3.11X10 ^-09 1.064X10 ^-08 -4.45 3 2.1 0.4 1.7 2.7 8.08X10 ^-09 3.38X10 ^-09 1.1462X10 ^-08 2.94 3.5 2.1 0.4 1.7 2.7 7.42X10 ^-09 3.04X10 ^-09 1.046X10 ^-08 -6.1 4 2.1 0.4 1.7 2.7 6.71X10 ^-09 2.88X10 ^-09 9.59X10 ^-09 -13.9 4.5 2.1 0.4 1.7 2.7 6.78X10 ^-09 2.86X10 ^-09 9.64X10 ^-09 -13.4 5 2.1 0.4 1.7 2.7 6.03X10 ^-09 2.66X10 ^-09 8.69X10 ^-09 -22

Table 2 is data showing light emission efficiency according to a change in pitch when the diameter and height of the protruding pattern on the substrate are the same in the light emitting device. 9 is a graph showing light output efficiency according to the pitch of protruding patterns in Table 2;

Pitch (μm) Height (μm) First layer height (μm) Second layer height (μm) Diameter (μm) Amount of light in the upper direction (arbitrary unit) Side direction light amount (arbitrary unit) Total output light amount (arbitrary unit) Light intensity change rate (%) 2.7 2.1 0.9 1.2 2.7 7.69X10 ^-09 3.52X10 ^-09 1.1209X10 ^-08 0.7 3 2.1 0.9 1.2 2.7 8.49X10 ^-09 3.38X10 ^-09 1.1872X10 ^-08 6.6 3.5 2.1 0.9 1.2 2.7 7.39X10 ^-09 3.29X10 ^-09 1.068X10 ^-08 -4.1 4 2.1 0.9 1.2 2.7 6.65X10 ^-09 3.29X10 ^-09 9.94X10 ^-09 -10.7 4.5 2.1 0.9 1.2 2.7 6.53X10 ^-09 3.11X10 ^-09 9.64X10 ^-09 -13.4 5 2.1 0.9 1.2 2.7 6.19X10 ^-09 2.88X10 ^-09 9.07X10 ^-09 -18.5

As described above, when the height and diameter are the same, there is a difference in the amount of light according to the pitch, and the light amount increase rate is the largest when the ratio of the diameter of the protruding pattern to the pitch is in the range of about 0.8 to about 1.0. In particular, as can be seen in Tables 1 and 2, the light quantity increase rate showed the greatest value at 3 μm, although there was some difference depending on the height of the first layer and the height of the second layer.

Experimental Example 2: Light emission efficiency according to diameter when pitch and height are constant

Tables 3 to 6 are data showing light emission efficiency according to a change in diameter when the pitch and height of the protrusion pattern on the substrate are the same in the light emitting device. 10 is a graph showing light output efficiency according to diameter in Tables 3 to 6; In FIG. 10, the graphs indicated as Examples 1 to 4 show the data of Tables 3 to 6, respectively.

Pitch (μm) Height (μm) First layer height (μm) Second layer height (μm) Diameter (μm) Amount of light in the upper direction (arbitrary unit) Side direction light amount (arbitrary unit) Total output light amount (arbitrary unit) Light intensity change rate (%) 3 2.1 0.4 1.7 2.6 7.80X10 ^-09 3.34X10 ^-09 1.11X10 ^-08 0.02 3 2.1 0.4 1.7 2.7 8.08X10 ^-09 3.38X10 ^-09 1.1462X10 ^-08 2.94 3 2.1 0.4 1.7 2.8 8.08X10 ^-09 3.38X10 ^-09 1.15X10 ^-08 2.94 3 2.1 0.4 1.7 3 7.94X10 ^-09 3.34X10 ^-09 1.13X10 ^-08 1.27

Pitch (μm) Height (μm) First layer height (μm) Second layer height (μm) Diameter (μm) Amount of light in the upper direction (arbitrary unit) Side direction light amount (arbitrary unit) Total output light amount (arbitrary unit) Light intensity change rate (%) 3 2.1 0.6 1.5 2.8 8.21X10 ^-09 3.47X10 ^-09 1.17X10 ^-08 4.92 3 2.1 0.6 1.5 3 8.11X10 ^-09 3.43X10 ^-09 1.15X10 ^-08 3.62

Pitch (μm) Height (μm) First layer height (μm) Second layer height (μm) Diameter (μm) Amount of light in the upper direction (arbitrary unit) Side direction light amount (arbitrary unit) Total output light amount (arbitrary unit) Light intensity change rate (%) 3 2.1 0.9 1.2 2.7 8.49X10 ^-09 3.38X10 ^-09 1.1872X10 ^-08 6.6 3 2.1 0.9 1.2 2.8 8.67X10 ^-09 3.29X10 ^-09 1.20X10 ^-08 7.42 3 2.1 0.9 1.2 3 8.23X10 ^-09 3.52X10 ^-09 1.17X10 ^-08 5.51

Pitch (μm) Height (μm) First layer height (μm) Second layer height (μm) Diameter (μm) Amount of light in the upper direction (arbitrary unit) Side direction light amount (arbitrary unit) Total output light amount (arbitrary unit) Light intensity change rate (%) 3 2.1 1.2 0.9 2.6 8.23X10 ^-09 3.29X10 ^-09 1.15X10 ^-08 3.47 3 2.1 1.2 0.9 2.8 8.36X10 ^-09 3.31X10 ^-09 1.17X10 ^-08 4.84 3 2.1 1.2 0.9 3 8.45X10 ^-09 3.27X10 ^-09 1.17X10 ^-08 5.24

As can be seen in Tables 3 to 5 and FIG. 10, when the diameter of the protruding pattern is 2.8 μm, the luminous efficiency is relatively high regardless of the pitch and height . In particular, the second layer is higher than the first layer. When the layer ratio was 0.75, the highest luminous efficiency was exhibited.

Experimental Example 3: Light emission efficiency according to the height of the second layer when the pitch and diameter are constant

Tables 7 to 10, in the light emitting device, are data showing the light output efficiency according to the height change of the first layer and the second layer when the pitch and diameter of the protrusion pattern on the substrate are the same.

Pitch (μm) Height (μm) First layer height (μm) Second layer height (μm) Diameter (μm) Amount of light in the upper direction (arbitrary unit) Side direction light amount (arbitrary unit) Total output light amount (arbitrary unit) Light intensity change rate (%) 3 2.1 1.2 0.9 2.6 8.23X10 ^-09 3.29X10 ^-09 1.15X10 ^-08 3.47 3 2.1 0.4 1.7 2.6 7.80X10 ^-09 3.34X10 ^-09 1.11X10 ^-08 0.02

Pitch (μm) Height (μm) First layer height (μm) Second layer height (μm) Diameter (μm) Amount of light in the upper direction (arbitrary unit) Side direction light amount (arbitrary unit) Total output light amount (arbitrary unit) Light intensity change rate (%) 3 2.1 0.9 1.2 2.7 8.49X10 ^-09 3.38X10 ^-09 1.1872X10 ^-08 6.6 3 2.1 0.4 1.7 2.7 8.08X10 ^-09 3.38X10 ^-09 1.1462X10 ^-08 2.94

Pitch (μm) Height (μm) First layer height (μm) Second layer height (μm) Diameter (μm) Amount of light in the upper direction (arbitrary unit) Side direction light amount (arbitrary unit) Total output light amount (arbitrary unit) Light intensity change rate (%) 3 2.1 1.2 0.9 2.8 8.36X10 ^-09 3.31X10 ^-09 1.17X10 ^-08 4.84 3 2.1 0.9 1.2 2.8 8.67X10 ^-09 3.29X10 ^-09 1.20X10 ^-08 7.42 3 2.1 0.6 1.5 2.8 8.21X10 ^-09 3.47X10 ^-09 1.17X10 ^-08 4.92 3 2.1 0.4 1.7 2.8 8.08X10 ^-09 3.38X10 ^-09 1.15X10 ^-08 2.94

Pitch (μm) Height (μm) First layer height (μm) Second layer height (μm) Diameter (μm) Light amount in the upper direction (arbitrary unit) Side direction light amount (arbitrary unit) Total output light amount (arbitrary unit) Light intensity change rate (%) 3 2.1 1.2 0.9 3 8.45X10 ^-09 3.27X10 ^-09 1.17X10 ^-08 5.24 3 2.1 0.9 1.2 3 8.23X10 ^-09 3.52X10 ^-09 1.17X10 ^-08 5.51 3 2.1 0.6 1.5 3 8.11X10 ^-09 3.43X10 ^-09 1.15X10 ^-08 3.62 3 2.1 0.4 1.7 3 7.94X10 ^-09 3.34X10 ^-09 1.13X10 ^-08 1.27

Looking at Tables 7 to 8, there is a difference in the light amount increase rate according to the height of the first layer and the second layer, and the light amount increase rate was larger when the height of the second layer was higher than the first layer as a whole, but some did not.

10: substrate 11: protrusion pattern
13: first layer 15: second layer
20: first semiconductor layer 21: first growth pattern
23: second growth pattern 30: active layer
40: second semiconductor layer 110: first electrode
120: second electrode 130: insulating film

Claims (14)

Board;
a plurality of protruding patterns protruding from the substrate;
a first semiconductor layer provided on the substrate;
an active layer provided on the semiconductor layer; and
A second semiconductor layer provided on the active layer;
Each extrusion pattern is
a first layer formed integrally with the substrate and protruding from an upper surface of the substrate; and
a second layer provided on the first layer and made of a material different from that of the first layer;
If the pitch is the distance between the centers of two protruding patterns adjacent to each other, the ratio of the diameter of the protruding pattern to the pitch is 0.8 to 1.0,
The diameter of the protrusion pattern is 2.7 ~ 2.9um,
The diameter of the protruding pattern is greater than the height of the protruding pattern,
The side slope of the first layer and the side slope of the second layer are different from each other. According to claim 1,
The pitch is a light emitting element of 2.5 micrometers or more and less than 3.5 micrometers. According to claim 2,
The diameter of each protruding pattern is 2.7 micrometers to 2.8 micrometers, the pitch is 2.9 micrometers to 3.1 micrometers light emitting device. According to claim 3,
The diameter of each protruding pattern is 2.8 micrometers light emitting device. According to claim 1,
The height ratio of the first layer and the second layer is 0.2 to 1.5 light emitting element. According to claim 5,
The height ratio of the first layer and the second layer is 0.75 to 1.5 light emitting element. According to claim 6,
A height of the second layer is greater than a height of the first layer. According to claim 1,
A diameter of the protruding pattern is equal to or smaller than the pitch light emitting device. According to claim 1,
The protruding pattern is a light emitting device having an inverted cone shape. According to claim 1,
The side slope of the first layer and the side slope of the second layer are different from each other. According to claim 1,
A light emitting element in which a cavity is provided in a portion of a region corresponding to a side of the protruding pattern in the first semiconductor layer. According to claim 1,
The first layer includes any one of SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, and Ga ₂ O ₃ , and the second layer includes SiO _x , SiO _x N _y , and SiN _x A light emitting device that does. According to claim 1,
The protruding patterns are regularly arranged light emitting elements. According to claim 1,
The protruding patterns are irregularly arranged light emitting elements.

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