KR102523500B1 - Apparatus for manufacturing epitaxial wafer - Google Patents

Abstract

In an embodiment, a chamber; a lid coupled to the chamber; a sealing including a through hole disposed on a lower surface of the lead and disposed on a central axis; a main disk disposed in the chamber and on which a wafer is disposed; and a gas sprayer inserted into the through hole, wherein the main disk includes: a seating portion on which the wafer is placed; a rotating plate on which the wafer is seated and disposed inside the seating part; and a holder disposed on an edge of the rotating plate, wherein at least one of a first layer disposed under the sealing, a second layer disposed on the holder, and a third layer disposed on an upper surface of an edge of the main disc wherein the first layer, the second layer, and the third layer include silicon carbide doped with at least one of a first dopant and a second dopant.

Description

Epitaxial wafer manufacturing apparatus {APPARATUS FOR MANUFACTURING EPITAXIAL WAFER}

The embodiment relates to an epitaxial wafer manufacturing apparatus.

In general, among techniques for forming various thin films on a substrate or wafer, a chemical vapor deposition (CVD) method is widely used. The chemical vapor deposition method is a deposition technique involving a chemical reaction, and uses a chemical reaction of a source material to form a semiconductor thin film or an insulating film on the surface of a wafer.

Such a chemical vapor deposition method and deposition apparatus have recently been attracting attention as an important thin film formation technology due to the miniaturization of semiconductor devices and the development of high-efficiency and high-output LEDs. Currently, it is used to deposit various thin films such as a silicon film, an oxide film, a silicon nitride film or a silicon oxynitride film, a tungsten film, and the like on a wafer.

In order to deposit a silicon carbide thin film on a substrate or wafer, a reactive gas capable of reacting with the wafer must be introduced. For example, raw materials such as silane (SiH ₄ ), ethylene (C ₂ H ₄ ), or methyltrichlorosilane (MTS), which are standard precursors, are introduced, and the raw materials are heated to produce intermediate compounds such as CH3 and SiClx. After the formation, the intermediate compound may be introduced into the deposition unit and react with the wafer located in the susceptor to deposit the silicon carbide epitaxial layer.

However, in general, there is a problem that silicon carbide grows parasitic not only on wafers but also on seals in chambers of epitaxial wafer manufacturing apparatuses. And there is a problem that the parasitic grown silicon carbide falls on the wafer.

Embodiments provide an epitaxial wafer manufacturing apparatus that prevents parasitic particles from growing on a wafer.

The embodiment provides a wafer with improved quality and an epitaxial wafer manufacturing apparatus for manufacturing the same.

The problem to be solved in the embodiment is not limited thereto, and it will be said that the solution to the problem described below or the purpose or effect that can be grasped from the embodiment is also included.

An epitaxial wafer manufacturing apparatus according to an embodiment of the present invention includes a chamber; a lid coupled to the chamber; a sealing including a through hole disposed on a lower surface of the lead and disposed on a central axis; a main disk disposed in the chamber and on which a wafer is disposed; and a gas sprayer inserted into the through hole, wherein the main disk includes: a seating portion on which the wafer is placed; a rotating plate on which the wafer is seated and disposed inside the seating portion; and a holder disposed on an edge of the rotating plate, wherein at least one of a first layer disposed under the sealing, a second layer disposed on the holder, and a third layer disposed on an upper surface of an edge of the main disc and wherein the first layer, the second layer, and the third layer include silicon carbide doped with at least one of a first dopant and a second dopant.

The first dopant may include a Group 5 element, and the second dopant may include a Group 3 element.

The first layer,

a 1-1 layer disposed under the sealing; and a 1-2 layer disposed under the 1-1 layer, wherein the 1-1 layer includes silicon carbide (SiC) doped with a second dopant, and the 1-2 layer comprises It may include silicon carbide (SiC) doped with the first dopant.

The second layer,

a second-first layer disposed on the holder; and a 2-2 layer disposed on the 2-1 layer, wherein the 2-1 layer includes silicon carbide (SiC) doped with a second dopant, and the 2-2 layer comprises It may include silicon carbide (SiC) doped with the first dopant.

The third layer,

a 3-1 layer disposed on an upper surface of an edge of the main disk; and a 3-2 layer disposed on the 3-1 layer, wherein the 3-1 layer includes silicon carbide (SiC) doped with a second dopant, and the 3-2 layer comprises It may include silicon carbide (SiC) doped with the first dopant.

The first area may be located at the center of the seating portion and the rotating plate.

The rotating plate may include a first area in which the wafer is seated; A second area that is an edge of the first area may be included, and the holder may be disposed in the second area.

The holder includes an inclined surface at the top,

The second layer may be inclined along the inclined surface.

According to the embodiment, it is possible to implement an epitaxial wafer manufacturing apparatus that prevents parasitic particles from growing on a wafer.

According to the embodiment, a wafer with improved quality and an epitaxial wafer manufacturing apparatus for manufacturing the wafer may be implemented.

Various advantageous advantages and effects of the present invention are not limited to the above description, and will be more easily understood in the process of describing specific embodiments of the present invention.

1 is a configuration diagram of an epitaxial wafer manufacturing apparatus according to an embodiment,
Figure 2 is an enlarged view of part A in Figure 1,
3 is an enlarged view of part B in FIG. 2;
4 is a conceptual diagram of FIG. 3,
5 is a cross-sectional view of an epitaxial wafer according to an embodiment;
6 is a view for explaining an epitaxial wafer manufacturing method according to an embodiment,
7 is a view for explaining an epitaxial wafer manufacturing method according to another embodiment,
8 is a view for explaining an epitaxial wafer manufacturing method according to another embodiment,
9 is a modified example of FIG. 6 .

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

However, the technical idea of the present invention is not limited to some of the described embodiments, but may be implemented in a variety of different forms, and if it is within the scope of the technical idea of the present invention, one or more of the components among the embodiments can be selectively implemented. can be used by combining and substituting.

In addition, terms (including technical and scientific terms) used in the embodiments of the present invention, unless explicitly specifically defined and described, can be generally understood by those of ordinary skill in the art to which the present invention belongs. It can be interpreted as meaning, and commonly used terms, such as terms defined in a dictionary, can be interpreted in consideration of contextual meanings of related technologies.

Also, terms used in the embodiments of the present invention are for describing the embodiments and are not intended to limit the present invention.

In this specification, the singular form may also include the plural form unless otherwise specified in the phrase, and when described as "at least one (or more than one) of A and (and) B and C", A, B, and C are combined. may include one or more of all possible combinations.

Also, terms such as first, second, A, B, (a), and (b) may be used to describe components of an embodiment of the present invention.

These terms are only used to distinguish the component from other components, and the term is not limited to the nature, order, or order of the corresponding component.

In addition, when a component is described as being 'connected', 'coupled' or 'connected' to another component, the component is not only directly connected to, combined with, or connected to the other component, but also with the component. It may also include the case of being 'connected', 'combined', or 'connected' due to another component between the other components.

In addition, when it is described as being formed or disposed on the "top (above) or bottom (bottom)" of each component, the top (top) or bottom (bottom) is not only a case where two components are in direct contact with each other, but also one A case in which another component above is formed or disposed between two components is also included. In addition, when expressed as "up (up) or down (down)", it may include the meaning of not only an upward direction but also a downward direction based on one component.

1 is a configuration diagram of an epitaxial wafer manufacturing apparatus according to an embodiment,

Referring to FIG. 1 , an epitaxial wafer manufacturing apparatus 100 according to an embodiment of the present invention includes a process chamber 110, a lid 120, a seal 130, a gas injector 140, and a main disk 150. And it may include a heating member (160).

The process chamber 110 may have an inner space 110a where an epitaxial layer deposition process is performed. The process chamber 110 may include an opening that is open at the top for entry and exit of an epitaxial wafer (hereinafter referred to as 'wafer' or 'epitaxial wafer'). However, it is not limited to these positions. Also, the opening of the process chamber 110 may be sealed by the lid 120 .

In general, since a process in the process chamber 110 is performed at a high temperature, the process chamber 110 may include various materials and various shapes that can withstand high temperatures.

In addition, the process chamber 110 may include a gas outlet 111 through which process gas after the process is finished is discharged to the outside. The gas outlet 111 may extend from the inside of the process chamber 110 to the outside of the process chamber 110 through a side surface or a bottom surface. In FIG. 1 , the gas outlet 111 is illustrated to be disposed on one side and the other side of the process chamber 110, but this does not limit the gas outlet 111 of the present invention.

The process chamber 110 may further include a pressure regulator 112 for regulating internal pressure. The pressure regulator 112 may make the inside of the process chamber 110 a vacuum state. The pressure controller 112 may include a vacuum pump, a pressure sensor, and a plurality of valves.

The lid 120 may be coupled to the process chamber 110 . The lid 120 may seal the opening of the process chamber 110 . The lid 120 may be opened when wafers enter and exit the process chamber 110 . The lid 120 may completely come into close contact with the opening of the process chamber 110 during the deposition process to prevent process gas from leaking out.

A ceiling 130 may be disposed under the lid 120 . Specifically, the seal 130 may protect the inner surface of the lid 120 toward the inner space 110a of the process chamber 110 . In addition, the temperature of the seal 130 may increase along with the increase in temperature inside the process chamber 110 during the process. Process gas in the process chamber 110 may move more smoothly due to the temperature rise of the seal 130 .

In addition, the seal 130 may be formed using a material having good durability against high temperatures. For example, the seal 130 may include silicon carbide (SiC, silicon carbide). When the seal 130 is made of silicon carbide, the replacement cycle of the seal may be reduced, thereby reducing maintenance costs of the epitaxial manufacturing apparatus. That is, in general, a seal is formed by coating tantalum carbide (TaC) on graphite, but there is a disadvantage in that tantalum carbide is easily exfoliated from graphite when exposed to a high-temperature environment. Accordingly, silicon carbide, which is more suitable for high temperatures, may be used as a material of the seal 130 . Therefore, it is possible to eliminate the peeling phenomenon of the surface (coating layer), and to improve the durability and extend the life of the seal. However, it is not limited to these materials.

In addition, the seal 130 may include a first surface 130a disposed toward the inner space 110a, that is, the main disk 150, and a second surface 130b disposed toward the lead 120. In this case, the first surface 130a may include concavo-convex portions. Accordingly, the adhesion to the parasitic grown particles can be improved. However, it is not limited to this structure. In addition, the seal 130 may further include graphite. A detailed configuration of the ceiling 130 will be described later.

The gas injector 140 may inject various process gases into the process chamber 110 . In particular, the gas injector 140 may include a nozzle 142 . The gas injector 140 may react with the wafer through the nozzle 142 to supply a process gas for growing a desired epitaxial layer. The nozzle 142 may be a groove formed in the gas injector 140 in a direction perpendicular to the central axis C. Here, the central axis (C) is located at the center of the main disk.

Also, the gas injector 140 may be disposed to pass through the lid 120 and the seal 130 . One side of the gas injector 140 may be connected to the gas supply unit 141 disposed outside the process chamber 110 . The other side of the gas injector 140 may extend from one side and be disposed in the inner space 110a of the process chamber 110 . However, it is not limited to this structure.

The gas injector 140 may receive process gas from the gas supply unit 141 . The gas supply unit 141 may include a container in which process gas is stored, a flow sensor, and a flow control valve. The process gas may include a growth gas serving as a source of epitaxial growth and a doping gas for performing doping during the growth process.

The doping gas may include a source gas corresponding to an element that is actually doped into an epitaxial layer to be deposited by epitaxial growth, and a dilution gas (carrier gas) used to dilute or move the source gas.

If the wafer is a silicon carbide-based wafer (4H-SiC wafer), the growth gas for epitaxial growth is SiH4+C3H8+H2, MTS (CH3SiCl3), TCS (SiHCl3), and SixCx as materials that can match the lattice constant of the wafer. A material containing carbon and silicon, such as the like, may be used.

At this time, when it is desired to dope the epitaxial layer to be deposited on the wafer with N-type, a material of a group 5 element such as nitrogen gas (N2) may be used as the source gas.

Further, when an epitaxial layer to be stacked on a wafer is to be doped with a P-type, a material of a Group 3 element such as aluminum gas (AL) may be used as a source gas.

However, it is not necessarily limited to this, and the wafer may be different from this depending on the device or product to be finally manufactured. In addition, the reaction source may be different depending on the material and type of the wafer on which the epitaxial layer is to be deposited.

In addition, the source gas involved in actual doping may also be different depending on the type (N-type or P-type) to be doped. For example, epitaxial doping may be performed on a silicon carbide-based wafer by using nitrogen gas as a source gas. At this time, hydrogen gas (H2) may be used as the dilution gas (carrier gas), but is not necessarily limited thereto.

The process gas further includes a reaction gas for etching the epitaxial layer, a plasma ignition gas for igniting plasma in the process chamber 110, an inert gas for regulating pressure and purging inside the process chamber 110, and the like. may also include

The main disk 150 may be disposed in the inner space 110a of the process chamber 110 . The main disk 150 may be disposed below the gas injector 140 and the ceiling 130 . The main disk 150 may include a plurality of mounting portions 151 on which wafers are disposed. In particular, the seating portion 151 may be disposed on a surface of the main disk 150 facing the gas injector 140 . In the drawing, it is shown that the seating parts 151 are disposed on one side and the other side of the main disk 150, respectively, but the present invention is not limited to these numbers and locations.

When the deposition process proceeds, an epitaxial layer may be deposited on the wafer disposed on the seating portion 151 in a predetermined reaction temperature environment by a chemical vapor phase reaction between the wafer and the process gas.

A spindle 152 may be connected to the lower surface of the main disk 150 . The spindle 152 may support the central portion of the main disk 150 . The spindle 152 may extend from the lower surface of the main disk 150 through the lower surface of the process chamber 110 to the outside. The spindle 152 may rotate or move up and down in connection with an external driving unit. That is, the main disk 150 may be connected to the spindle 152 and rotated clockwise or counterclockwise with respect to the first rotation axis. Here, the first axis of rotation may be the same as the central axis C of the spindle 152 , the main disk 150 , and the ceiling 130 . And the central axis (C) is an axis formed in the formation direction of the through hole at the center of the circular seal 130, will be described below as the central axis (C).

In addition, the main disk 150 is connected to the spindle 152 and can move upward or downward. A detailed description of the main disk 150 and the mounting portion 151 will be described later with reference to FIG. 3 .

The heating member 160 may be disposed under the main disk 150 . The heating member 160 may heat the main disk 150 . In particular, the heating member 160 may be disposed in an area adjacent to the seating portion 151 . That is, the heating member 160 may heat the wafer disposed on the seating portion 151 . The heating member 160 may facilitate a deposition process or an etching process of an epitaxial layer on the wafer by heating the wafer to a reaction temperature.

The heating member 160 may be provided in plurality. The heating member 160 may dissipate heat through various methods such as electric heater, high frequency induction, infrared radiation, and laser.

FIG. 2 is an enlarged view of part A in FIG. 1 , FIG. 3 is an enlarged view of part B in FIG. 2 , and FIG. 4 is a conceptual diagram of FIG. 3 .

First, referring to FIG. 2 , in the epitaxial wafer manufacturing apparatus according to the embodiment, a first layer 131 may be disposed below the sealing 130 . The first layer 131 may be disposed on the first surface 130a of the seal 130 .

The first layer 131 may include both n-type silicon carbide and p-type silicon carbide. In an embodiment, the first layer 131 may include at least one of a 1-1 layer 131a and a 1-2 layer 131b. Here, the 1-1st layer 131a may be disposed between the sealing 130 and the lower 1-2nd layer 131b.

First, the 1-1st layer 131a may include p-type silicon carbide. For example, the 1-1st layer 131a may include aluminum silicon carbide (AlSiC). Alternatively, the first and second layers 131b may include n-type silicon carbide. For example, the first and second layers 131b may include silicon carbide nitride (SiCN).

As such, the 1-1st layer 131a and the 1-2nd layer 131b may be formed of silicon carbide doped with different polarities. At this time, as described above, the layer containing P-type silicon carbide may not be disposed at the bottom. That is, the 1-1st layer 131a may not be exposed by being disposed on top of the 1-2nd layer 131b.

With this configuration, it is possible to prevent corrosion or reactants from being generated by the dopant in the 1-1st layer 131a. For example, when the 1-1st layer 131a is disposed at the bottom, silicon carbide containing a material of a Group 3 element such as Al evaporates a reactant or corrosive material over time while the process is cycled in the process chamber. can be caused by Accordingly, even in the process of doping the wafer with N-type silicon carbide, the doping effect by the n-type dopant (eg, group 5 element) is offset by the reactant or corrosive, resulting in a decrease in electrical effect. That is, by disposing the 1-1st layer 131a between the 1-2nd layer 131b and the sealing 130, it is possible to prevent a memory effect from occurring.

In addition, the first layer 131 may include N-type or P-type silicon carbide, and may be easily combined with parasitic particles (eg, SiC, P) growing parasitic on the lower portion of the first layer 131 . More specifically, a single crystal structure is grown on a wafer including silicon carbide (SiC) during growth, but a polycrystalline structure may be grown under the sealing 130 or the first layer 131 . At this time, the polycrystalline structure may have a smaller adhesive force or bonding force than the single crystal structure. That is, the adhesive force between the seal 130 and the parasitic particle P is low, so that the parasitic particle P can adhere to the upper surface of the wafer below the seal 130 and grow on the wafer, and the parasitic particle P can bond on the top of the wafer. this can happen

Thus, in the apparatus for manufacturing an epitaxial wafer according to the embodiment, the first layer 131 is disposed under the sealing 130 to improve the adhesion between the parasitic particles P and the first layer 131, thereby forming parasitic particles into the wafer ( P) can be prevented from moving, thereby preventing the formation of defects in the epitaxial wafer.

Referring to FIG. 3 , as described above, the main disk 150 may include a seating portion 151 in which a wafer is seated.

In addition, a second rotational shaft 153 may be disposed at the center of the seating portion 151 . The second rotational shaft 153 may be disposed from the center of each seating portion 151 to pass through an inner portion of the main disk 150 . As an example, one end of the second rotation shaft 153 may be located inside the main disk 150, and the other end of the second rotation shaft 153 may be located inside the rotation plate 154 described below.

The rotation plate 154 is a body on which the wafer 10 is seated, and is disposed within the seating portion 151 and can be rotated by the second rotation shaft 153 .

The rotating plate 154 may include a first area S1 where the wafer 10 is seated and a second area S2 that is an edge of the first area S1. The first area S1 is located at the center of the seating portion 151 and the rotating plate 154 and may be coupled to the second rotating shaft 153 .

Also, the second area S2 is an edge area of the rotating plate 154 and may be spaced apart from the wafer 10 . Also, the second area S2 may have a ring shape. A holder 155 may be disposed on the second region S2 . The holder 155 may have a ring shape similar to the second region S2 , and may accommodate the wafer 10 therein by being combined with the rotating plate 151 .

The rotating plate 154 and the holder 155 may be made of the same material. Illustratively, both the rotating plate 154 and the holder 155 may be made of SiC. However, it is not necessarily limited thereto, and may be made of different materials.

The holder 155 is disposed on the rotating plate 154 and may include a second layer 156 thereon. The second layer 156 may be disposed to surround the holder 155 disposed in the second region S2. The second layer 156 may include a first surface M1 disposed on the upper surface of the holder 155, a second surface M2 and a third surface M3 disposed on the side surface of the holder 155. can

In this case, the second layer 156 may include N-type or P-type silicon carbide and may be easily combined with parasitic particles (eg, SiC or P) growing parasitic on the second layer 156 . More specifically, a single crystal structure is grown on a wafer including silicon carbide (SiC) during growth, but a polycrystalline structure may be grown on the upper portion of the second layer 156 . At this time, the polycrystalline structure may have a smaller adhesive force or bonding force than the single crystal structure. Accordingly, the adhesive force between the holder 155 and the parasitic particle P is low, so that the parasitic particle P is attached to the top surface of the wafer, and the parasitic particle P can grow on the wafer. Due to this, coupling by the parasitic particle P may occur on the upper portion of the wafer.

Thus, in the apparatus for manufacturing an epitaxial wafer according to the embodiment, the second layer 156 is disposed on the holder 155 to improve the adhesion between the parasitic particles P and the second layer 156 so that the parasitic particles ( P) can be prevented from moving, thereby preventing the formation of defects in the epitaxial wafer.

Also, the second layer 156 may include a plurality of layers. For example, the second layer 156 may include at least one of a 2-1 layer 156a and a 2-2 layer 156b. Here, the 2-1st layer 156a may be disposed on the holder 155 . Also, the 2-2nd layer 156b may be disposed on the 2-1st layer 156a.

First, the 2-1 layer 156a may include p-type silicon carbide. For example, the 2-1st layer 156a may include aluminum silicon carbide (AlSiC). Alternatively, the 2-2 layer 156b may include n-type silicon carbide. For example, the 2-2 layer 156b may include silicon carbide nitride (SiCN).

As such, the 2-1st layer 156a and the 2-2nd layer 156b may be formed of silicon carbide doped with different polarities. At this time, as described above, the layer containing P-type silicon carbide may not be placed on top. That is, the 2-1st layer 156a may not be exposed by disposing on top of the 2-2nd layer 156b.

With this configuration, it is possible to prevent corrosion or reactants from being generated by the dopant in the 2-1 layer 156a. For example, when the 2-1st layer 156a is disposed on top, silicon carbide containing a material of a Group 3 element such as Al evaporates a reactant or corrosive material over time during the process cycle in the process chamber. can be caused by Accordingly, even in the process of doping the wafer with N-type silicon carbide, the doping effect by the n-type dopant (eg, group 5 element) is offset by the reactant or corrosive, resulting in a decrease in electrical effect. That is, by disposing the 2-1st layer 156a between the 2-2nd layer 156b and the holder 155, it is possible to prevent a memory effect from occurring. In addition, the second layer 156 may have a thickness of 5 μm to 30 μm.

In addition, a third layer 157 may be disposed on the upper surface of the edge of the main disk 150 . As described above, when the main disk 150 is a circular plate, the third layer 157 may also have a circular shape.

The third layer 157 may be disposed outside the wafer 10 and the second layer 156 . That is, the second layer 156 may be positioned between the third layer 157 and the wafer 10 . The third layer 157 may be disposed on the upper surface of the main disk 150 similar to the structure in which the second layer 156 is disposed on the holder 155 . At this time, the third layer 157, like the second layer 156, includes N-type or P-type silicon carbide and parasitic particles (eg, SiC, P) growing parasitic on the third layer 157. can be easily combined with More specifically, a single crystal structure is grown on a wafer including silicon carbide (SiC) during growth, but a polycrystalline structure may be grown on the third layer 157 . At this time, the polycrystalline structure may have a smaller adhesive force or bonding force than the single crystal structure. Accordingly, the adhesive strength between the main disk 150 and the parasitic particles P is low, so that the parasitic particles P are adhered to the upper surface of the wafer, and the parasitic particles P can grow on the wafer. Due to this, coupling by the parasitic particle P may occur on the upper portion of the wafer.

Accordingly, the apparatus for manufacturing an epitaxial wafer according to the embodiment arranges the third layer 157 on the main disk 150 to improve the adhesion between the parasitic particles P and the third layer 157, thereby forming parasitic particles into the wafer. It is possible to prevent defect formation in the epitaxial wafer by preventing (P) from moving.

Also, the third layer 157 may include a plurality of layers. For example, the third layer 157 may include at least one of a 3-1 layer 157a and a 3-2 layer 157b. Here, the 3-1st layer 157a may be disposed on the main disk 150 . Also, the 3-2nd layer 157b may be disposed on the 3-1st layer 157a.

First, the 3-1st layer 157a may include p-type silicon carbide. For example, the 3-1st layer 157a may include aluminum silicon carbide (AlSiC). Alternatively, the 3-2nd layer 157b may include n-type silicon carbide. For example, the 3-2nd layer 157b may include silicon carbide nitride (SiCN).

As such, the 3-1st layer 157a and the 3-2nd layer 157b may be formed of silicon carbide doped with different polarities. At this time, as described above, the layer containing P-type silicon carbide may not be placed on top. That is, the 3-1st layer 157a may not be exposed by disposing on top of the 3-2nd layer 157b.

With this configuration, it is possible to prevent corrosion or reactants from being generated by the dopant in the 3-1 layer 157a. For example, when the 3-1 layer 157a is disposed on the top, silicon carbide containing a material of a Group 3 element such as Al evaporates a reactant or corrosive material over time during the process cycle in the process chamber. can be caused by Accordingly, even in the process of doping the wafer with N-type silicon carbide, the doping effect by the n-type dopant (eg, group 5 element) is offset by the reactant or corrosive, resulting in a decrease in electrical effect. That is, by disposing the 3-1 layer 157a between the 3-2 layer 157b and the main disk 150, it is possible to prevent a memory effect from occurring. Also, the third layer 157 may have a thickness of 5 μm to 30 μm, similarly to the second layer 156 .

Referring to FIG. 4 , a ring-shaped holder 155 and a circular rotating plate 154 may be disposed outside the wafer 10 .

At this time, the holder 155 may have an inclined surface 155a on the top. In the case of having an inclined surface 155a, the upper second layer 156 may also have an inclined structure. Also, by the inclined surface 155a, the thickness of the holder 155 may decrease from the inside to the outside at least in part. With this structure, it is possible to easily prevent the parasitic particles P attached to the second layer 156 from moving to the upper portion of the inner wafer 10 . In addition, with this configuration, occurrence of surface defects (eg, triangle defects) caused by the parasitic particles P on the wafer 10 can be easily prevented.

5 is a cross-sectional view of an epitaxial wafer according to an embodiment.

Referring to FIG. 5 , an epitaxial wafer 10 according to an embodiment includes a substrate 11, a buffer layer 12 disposed on the substrate 11, and an epitaxial layer 13 disposed on the buffer layer 12. include

First, the substrate 11 may be a silicon carbide-based wafer (4H-SiC wafer), and accordingly, an epitaxial layer 13 to be described later may also be made of a doped silicon carbide-based wafer.

When the substrate 11 is made of silicon carbide (SiC), all of the epitaxial layers 13 may be formed of n-type conductive silicon carbide, that is, silicon carbide nitride (SiCN). However, the epitaxial layer 13 is not necessarily limited thereto and may be formed of p-type conductive silicon carbide, that is, aluminum silicon carbide (AlSiC). In addition, it is not limited to this structure, and the epitaxial layer 13 may have a structure in which n-type and p-type layers are alternately stacked. For example, it may be made of various structures such as n/p and n/n/p.

The substrate 11 may have an off angle of 3 degrees to 10 degrees. Here, the off-angle may be defined as an angle at which the substrate 11 is tilted with respect to the (0001) Si plane and the (000-1) C plane. However, it is not necessarily limited thereto.

The doping concentration of the substrate 11 may be 1Х10 ¹⁸ cm ^-3 to 1Х10 ²⁰ cm ^{-3 ,} but is not necessarily limited thereto. The doping concentration of the substrate 11 may be constant in the thickness direction, but is not necessarily limited thereto. Here, the thickness direction is the first direction (X direction), and the second direction (Y direction) is a direction perpendicular to the first direction. can be

The buffer layer 12 may be disposed on the substrate 11 . The buffer layer 12 may reduce crystal defects due to a lattice constant mismatch between the substrate 11 and the epitaxial layer 13 . First, dislocations generally existing on the substrate 11 include basal plane dislocations (BPD) and threading edge dislocations (TED). Among them, the basal plane potential (BPD) increases resistance when the diode is energized for a long time and may deteriorate reliability of the power device. On the other hand, the effect of the TED on the power device may be relatively small. At this time, the buffer layer 12 may improve the reliability of the power device by transforming the basal plane potential (BPD) of the potentials existing on the substrate 11 into the cutting edge potential (TED). Also, the buffer layer 12 may include a plurality of layers as described above.

And the epitaxial layer 13 may be disposed on the buffer layer 12. First, the doping concentration of the epitaxial layer 13 may be 1Х10 ¹⁵ cm ⁻³ to 5Х10 ¹⁸ cm ⁻³ . The epitaxial layer 13 may have a plurality of sections in which doping concentration changes in the thickness direction. In addition, the doping concentration of the epitaxial layer 13 may increase or decrease in the thickness direction.

In addition, as the difference in dopant concentration between the epitaxial layer 13 and the buffer layer 12 increases, the efficiency of converting basal surface dislocations into edge dislocations (hereinafter referred to as BPD conversion efficiency) may be improved. The lower the dopant concentration of the epitaxial layer 13, the greater the difference between the dopant concentration and the buffer layer 12, and thus BPD conversion efficiency may be improved.

According to the embodiment, since the doping concentration difference is large at the interface between the epitaxial layer 13 and the buffer layer 12, the basal surface dislocation may be converted into a knife edge dislocation. In addition, since a doping concentration difference occurs at the interface where the doping concentration changes within the epitaxial layer 13, the basal surface dislocation can be easily converted into a knife edge dislocation.

In addition, the epitaxial wafer 10 according to the embodiment can prevent parasitic particles P from being provided to the surface of the wafer from other equipment (eg, a sealing device, a holder, a main disk). That is, the epitaxial wafer 10 according to the actual embodiment controls parasitic particles present on the surface of the wafer through the epitaxial wafer manufacturing apparatus including the above-described first layer, second layer, and third layer to obtain the wafer It is possible to reduce surface defects and surface roughness that may occur when an epitaxial layer is grown on the surface. In particular, surface defects on the epitaxial layer 13 can be reduced to less than 1 ea/cm 2 . Accordingly, it is possible to implement a high-quality silicon carbide epitaxial wafer 10 through the apparatus for manufacturing an epitaxial wafer according to the embodiment and the manufacturing method described below, and the epitaxial wafer 10 according to the embodiment is of high quality and high efficiency It can be used as an electronic material.

6 is a view for explaining an epitaxial wafer manufacturing method according to one embodiment, FIG. 7 is a view for explaining an epitaxial wafer manufacturing method according to another embodiment, and FIG. 8 is another embodiment It is a drawing for explaining an epitaxial wafer manufacturing method according to an example, and FIG. 9 is a modified example of FIG. 6 .

Referring to FIG. 6, an epitaxial wafer manufacturing method according to an embodiment includes disposing at least one of a first layer, a second layer, and a third layer, and injecting a reaction source into an epitaxial wafer manufacturing apparatus for epitaxial growth steps may be included.

The disposing of at least one of the first layer, the second layer, and the third layer may include a preheating step ( S11 ), a growing step ( S12 ), and a cooling step ( S13 ). In the preheating step (S10), the temperature may be firstly heated to about 1000 degrees, and secondarily heated to about 1500 to 1700 degrees. The primary heating may be a step of removing contaminants from the surface of the wafer.

In the growing step ( S12 ), an epitaxial layer may be grown by injecting a reaction source including a growth gas, a doping gas, and a diluent gas into a chamber adjusted to a temperature of about 1500 to 1700 degrees.

Here, when a silicon carbide-based wafer (eg, a 4H-SiC wafer) is used as the substrate, the first growth gas and the second growth gas may include a material capable of matching a lattice constant with the substrate. For example, the first growth gas and the second growth gas are materials containing carbon and silicon, such as SiH ₄ +C ₃ H ₈ , MTS (CH ₃ SiCl ₃ ), TCS (SiHCl ₃ ), Si _x C _x , and the like. this can be used As shown in FIG. 6 , the first growth gas may be SiH ₄ and the second growth gas may be C ₃ H ₈ , but is not necessarily limited thereto. For example, the first growth gas may be C ₃ H ₈ and the second growth gas may be SiH ₄ . The second growth gas may be injected at a predetermined ratio with the first growth gas. The ratio (C:Si) of the first growth gas and the second growth gas may be 0.8:1 to 1.3:1.

In addition, different doping gases may be applied according to the type of N or P of the first layer, the second layer, and the third layer. For example, when the first layer is to be doped with an N-type doping gas, a material of a group 5 element such as nitrogen gas (N2) may be used. Hereinafter, a doping gas containing a material of a group 5 element will be described as a first doping gas.

Also, as the doping gas, when the second layer is to be doped with a P-type, a material of a group 3 element such as Al (aluminum) may be used. Hereinafter, a doping gas containing a material of a group 3 element will be described as a second doping gas.

And, as the diluent gas (carrier gas), hydrogen gas (H ₂ ) may be used, but is not necessarily limited thereto.

More specifically, the first layer, the second layer, and the third layer include N-type silicon carbide (SiCN) by doping N-type using a first growth gas, a second growth gas, a first doping gas, and a dilution gas. can do.

Thereafter, in the cooling step (S30), the growth may be terminated by cooling the chamber in which the growth is completed.

However, epitaxial growth may be performed before the cooling step (S30). Accordingly, the buffer layer and the epitaxial layer may be sequentially disposed.

Specifically, when the buffer layer and the epitaxial layer are grown and disposed, different doping gases may be applied depending on the type of N or P of the buffer layer and the epitaxial layer. For example, when a buffer layer or an epitaxial layer is to be doped with an N-type doping gas, a material of a group 5 element such as nitrogen gas (N2) may be used. In addition, as the doping gas, when the buffer layer or the epitaxial layer is to be doped with a P-type, a material of a Group 3 element such as Al (aluminum) may be used. In addition, hydrogen gas (H ₂ ) may be used as the diluent gas (carrier gas), but is not necessarily limited thereto.

At this time, with the arrangement of the first layer, the second layer, and the third layer described above, it may be difficult for the parasitic particle to move to the wafer due to adhesive force with the first layer, the second layer, and the third layer. Accordingly, occurrence of defects due to parasitic particles in the buffer layer and the epitaxial layer on the wafer may be further reduced.

Referring to FIG. 7, an epitaxial wafer manufacturing method according to another embodiment includes disposing at least one of a first layer, a second layer, and a third layer, and injecting a reaction source into an epitaxial wafer manufacturing apparatus for epitaxial growth steps may be included.

At this time, unlike the epitaxial wafer manufacturing method according to an embodiment, the second doping gas may be used in the growth step (S11′) of the steps of disposing at least one of the first layer, the second layer, and the third layer. More specifically, the first layer, the second layer, and the third layer may be doped to P-type using a first growth gas, a second growth gas, a second doping gas, and a dilution gas. Accordingly, the first layer, the second layer, and the third layer may include p-type silicon carbide (AlSiC). Thus, as described above, the arrangement of the first layer, the second layer, and the third layer according to the manufacturing method prevents parasitic particles from spreading to the wafer during epitaxial growth and suppresses the occurrence of defects on the wafer can do. Other processes may be the same as those described in FIG. 6 .

Referring to FIG. 8, an epitaxial wafer manufacturing method according to another embodiment includes disposing at least one of a first layer, a second layer, and a third layer, and injecting a reaction source into an epitaxial wafer manufacturing apparatus to perform epitaxial It may include a growing step.

At this time, unlike the epitaxial wafer manufacturing method according to an embodiment, the growth step (S11) of the step of disposing at least one of the first layer, the second layer, and the third layer is the first growth step (S11a) and the second layer (S11a). A growth step (S11b) may be included. First, in the first growth step (S11a), the 1-1 layer of the 1st layer, the 2-1 layer of the 2nd layer, and the 3-1 layer of the 3rd layer are sealed using a second doping gas, respectively, It can be placed on the holder and main disk.

More specifically, the 1-1 layer of the first layer, the 2-1 layer of the second layer, and the 3-1 layer of the third layer are the first growth gas, the second growth gas, the second doping gas and dilution. It can be doped to P-type using gas. Accordingly, the 1-1 layer of the first layer, the 2-1 layer of the second layer, and the 3-1 layer of the third layer may include P-type silicon carbide (AlSiC).

Thereafter, in the second growth step (S11b), the first-second layer of the first layer, the second-second layer of the second layer, and the third-second layer of the third layer are sealed using the first doping gas, respectively. , can be placed on the holder and main disk. Accordingly, the first-second layer of the first layer, the second-second layer of the second layer, and the third-second layer of the third layer are the first growth gas, the second growth gas, the first doping gas, and the dilution gas. N-type doping can be performed using Accordingly, the first-second layer of the first layer, the second-second layer of the second layer, and the third-second layer of the third layer may include N-type silicon carbide (AlSiC).

Thus, as described above, the arrangement of the first layer, the second layer, and the third layer according to the manufacturing method prevents parasitic particles from spreading to the wafer during epitaxial growth and suppresses the occurrence of defects on the wafer can do. Other processes may be the same as those described in FIG. 6 .

In this case, the step of disposing at least one of the first layer, the second layer, and the third layer in FIGS. 6 to 8 may be performed by disposing a dummy wafer on the wafer. In addition, the step of injecting a reaction source into an epitaxial wafer manufacturing apparatus to perform epitaxial growth may be performed by disposing a wafer used as a power device.

Referring to FIG. 9 , the step of disposing at least one of the first layer, the second layer, and the third layer described above may be performed in the same manner as growth of an N-type buffer layer and an epitaxial layer of a normal wafer by disposing a dummy wafer.

For example, among the steps of disposing at least one of the first layer, the second layer, and the third layer, the growth step (S11) may include a first growth step (S11a″) and a second growth step (S11b″). there is. First, in the first growth step S11a″, a first growth gas, a second growth gas, a second doping gas, and a dilution gas may be used to dispose the N-type buffer layer on the substrate. In this case, the first layer, the second layer, and the third layer may include N-type silicon carbide (AlSiC) like the buffer layer. At this time, the ratio of the growth gas, the ratio of the doping gas, etc. may be changed according to the number of buffer layers.

Similarly, in the second growth step (S11b″), a first growth gas, a second growth gas, a second doping gas, and a dilution gas may be used to dispose the N-type epitaxial layer on the buffer layer. In this case, the first layer, the second layer, and the third layer may include N-type silicon carbide (AlSiC) like the epitaxial layer. However, the temperature in the chamber compared to the buffer layer may increase. Also, unlike the buffer layer, the ratio of the first growth gas and the second growth gas may be different. However, it is not limited to this configuration. According to this process, as shown in FIG. 6, the first layer, the second layer, and the third layer include N-type silicon carbide and may be disposed on the seal, holder, and main disk, respectively.

Claims (10)

chamber;
a lid coupled to the chamber;
a sealing including a through hole disposed on a lower surface of the lead and disposed on a central axis;
a main disk disposed in the chamber and on which a wafer is disposed; and
A gas injector inserted into the through hole; includes,
The main disk,
a seating portion on which the wafer is placed;
a rotating plate on which the wafer is seated and disposed inside the seating part; and
Including; holder disposed on the edge of the rotating plate,
Further comprising a first layer disposed under the sealing,
The first layer,
a 1-1 layer disposed under the sealing; and
Including a 1-2 layer disposed under the 1-1 layer,
The 1-1 layer includes silicon carbide (SiC) doped with a second dopant,
The first and second layers include silicon carbide (SiC) doped with a first dopant.
According to claim 1,
The first dopant includes a group 5 element,
The second dopant is an epitaxial wafer manufacturing apparatus comprising a Group 3 element.
delete chamber;
a lid coupled to the chamber;
a sealing including a through hole disposed on a lower surface of the lead and disposed on a central axis;
a main disk disposed in the chamber and on which a wafer is disposed; and
A gas injector inserted into the through hole; includes,
The main disk,
a seating portion on which the wafer is placed;
a rotating plate on which the wafer is seated and disposed inside the seating part; and
Including; holder disposed on the edge of the rotating plate,
further comprising a second layer disposed on the holder;
The second layer,
a second-first layer disposed on the holder; and
Including a 2-2 layer disposed on top of the 2-1 layer,
The 2-1 layer includes silicon carbide (SiC) doped with a second dopant,
The 2-2 layer includes silicon carbide (SiC) doped with a first dopant.
chamber;
a lid coupled to the chamber;
a sealing including a through hole disposed on a lower surface of the lead and disposed on a central axis;
a main disk disposed in the chamber and on which a wafer is disposed; and
A gas injector inserted into the through hole; includes,
The main disk,
a seating portion on which the wafer is placed;
a rotating plate on which the wafer is seated and disposed inside the seating part; and
Including; holder disposed on the edge of the rotating plate,
Further comprising a third layer disposed on the upper surface of the edge of the main disk,
The third layer,
a 3-1 layer disposed on an upper surface of an edge of the main disc; and
Including a 3-2 layer disposed on top of the 3-1 layer,
The 3-1 layer includes silicon carbide (SiC) doped with a second dopant,
The 3-2 layer is an epitaxial wafer manufacturing apparatus comprising silicon carbide (SiC) doped with a first dopant.
According to claim 1,
The rotating plate may include a first area in which the wafer is seated; A second region that is an edge of the first region,
The holder is an epitaxial wafer manufacturing apparatus disposed in the second region.
According to claim 6,
The first region is an epitaxial wafer manufacturing apparatus located at the center of the seating portion and the rotating plate.
According to claim 4,
The holder includes an inclined surface at the top,
The second layer is inclined along the inclined surface epitaxial wafer manufacturing apparatus.
According to claim 4,
The first dopant includes a group 5 element,
The second dopant is an epitaxial wafer manufacturing apparatus comprising a Group 3 element.
According to claim 5,
The first dopant includes a group 5 element,
The second dopant is an epitaxial wafer manufacturing apparatus comprising a Group 3 element.

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