KR102472795B1 - Apparatus and method for detecting spike in biosignal - Google Patents

Abstract

A spike detection device and a spike detection method are disclosed. The spike detection device extracts a first baseline signal including a baseline component of the first input signal from the first input signal, and extracts a second baseline signal including a baseline component of the second input signal from the second input signal. A baseline signal extraction circuit for extracting a baseline signal, and a comparison circuit for outputting a resultant signal including a spike component based on the first input signal, the second input signal, the first baseline signal, and the second baseline signal. include

Description

Spike detection device and spike detection method of biological signals {APPARATUS AND METHOD FOR DETECTING SPIKE IN BIOSIGNAL}

The embodiments below relate to techniques for detecting spikes in biosignals.

An important aspect of neuroscience-related research is the detection and analysis of neural signals. Nerve signals involve electrically excitable cells that process and transmit information through electrical and chemical signals. On the electrical side, when a neuron is sufficiently stimulated, voltage-gated ion channels open and nerve signals are transmitted through the axon terminal. In terms of chemistry, a voltage-gated calcium ion channel opens at the axon terminal in response to an action potential, and a chemical substance called a neurotransmitter is released into the synapse. The information contained in a neural signal can be identified through the frequency of spikes rather than the signal level.

A spike detection apparatus for detecting a spike in a signal according to an embodiment includes extracting a first baseline signal including a baseline component of the first input signal from a first input signal, and extracting a first baseline signal from a second input signal. a baseline signal extraction circuit for extracting a second baseline signal including a baseline component of the second input signal; and a comparison circuit outputting a resultant signal including a spike component based on the first input signal, the second input signal, the first baseline signal, and the second baseline signal.

An apparatus for detecting a spike according to an embodiment performs high-pass filtering on a first biosignal of a first polarity and a second biosignal of a second polarity, respectively, and amplifies the high-pass filtered first biosignal. and a pre-processing circuit outputting the second input signal by outputting the first biosignal and amplifying the high-pass filtered second biosignal.

The pre-processing circuit may include a high-pass filter for performing the high-pass filtering; and an amplifier that amplifies the first biosignal and the second biosignal.

The comparison circuit includes a comparator including a first input terminal and a second input terminal, and a first combined signal between the first input signal and the second baseline signal is input to the first input terminal, A second combined signal between the second input signal and the first baseline signal may be input to the second input terminal.

The comparator, when the signal input to the first input terminal is greater than the signal input to the second input terminal, outputs a signal in a first state as the result signal, and the signal input to the second input terminal When greater than the signal input to the first input terminal, a signal in the second state may be output as the resultant signal.

A third combined signal between the first combination signal and the first offset signal is input to the first input terminal of the comparator, and a signal between the second combination signal and the second offset signal is input to the second input terminal of the comparator. A fourth combined signal may be input.

The comparison circuit may include a first control terminal for adjusting the first offset signal and a second control terminal for adjusting the second offset signal.

The baseline signal extraction circuit may extract the first baseline signal of the first input signal and the second baseline signal of the second input signal using low-pass filtering.

A spike detection method for detecting a spike in a signal according to an embodiment includes extracting a first baseline signal including a baseline component of the first input signal from a first input signal, and extracting a first baseline signal from a second input signal. extracting a second baseline signal including a baseline component of the second input signal; and outputting a resultant signal including a spike component based on the first input signal, the second input signal, the first baseline signal, and the second baseline signal.

A spike detection method according to an embodiment includes performing high-pass filtering on a first biosignal of a first polarity and a second biosignal of a second polarity, respectively; generating the first input signal by amplifying the high-pass filtered first physiological signal; and generating the second input signal by amplifying the high-pass filtered second physiological signal.

The outputting of the resulting signal may include generating a first combined signal by combining the first input signal and the second baseline signal; generating a second combined signal by combining the second input signal and the first baseline signal; and comparing a first comparison signal and a second comparison signal, wherein the first comparison signal is the first combined signal, and the second comparison signal is the second combined signal.

In the comparing step, when the first comparison signal is greater than the second comparison signal, a first state signal is output as the result signal, and when the second comparison signal is greater than the first comparison signal, the second comparison signal is output. It may include outputting a signal of the second state as the resultant signal.

The outputting of the resulting signal may include generating a third combined signal obtained by combining a first offset signal with the first combined signal; The method may further include generating a fourth combined signal obtained by combining a second offset signal with the second combined signal, wherein the first comparison signal is the third combined signal, and the second comparison signal is the fourth combined signal. It can be a binding signal.

The extracting may include extracting the first baseline signal of the first input signal and the second baseline signal of the second input signal using low-pass filtering.

1 is a diagram showing the configuration of a spike detection device according to an embodiment.
2 is a diagram illustrating an output signal of a pre-processing circuit of a spike detection device according to an exemplary embodiment.
3 is a diagram for explaining a comparison circuit of a spike detection device according to an exemplary embodiment.
4 shows a circuit diagram of a comparison circuit of a spike detection device according to one embodiment.
5 is a diagram illustrating an input signal and an output signal of a comparator of a spike detection device according to an exemplary embodiment.
6 is a diagram illustrating an input signal and an output signal obtained by combining an offset signal of a comparator of a spike detection apparatus according to an exemplary embodiment.
7 is a flowchart illustrating a spike detection method according to an exemplary embodiment.

Specific structural or functional descriptions of the embodiments are disclosed for illustrative purposes only, and may be changed and implemented in various forms. Therefore, the form actually implemented is not limited only to the specific embodiments disclosed, and the scope of the present specification includes changes, equivalents, or substitutes included in the technical idea described in the embodiments.

Although terms such as first or second may be used to describe various components, such terms should only be construed for the purpose of distinguishing one component from another. For example, a first element may be termed a second element, and similarly, a second element may be termed a first element.

It should be understood that when an element is referred to as being “connected” to another element, it may be directly connected or connected to the other element, but other elements may exist in the middle.

Singular expressions include plural expressions unless the context clearly dictates otherwise. In this specification, terms such as "comprise" or "have" are intended to designate that the described feature, number, step, operation, component, part, or combination thereof exists, but one or more other features or numbers, It should be understood that the presence or addition of steps, operations, components, parts, or combinations thereof is not precluded.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the related art, and unless explicitly defined in this specification, it should not be interpreted in an ideal or excessively formal meaning. don't

Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. In the description with reference to the accompanying drawings, the same reference numerals are given to the same components regardless of reference numerals, and overlapping descriptions thereof will be omitted.

1 is a diagram showing the configuration of a spike detection device according to an embodiment.

Biological signals, especially nerve signals, are transmitted by spike potential, which is a transient potential change in cell membrane caused by excitation of excitable cells such as muscles and nerves. Since a neural signal transmits information through the frequency of spikes rather than the signal level of spike potentials, the frequency of spikes is an important factor in understanding information contained in a nerve signal.

For monitoring of health and disease conditions, technology for obtaining information included in vital signals is required. Information included in the biosignal may be obtained by detecting the biosignal, properly processing the detected biosignal, converting the detected biosignal into a digital signal, and measuring the spike frequency.

The spike detection device 100 may properly process the detected biosignal and detect a spike component of the biosignal in order to measure the spike frequency in the biosignal.

Referring to FIG. 1 , a spike detection device 100 according to an embodiment may include a pre-processing circuit 140 , a baseline signal extraction circuit 125 and a comparison circuit 130 .

As mentioned above, in order to measure the spike frequency, it is necessary to detect a neural signal, properly process the detected neural signal, and convert it into a digital signal. detector) and the like are used, consuming a large area and large power consumption. When the spike detection device 100 is used in the form of a wearable device, low power is required for miniaturization of the battery size, and when the spike detection device 100 is used in the body, a smaller battery is required, so ultra-low power is required do.

The spike detection device 100 includes a pre-processing circuit 140, a baseline signal extraction circuit 125 and a comparison circuit 130, thereby consuming and bulky buffer, PGA (Programmable Gain Amplifier), analog-to-digital converter, envelope Since the spike component of the biological signal can be detected without using an envelope detector or the like, power consumption and miniaturization can be reduced.

Bio-signal measurement may be required to monitor health and disease states, and bio-signals HPFip and HPFin may be measured through the bioelectrodes 105 and 110 . In one embodiment, the bioelectrode may be a neural electrode. The first biosignal HPFip may be detected through the electrode 105 of the first polarity, and the second biosignal HPFin may be detected through the electrode 110 of the second polarity.

The pre-processing circuit 140 performs high-pass filtering on each of the first biosignal HPFip of the first polarity and the second biosignal HPFin of the second polarity, and the high-pass filtered first biosignal ( IAip) and the high-pass filtered second biosignal IAin may be amplified to process the biosignal into a state suitable for spike detection. The preprocessing circuit 140 may include a high pass filter 115 and an amplifier 120 . In one embodiment, the pre-processing circuit 140 performs a low frequency on the first bio-signal HPFip detected through the positive bio-electrode 105 and the second bio-signal HPFip detected through the negative bio-electrode 110. Components are removed, and the first bio-signal IAip from which low-frequency components are removed and the second bio-signal IAin from which low-frequency components are removed may be amplified. When the spike detection device 100 is used outside the body, the bioelectrodes 105 and 110 can measure biosignals such as ECG, EEG, and PPG, and when the spike detection device 100 is used inside the body, Electrodes 105 and 110 may measure nerve signals and the like.

In one embodiment, the baseline signal extraction circuit 125 may include a low pass filter. The baseline signal extraction circuit 125 uses a low-pass filter to amplify the first physiological signal IAip from which the low-frequency component has been removed in the pre-processing circuit 140, and the first input signal INP1 and the low-frequency component are amplified. A spike voltage of the second input signal INN1 generated by amplifying the removed second physiological signal IAin may be removed, and a base line signal corresponding to the base line voltage may be extracted. The baseline signal extracting circuit 125 includes a first baseline signal INN2 including the baseline component of the first input signal INP1 and a second baseline signal INN2 including the baseline component of the second input signal INN1. Signal INP2 can be extracted.

In one embodiment, the comparison circuit 130 includes four input terminals, through each terminal a first input signal (INP1), a second input signal (INN1), a first baseline signal (INN2) and a second input signal (INN2) The baseline signal INP2 may be input to the comparison circuit 130 . The comparison circuit 130 may output a result signal including a spike component based on the first input signal, the second input signal, the first baseline signal, and the second baseline signal.

The comparison circuit may include a comparator including a first input terminal and a second input terminal. When the signal input to the first input terminal is greater than the signal input to the second input terminal, the comparator outputs the signal in the first state as a result signal, and the signal input to the second input terminal is input to the first input terminal. When greater than the signal, the signal in the second state may be output as a resultant signal.

In one embodiment, the first combined signal between the first input signal INP1 and the second baseline signal INP2 is input to the first input terminal of the comparator, and the second input signal INN1 to the second input terminal of the comparator. ) and the first baseline signal INN2 may be input. A combined signal from which the baseline components are removed may be obtained by cross-summing the baseline signals of the signals having opposite polarities with each other. The comparator outputs the signal in the first state as a resultant signal when the first combined signal is greater than the second combined signal, and outputs the signal in the second state as the resultant signal when the second combined signal is greater than the first combined signal. can be output as

In one embodiment, the comparison circuit 130 may combine an offset signal with the first combined signal and the second combined signal to generate a third combined signal and a fourth combined signal, and adjust the combined offset signal to generate a third combined signal. Offset voltages of the combination signal and the fourth combination signal may be adjusted. In one embodiment, the offset voltage may be determined by adjusting the size of a MOSFET included in the comparison circuit 130 . A third combined signal obtained by combining the first combined signal and the first offset signal is input to the first input terminal of the comparator, and a fourth combined signal obtained by combining the second combined signal and the second offset signal is input to the second input terminal of the comparator. can be entered. In one embodiment, the comparison circuit 130 may further include a first control terminal for adjusting the first offset signal and a second control terminal for adjusting the second offset signal. Even when the first combination signal and the second combination signal are input to the comparator, spike signals may be detected, but all spike signals may not be detected in some cases. The spike signal may be detected with higher accuracy by inputting the third combined signal and the fourth combined signal to which an appropriate offset voltage is applied to the comparator. This will be described below with reference to FIGS. 5 and 6 .

2 is a diagram illustrating an output signal of a preprocessing circuit of a spike detection device according to an embodiment, and FIG. 3 is a diagram for explaining a comparison circuit of a spike detection device according to an embodiment.

Referring to FIG. 2 , a first input signal INP1 and a second input signal INN1 are illustrated. The first input signal INP1 may correspond to the first input signal INP1 of FIG. 1 , and the second input signal INN1 may correspond to the second input signal INN1 of FIG. 1 .

According to an exemplary embodiment, the first input signal INP1 and the second input signal INN1 pass through a high-pass filter of a pre-processing circuit, and then amplify the amplified base line voltages Vb and -Vb, the common mode voltage Vc, and the spike It can be expressed as spike voltages (Vp, -Vp) corresponding to neural signals. The first input signal INP1 and the second input signal INN1 are expressed as follows.

Here, IAop denotes the first input signal INP1, IAon denotes the second input signal INN1, Vc denotes a common mode voltage, Vb denotes a baseline voltage, and Vp denotes a spike voltage.

In order to reduce the power and area of the spike detection device, the first input signal INP1 and the second input signal INN1 are directly input to the comparator 340 without using an analog-to-digital converter or an envelope detector. Although the spike can be detected, in this case, as shown in Equation 2, the baseline voltages (Vb, -Vb) remain as a result of comparing the two signals, making it difficult to extract the spike voltages (Vp, -Vp).

Here, IAop denotes the first input signal INP1, IAon denotes the second input signal INN1, Vb denotes a baseline voltage, and Vp denotes a spike voltage.

Baseline components corresponding to the baseline voltages (Vb, -Vb) in the signal input to the comparator 340 before the comparator 340 is input so that the output result of the comparator 340 does not include the baseline voltages (Vb, -Vb). can be removed

Referring to FIG. 3 , in one embodiment, the comparison circuit 330 includes four input terminals, and through each terminal, a first input signal INP1, a second input signal INN1, and a first baseline signal INN2 and the second baseline signal INP2 may be input to the comparison circuit 330 . The comparison circuit 330 may correspond to the comparison circuit 130 of FIG. 1 .

In one embodiment, the first baseline signal Vb including the baseline component of the first input signal INP1 and the second baseline signal Vb including the baseline component of the second input signal INN1 (-Vb) ) can be extracted by the baseline signal extraction circuit. The first input signal INP1, the second input signal INN1, the second baseline signal -Vb, and the first baseline signal Vb may be expressed as Equation 3.

Here, INP1 is the first input signal (INP1), INN1 is the second input signal (INN1), INP2 is the second baseline signal (-Vb), and INN2 is the first baseline signal (Vb). Here, Vc is the common mode voltage, Vb is the baseline voltage, and Vp is the spike voltage. The first baseline signal Vb and the second baseline signal -Vb may correspond to the first baseline signal INN2 and the second baseline signal INP2 of FIG. 1 , respectively.

The first input signal INP1, the second baseline signal -Vb, the first baseline signal Vb, and the second input signal INN1 may be input through four terminals of the comparison circuit 330. .

In one embodiment, the first combined signal 320 between the first input signal INP1 and the second baseline signal INP2 is input to the first input terminal of the comparator 340, and the second input signal 320 of the comparator 340 is input. A second combination signal 325 between the second input signal INN1 and the first baseline signal INN2 may be input to the input terminal. The first combined signal 320 and the second combined signal 325 may be expressed as Equation 4.

Here, CMPip means the first combined signal 320, CMPin means the second combined signal 325, INP1 means the first input signal INP1, INP2 means the second baseline signal (-Vb), and INN1 means the second The input signals INN1 and INN2 mean the first baseline signal Vb. Here, Vc is the common mode voltage and Vp is the spike voltage. The first combined signal 320 and the second combined signal 325 may be signals from which a baseline component is removed, and the spike voltage Vp may be more accurately detected through the comparator 340 .

The first combination signal 320 and the second combination signal 325 may be input to the comparator 340 . The comparator 340 may compare the first combination signal 320 and the second combination signal 325 as shown in Equation 5. In one embodiment, comparator 340 may be an operational amplifier.

Here, CMPip denotes the first combined signal 320, CMPin denotes the second combined signal 325, Vc denotes the common mode voltage Vc, and Vp denotes the spike voltage Vp.

When the first combination signal 320 is greater than the second combination signal 325 according to the comparison result, the comparator 340 outputs the signal in the first state as the result signal CMPo, and the second combination signal 325 is When greater than the first combined signal 320 , the signal in the second state may be output as the resultant signal CMPo. The spike detection device includes a pre-processing circuit, a baseline signal extraction circuit, and a comparator circuit, so that it does not use power consuming and bulky buffers, PGAs (Programmable Gain Amplifiers), analog-to-digital converters, and envelope detectors. Since the spike component of can be detected, power reduction and miniaturization can be achieved.

In one embodiment, a third combination signal between the first combination signal and the first offset signal is input to the first input terminal of the comparator, and a second combination signal between the second combination signal and the second offset signal is input to the second input terminal of the comparator. 4 combined signals can be input. As the offset signal is coupled to the first combination signal 320 and the second combination signal 325, the third combination signal and the fourth combination signal may include an offset voltage.

The comparator outputs a signal in the first state as a resultant signal CMPo when the third combined signal is greater than the fourth combined signal, and outputs a signal in the second state when the fourth combined signal is greater than the third combined signal. It can be output as a signal (CMPo).

The comparator circuit 330 further includes a first terminal for adjusting the first offset signal coupled with the first combined signal 320 and a second terminal for adjusting the second offset signal coupled with the second combined signal 325. can do. The spike signal may be detected with higher accuracy by inputting the combined signal in which the offset signal is coupled to the comparator 340 .

4 shows a circuit diagram of a comparison circuit of a spike detection device according to one embodiment.

Referring to FIG. 4 , a configuration 430 of a comparator circuit is shown. The comparison circuit according to an embodiment includes P-channel metal oxide semiconductors (P1N, P2N, P3N, P1P, P2P, and P3P) connected in parallel and N-channel metal oxide semiconductors (NMOS) composed of mirror circuits (N1N, N2N). , N1P, N2P). The NMOSs N1N, N2N, N1P, and N2P may be connected in series with the PMOSs P1N, P2N, P3N, P1P, P2P, and P3P connected in parallel. In one embodiment, the sizes of the PMOSs P1N, P2N, P1P, and P2P may be the same. The sizes of the NMOSs N2N and N2P may be variable, and hysteresis characteristics of the comparison circuit may be determined according to the sizes of the NMOSs N2N and N2P. The comparison circuit may include terminals for inputting input signals INN1, INN2, VC1, VC2, INP1, and INP2 input to gates of the PMOSs P1N, P2N, P3N, P1P, P2P, and P3P. The input signals INN1 , INN2 , INP1 , and INP2 may correspond to the signals INN1 , INN2 , INP1 , and INP2 of FIG. 3 .

The input signals INN1 , INN2 , VC1 , VC2 , INP1 , and INP2 may be input as bias voltages to gates of the PMOSs P1N , P2N , P3N , P1P , P2P , and P3P. By combining the first input signal INP1 and the second baseline signal INP2 in the comparator circuit, a first combined signal that is an output voltage signal that is not affected by the first baseline signal may be generated.

When the second input signal INN1 and the first baseline signal INN2 are combined, a second combined signal, which is an output voltage signal not affected by the second baseline signal, may be generated.

By connecting the PMOSs P3N and P3P to the PMOSs P1N, P2N, P1P, and P2P in parallel, the first offset signal VC1 is combined with the first combination signal to generate a third combination signal to which an offset voltage is added. Then, a fourth combined signal to which an offset voltage is added may be generated by combining the second offset signal VC2 with the second combined signal. The comparison circuit may further include two input terminals for inputting the offset signals VC1 and VC2 to the PMOSs P3N and P3P. Offset voltages of the third combination signal and the fourth combination signal may be adjusted by adjusting the offset signals VC1 and VC2 . The first offset signal VC1 and the second offset signal VC2 may be adjusted respectively. The sizes of the PMOSs P3N and P3P may be variable. An offset voltage added to the output terminal may be determined according to the size of the PMOSs P3N and P3P.

In another embodiment, the comparator circuit may operate using the first combined signal and the second combined signal without PMOSs P3N and P3P.

In one embodiment, the output voltage VOP or output voltage VON of FIG. 4 may correspond to the resultant signal CMPo of FIG. 3 .

The implementation circuit diagram of the input terminal of the comparison circuit shown in FIG. 4 is only an example, and may be configured with other types of circuits that perform the same function as the comparison circuit. For example, the comparator circuit may be implemented using BJTs.

5 is a diagram illustrating an input signal and an output signal of a comparator of a spike detection device according to an embodiment, and FIG. 6 is a diagram illustrating an input signal and an output signal obtained by combining an offset signal of a comparator of a spike detection device according to an embodiment. It is a drawing showing

Referring to FIG. 5 , a first combined signal 520 input to the first input terminal of the comparator, a second combined signal 525 input to the second input terminal of the comparator, and a resultant signal CMPo output from the comparator are is shown The first combination signal 520 may correspond to the first combination signal 320 of FIG. 3 , the second combination signal 525 may correspond to the second combination signal 325 of FIG. 3 , and the resulting signal (CMPo) may correspond to the resultant signal (CMPo) of FIG. 3 .

In FIG. 5 , since the first combination signal is always greater than the second combination signal, the comparator always outputs the resultant signal CMPo in the first state. In an embodiment, the result signal CMPo in the first state may be a signal corresponding to logic high (HIGH) and the result signal CMPo in the second state may be a signal corresponding to logic low (LOW). In FIG. 4, when the PMOSs P3N and P3P are turned off or the currents generated by the PMOSes P3N and P3P are the same, the first combined signal is always greater than the second combined signal, so the comparator circuit properly detects the spike signal. may not be able to

Referring to FIG. 6 , the third combined signal 620 input to the first input terminal of the comparator, the fourth combined signal 625 input to the second input terminal of the comparator, and the resultant signal CMPo output from the comparator are is shown

4 and 6, the offset voltage difference 610 between the third combination signal 620 and the fourth combination signal 625 by appropriately adjusting the offset signals VC1 and VC2 and the PMOSs P3N and P3P. can form The fourth combined signal 625 serves as a threshold value in relation to the third combined signal 620, and when the third combined signal 620 is greater than the fourth combined signal 625, the comparator has a first state value. is output as the resultant signal CMPo.

By combining the offset signals to generate a third combined signal 620 and a fourth combined signal 625 and comparing the two signals, the comparison circuit can be configured to be robust to noise.

7 is a flowchart illustrating a spike detection method according to an exemplary embodiment. The spike detection method may be performed by a spike detection device.

Referring to FIG. 7 , in step 710, the spike detection device extracts a first baseline signal including a baseline component of a first physiological signal from the first input signal, and extracts a second baseline signal from the second input signal. A second baseline signal including a baseline component of the biosignal may be extracted.

In operation 720, the spike detection device may output a result signal including a spike component based on the first input signal, the second input signal, the first baseline signal, and the second baseline signal.

In one embodiment, the spike detection device performs high-pass filtering on each of the first bio-signal of the first polarity and the second bio-signal of the second polarity, amplifies the high-pass filtered first bio-signal, and steps The second input signal of step 710 may be generated by generating the first input signal of step 710 and amplifying the high-pass filtered second biosignal.

The spike detection device extracts a first baseline signal including a baseline component of the first input signal from the first input signal, and extracts a second baseline signal including a baseline component of the second input signal from the second input signal. A baseline signal can be extracted. The first input signal, the second input signal, the first baseline signal, and the second baseline signal correspond to the first input signal INP1, the second input signal INN1, and the first baseline signal INP2 of FIG. 1 , respectively. and the second baseline signal INP1. The first baseline signal and the second baseline signal may be extracted using low pass filtering.

The spike detection device may output a result signal including a spike component based on the first input signal, the second input signal, the first baseline signal, and the second baseline signal. The spike detection device may generate a first combined signal by combining the first input signal and the second baseline signal and generate a second combined signal by combining the second input signal and the first baseline signal. The spike detection device compares the generated first combined signal and the second combined signal and outputs a signal in a first state as a result signal when the first combined signal is greater than the second combined signal, and the second combined signal is the first combined signal. When greater than the combined signal, the signal in the second state may be output as a resultant signal.

In an embodiment, the spike detection device may generate a third combined signal obtained by combining a first combined signal with a first offset signal, and generate a fourth combined signal obtained by combining a second combined signal with a second offset signal. . The first combination signal and the second combination signal may respectively correspond to the first combination signal 320 and the second combination signal 325 of FIG. It may correspond to the combined signal 620 and the fourth combined signal 625 . The spike detection device compares the third combined signal and the fourth combined signal, outputs a signal in the first state as a result signal when the third combined signal is greater than the fourth combined signal, and the fourth combined signal is the third combined signal. If it is greater than , the signal of the second state may be output as a resultant signal. The result signal may correspond to the result signal CMPo of FIG. 6 . The spike detection apparatus may detect the spike component in a noise-robust manner by comparing the third combined signal and the fourth combined signal to which the offset signal is combined.

The embodiments described above may be implemented as hardware components, software components, and/or a combination of hardware components and software components. For example, the devices, methods and components described in the embodiments may include, for example, a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate (FPGA). array), programmable logic units (PLUs), microprocessors, or any other device capable of executing and responding to instructions. The processing device may execute an operating system (OS) and software applications running on the operating system. A processing device may also access, store, manipulate, process, and generate data in response to execution of software. For convenience of understanding, there are cases in which one processing device is used, but those skilled in the art will understand that the processing device includes a plurality of processing elements and/or a plurality of types of processing elements. It can be seen that it can include. For example, a processing device may include a plurality of processors or a processor and a controller. Other processing configurations are also possible, such as parallel processors.

Software may include a computer program, code, instructions, or a combination of one or more of the foregoing, which configures a processing device to operate as desired or processes independently or collectively. You can command the device. Software and/or data may be any tangible machine, component, physical device, virtual equipment, computer storage medium or device, intended to be interpreted by or provide instructions or data to a processing device. , or may be permanently or temporarily embodied in a transmitted signal wave. Software may be distributed on networked computer systems and stored or executed in a distributed manner. Software and data may be stored on computer readable media.

The method according to the embodiment may be implemented in the form of program instructions that can be executed through various computer means and recorded on a computer readable medium. The computer readable medium may include program instructions, data files, data structures, etc. alone or in combination, and the program instructions recorded on the medium may be specially designed and configured for the embodiment or may be known and usable to those skilled in the art of computer software. may be Examples of computer-readable recording media include magnetic media such as hard disks, floppy disks and magnetic tapes, optical media such as CD-ROMs and DVDs, and magnetic media such as floptical disks. - includes hardware devices specially configured to store and execute program instructions, such as magneto-optical media, and ROM, RAM, flash memory, and the like. Examples of program instructions include high-level language codes that can be executed by a computer using an interpreter, as well as machine language codes such as those produced by a compiler.

The hardware device described above may be configured to operate as one or a plurality of software modules to perform the operations of the embodiments, and vice versa.

As described above, although the embodiments have been described with limited drawings, those skilled in the art can apply various technical modifications and variations based on this. For example, the described techniques may be performed in an order different from the method described, and/or components of the described system, structure, device, circuit, etc. may be combined or combined in a different form than the method described, or other components may be used. Or even if it is replaced or substituted by equivalents, appropriate results can be achieved.

Therefore, other implementations, other embodiments, and equivalents of the claims are within the scope of the following claims.

Claims (14)

A spike detection device for detecting spikes in a signal,
A first baseline signal including a baseline component of the first input signal is extracted from the first input signal provided from the first output terminal of the amplifier, and a second input signal provided from the second output terminal of the amplifier a baseline signal extraction circuit for extracting a second baseline signal including a baseline component of the second input signal from; and
and four input terminals to which the first input signal, the second input signal, the first baseline signal, and the second baseline signal are respectively input, and the first input signal and the second input signal are respectively input. A comparison circuit for outputting a resultant signal including a signal and a comparison result between signals based on the first baseline signal and the second baseline signal.
Spike detection device comprising a.
According to claim 1,
High-pass filtering is performed on each of the first bio-signal of a first polarity and the second bio-signal of a second polarity, and the high-pass filtered first bio-signal is amplified to output the first input signal; A pre-processing circuit that amplifies the high-pass filtered second biosignal and outputs the second input signal.
Spike detection device further comprising a.
According to claim 2,
The preprocessing circuit,
a high-pass filter that performs the high-pass filtering; and
The amplifier amplifying the first biosignal and the second biosignal
Spike detection device comprising a.
According to claim 1,
The resulting signal output by the comparison circuit is
Corresponding to a result of comparing a first combined signal between the first input signal and the second baseline signal and a second combined signal between the second input signal and the first baseline signal,
Spike detection device.
delete delete According to claim 1,
The comparison circuit is
A first control terminal for adjusting the first offset signal and a second control terminal for adjusting the second offset signal
Spike detection device comprising a.
According to claim 1,
The baseline signal extraction circuit,
extracting the first baseline signal into the first input signal and the second baseline signal of the second input signal using low pass filtering;
Spike detection device.
In the spike detection method performed by the spike detection device,
A first baseline signal including a baseline component of the first input signal is extracted from the first input signal by a baseline signal extraction circuit included in the spike detection device, and the first baseline signal is extracted from the second input signal. extracting a second baseline signal including a baseline component of the second input signal; and
A result signal including a comparison result between signals based on the first input signal, the second input signal, the first baseline signal, and the second baseline signal by a comparison circuit included in the spike detection device Including the step of outputting,
The first input signal is provided from a first output terminal of an amplifier included in the spike detection device,
The second input signal is provided from a second output terminal of the amplifier,
The outputting step is
outputting the resulting signal using the comparison circuit having four input terminals to which the first input signal, the second input signal, the first baseline signal, and the second baseline signal are respectively input;
Spike detection method comprising a.
According to claim 9,
By the pre-processing circuit included in the spike detection device,
performing high-pass filtering on each of the first biosignal of the first polarity and the second biosignal of the second polarity;
generating the first input signal by amplifying the high-pass filtered first physiological signal; and
generating the second input signal by amplifying the high-pass filtered second physiological signal;
Spike detection method further comprising a.
According to claim 10,
The resulting signal is
Corresponding to a result of comparing a first combined signal between the first input signal and the second baseline signal and a second combined signal between the second input signal and the first baseline signal,
Spike detection method.
delete delete According to claim 9,
The extraction step is
Extracting the first baseline signal of the first input signal and the second baseline signal of the second input signal using low pass filtering.
Spike detection method.

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