KR102411811B1 - Apparatus and method for buffer control to reduce audio input processing delay - Google Patents

Abstract

A buffer control apparatus and method for reducing audio input processing delay are disclosed. A buffer control method for reducing audio input processing delay performed by a buffer control apparatus for reducing audio input processing delay according to the present invention comprises the steps of allocating a DMA (Direct Memory Access) buffer based on a user's minimum buffer size; After initializing an A/D converter that converts analog sound waves into digital sound wave data, executing an operation of the A/D converter before receiving an audio input request from the user, converting the converted digital sound wave data into the DMA transferring the audio input request to a user buffer, and copying the digital sound wave data stored in the DMA buffer to a user buffer upon reception of the interrupt of the A/D converter in a state in which the audio input request is received, and corresponding to the audio input request. process, comprising sending a buffer pool notification indicating that the user buffer is full.

Description

Buffer control device and method for reducing audio input processing delay

The present invention relates to a buffer control technique for reducing audio input processing delay, and more particularly, to a technique for reducing an initial delay felt by a user by reducing an initial input time in a digital audio device.

The digital audio input device converts an analog sound wave signal into digital sound wave data. At this time, a buffer for storing data is required for digital processing, and a DMA (Direct Memory Access) method in which an analog-to-digital converter directly transfers data to the buffer is used in a general PC.

The analog-to-digital converter transmits the converted digital sound wave data to the DMA buffer (Direct Memory Access Buffer) through the DMA method, and generates an interrupt when the DMA buffer is filled to a certain level or more. When an interrupt occurs, the operating system responds to interrupt reception through the interrupt service routine, copies the contents of the DMA buffer to the user buffer requested by the user, and notifies the application program.

In most cases, the DMA method fills the DMA buffer from the start address to the end whenever data is converted, and continues copying from the start address when the last point of the buffer is reached. At this time, when about 1/2 of the buffer size is full, an interrupt signal is generated so that the interrupt service routine takes the data, and the double buffering method is mainly used while the rest of the buffer is filled while taking the data. do.

In the field of voice communication, when converting an analog sound wave signal into digital sound wave data and copying the digital sound wave data to the user buffer, it is an important issue to enable the user to quickly receive and process the digital sound wave data.

Accordingly, it is necessary to develop a technology capable of reducing the initial delay felt by the user by reducing the initial audio input time.

Korean Patent Registration No. 10-1335975, Announced on December 04, 2013 (Title: Method for Reformatting Multiple Audio Input Signals)

SUMMARY OF THE INVENTION It is an object of the present invention to quickly provide digital sound wave data converted in a digital audio input device.

Another object of the present invention is to reduce an initial delay felt by a user by reducing an audio initial input time.

Another object of the present invention is to minimize playback delay and transmission delay in applications and systems such as real-time recording or real-time calls.

A buffer control method for reducing audio input processing delay performed by a buffer control apparatus for reducing audio input processing delay according to the present invention for achieving the above object is a direct memory access (DMA) method based on a user's minimum buffer size ) Allocating a buffer, initialize an A/D (Analog-Digital) converter that converts analog sound waves into digital sound wave data, and then execute the operation of the A/D converter before receiving an audio input request from the user transmitting the converted digital sound wave data to the DMA buffer, when receiving the interrupt of the A/D converter while receiving the audio input request, transferring the digital sound wave data stored in the DMA buffer to a user buffer copying, and sending, in a process corresponding to the audio input request, a buffer pool notification indicating that the user buffer is full.

In this case, the step of executing the operation of the A/D converter includes: transmitting the start address and size of the DMA buffer to the A/D converter; so that an interrupt service routine is executed when an interrupt occurs in the A/D converter; The method may include registering an interrupt service routine in the operating system, executing the operation of the A/D converter, and waiting for the user to receive the audio input request.

At this time, when the received audio input request is the first request, the interrupt service routine silences the digital sound wave data before the time point corresponding to the first request, and then the digital sound wave data in the DMA buffer can be copied to the user buffer.

At this time, the interrupt service routine may set the digital sound wave data to be processed in silence based on time information including at least one of a current time, a time when the DMA buffer is filled, and a time when the audio input request is received. have.

In this case, in the step of transferring the digital sound wave data to the DMA buffer, the interrupt may be generated for each size of the user buffer in order to minimize the frequency of occurrence of the interrupt.

In addition, the buffer control apparatus for reducing audio input processing delay according to an embodiment of the present invention includes a DMA buffer allocator for allocating a DMA (Direct Memory Access) buffer based on a user's minimum buffer size, and a digital sound wave for analog sound waves. After initializing the A/D converter that converts data into an A/D converter, before receiving an audio input request from the user, an A/D converter executing unit that executes the operation of the A/D converter, converts the converted digital sound wave data into the DMA A DMA buffer transfer unit that transfers to a buffer, a user buffer copy unit that copies the digital sound wave data stored in the DMA buffer to a user buffer when the interrupt of the A/D converter is received while receiving the audio input request, and the A process corresponding to the audio input request, and includes a notification transmitter that transmits a buffer pool notification indicating that the user buffer is full.

At this time, the A/D converter execution unit transmits the start address and size of the DMA buffer to the A/D converter, and provides an interrupt service routine to the operating system so that the interrupt service routine is executed when an interrupt occurs in the A/D converter. It may register, execute the operation of the A/D converter, and wait for reception of the audio input request from the user.

At this time, when the received audio input request is the first request, the interrupt service routine silences the digital sound wave data before the time point corresponding to the first request, and then the digital sound wave data in the DMA buffer can be copied to the user buffer.

At this time, in order to set the digital sound wave data to be processed in silence, a data request processing unit for storing time information including at least one of a current time, a time at which the DMA buffer is filled, and a time at which the audio input request is received may include more.

In this case, the DMA buffer transfer unit may generate the interrupt for each size of the user buffer in order to minimize the occurrence frequency of the interrupt.

According to the present invention, it is possible to quickly provide digital sound wave data converted by a digital audio input device.

In addition, according to the present invention, by reducing the initial audio input time, it is possible to reduce the initial delay felt by the user.

In addition, according to the present invention, it is possible to minimize playback delay and transmission delay in applications and systems such as real-time recording or real-time calls.

1 is a diagram schematically illustrating an environment to which a buffer control apparatus for reducing delay in processing an audio input according to an embodiment of the present invention is applied.
2 is a block diagram illustrating a configuration of a buffer control apparatus for reducing delay in processing an audio input according to an embodiment of the present invention.
3 is a flowchart illustrating a buffer control method for reducing audio input processing delay according to an embodiment of the present invention.
4 is a flowchart for explaining a method of operating a buffer control system for reducing audio input processing delay according to an embodiment of the present invention.
5 is a flowchart illustrating a method of operating an A/D converter according to an embodiment of the present invention.
6 is a flowchart illustrating a DMA buffer allocation process according to an embodiment of the present invention.
7 is a flowchart illustrating an operation method of an interrupt service routine according to an embodiment of the present invention.
8 is a flowchart illustrating a process of calling the DMA buffer copy routine in step S790 of FIG. 7 .
9 is a block diagram illustrating a computer system according to an embodiment of the present invention.

Since the present invention can have various changes and can have various embodiments, specific embodiments are illustrated in the drawings and described in detail.

However, this is not intended to limit the present invention to specific embodiments, and it should be understood to include all modifications, equivalents and substitutes included in the spirit and scope of the present invention.

The terms used in the present application are only used to describe specific embodiments, and are not intended to limit the present invention. The singular expression includes the plural expression unless the context clearly dictates otherwise. In the present application, terms such as “comprise” or “have” are intended to designate that a feature, number, step, operation, component, part, or combination thereof described in the specification exists, but one or more other features It should be understood that this does not preclude the existence or addition of numbers, steps, operations, components, parts, or combinations thereof.

Unless defined otherwise, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in a commonly used dictionary should be interpreted as having a meaning consistent with the meaning in the context of the related art, and should not be interpreted in an ideal or excessively formal meaning unless explicitly defined in the present application. does not

Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the accompanying drawings. In describing the present invention, in order to facilitate the overall understanding, the same reference numerals are used for the same components in the drawings, and duplicate descriptions of the same components are omitted.

1 is a diagram schematically illustrating an environment to which a buffer control apparatus for reducing delay in processing an audio input according to an embodiment of the present invention is applied.

As shown in FIG. 1 , the A/D converter 110 converts an analog sound wave 10 into digital sound wave data 20 . And the A/D converter 110 transfers the digital sound wave data 20 to the DMA buffer 120 through the DMA method.

When the DMA buffer 120 is filled over a certain level, the A/D converter 110 generates an interrupt. When an interrupt occurs, the operating system makes an interrupt reception response through the interrupt service routine, copies the contents of the DMA buffer 120 to the user buffer 130 requested by the user, and notifies the user.

The buffer control system for reducing audio input processing delay performs a preparation process for starting audio input, a process of converting an analog input to digital, and a process of providing data accumulated over a certain amount to a user.

In the preparation process for starting the audio input, the DMA buffer 120 is allocated, the A/D converter 110 is initialized, the A/D converter 110 operation is set, and the A/D converter operation start is requested. do. And the A/D converter 110 receiving the operation start request converts the analog sound wave 10 into the digital sound wave data 20 .

And in the process of converting the analog input to digital, the A/D converter 110 transfers data to the DMA buffer 120 , and the A/D converter 110 generates an interrupt.

In addition, in the process of providing data accumulated over a certain amount to the user, the operating system receives an interrupt, executes an interrupt service routine according to its own scheduling policy, and transfers data from the DMA buffer 120 to the user buffer 130 in the interrupt service routine. copy to In addition, the operating system transmits a buffer full notification (BufferFullNotify) notifying that the user buffer 130 is full to the process requesting recording to the user buffer 130 .

In digital systems, buffers are mainly used and data is processed in units of buffers. And to reduce latency in digital systems, it is important to quickly fill a buffer or copy data stored in a buffer quickly.

According to the prior art, when the A/D converter 110 transfers data to the DMA buffer 120 , an initial delay is essential until the buffer is filled. Existing systems mostly use a fixed DMA buffer, so the delay time required to fill the buffer depends on the size of the buffer.

That is, the time it takes to fill the buffer depends on the sampling rate (in Hz), the number of channels (mono = 1 channel, stereo = 2 channels, etc.) and the number of bytes per channel from the time the buffer starts to be filled. It is determined according to (byte unit).

Therefore, the buffer control apparatus 200 for reducing audio input processing delay according to an embodiment of the present invention allocates the DMA buffer 120 according to the size of the buffer requested by the user in the preparation process for starting the audio input, After initialization of the A/D converter 110 is performed, the analog sound wave 10 is converted into digital sound wave data 20 .

That is, the buffer control device 200 for reducing audio input processing delay makes the size of the user buffer 130 to which the user copies data and the size of the DMA buffer 120 match as much as possible, thereby notifying the interrupt generation cycle and buffer pool Adjust the transmission period of (BufferFullNotify). Through this, when an interrupt occurs and the user buffer 130 is filled, the case where the user buffer 130 is not fully filled and the buffer full notification (BufferFullNotify) cannot be transmitted is minimized.

In addition, the buffer control apparatus 200 for reducing audio input processing delay according to an embodiment of the present invention uses the run flag RunFlag in the process of converting the analog input to digital, only when the run flag is ON. Buffer copy is performed. Since the A/D converter 110 is already in operation, the interrupt generation time is earlier than that of the conventional method, so that the time for first transmitting data to the user can be reduced.

In the process of providing the data accumulated over a certain amount to the user, the buffer control apparatus 200 for reducing the delay of audio input processing according to an embodiment of the present invention transfers data prior to the time the user requested the input to the DMA buffer 120 . ), the previous data is converted into silent data and then transmitted to the user buffer 130 .

At this time, the buffer control device 200 for reducing the delay of audio input processing includes a system timer for measuring the current time of the system, and a DMA BufferFill-up time counter which is a memory for storing the time when the DMA buffer 120 is filled. and by using at least one of a User Request Time Saver that is a memory for storing the time when an audio input request is received, it is possible to set data to be converted into silent data.

Hereinafter, a configuration of a buffer control apparatus for reducing audio input processing delay according to an embodiment of the present invention will be described in more detail with reference to FIG. 2 .

2 is a block diagram illustrating a configuration of a buffer control apparatus for reducing delay in processing an audio input according to an embodiment of the present invention.

As shown in FIG. 2 , the buffer control apparatus 200 for reducing audio input processing delay includes a DMA buffer allocator 210 , an A/D converter execution unit 220 , a DMA buffer transfer unit 230 , and a user buffer. It includes a copy unit 240 , a notification transmission unit 250 , and a data request processing unit 260 .

First, the DMA buffer allocator 210 allocates the DMA buffer 120 based on the user's minimum buffer size. In this case, the DMA buffer allocator 210 may allocate the DMA buffer 120 to twice the user's minimum buffer size to enable double buffering.

And the A/D converter execution unit 220 initializes the A/D converter 110 that converts the analog sound wave 10 into the digital sound wave data 20 . In addition, the A/D converter execution unit 220 executes the operation of the A/D converter 110 before receiving an audio input request from the user.

The A/D converter execution unit 220 transfers the start address and size of the DMA buffer 120 to the A/D converter 110 , and executes the interrupt service routine when an interrupt occurs in the A/D converter 110 . Register the interrupt service routine in the operating system. In addition, the A/D converter execution unit 220 may execute the operation of the A/D converter 110 and wait for the user's audio input request to be received.

Here, when the received audio input request is the first request, the interrupt service routine silences the digital sound wave data before the time point corresponding to the first request, and then the digital sound wave data 20 of the DMA buffer 120 may be copied to the user buffer 130 .

In this case, the interrupt service routine may set the digital sound wave data to be processed in silence based on time information including at least one of the current time, the time when the DMA buffer 120 is filled, and the time when the audio input request is received.

The current time is obtained from a system timer that measures the time of the system, and the time when the DMA buffer 120 is filled may be stored in the DMA BufferFill-up time counter, and the time at which the audio input request is received is It may be stored as a data request time value in the User Request Time Saver.

Next, the DMA buffer transfer unit 230 transfers the converted digital sound wave data 20 to the DMA buffer 120 . At this time, the buffer control apparatus 200 for reducing the delay of audio input processing according to an embodiment of the present invention causes an interrupt to occur for each size of the user buffer 130 to minimize the frequency of occurrence of the interrupt and provide the user with the buffer pool. The frequency of sending notifications can be minimized, and the initial buffer delay can be lowered to the level required by the user.

And when the user buffer copy unit 240 receives the interrupt of the A/D converter 110 while receiving the audio input request, the digital sound wave data 20 stored in the DMA buffer 120 is transferred to the user buffer 130 . copy to

As a process corresponding to the audio input request, the notification transmitter 250 transmits a buffer pool notification indicating that the user buffer 130 is full.

Finally, the data request processing unit 260 records time information including at least one of a current time, a time at which the DMA buffer is filled, and a time at which the audio input request is received. At this time, based on the recorded time information, the interrupt service routine can set the digital sound wave data to be processed in silence.

Hereinafter, a buffer control method for reducing audio input processing delay performed by the buffer control apparatus for reducing audio input processing delay according to an embodiment of the present invention will be described in detail with reference to FIGS. 3 to 8 .

3 is a flowchart illustrating a buffer control method for reducing audio input processing delay according to an embodiment of the present invention.

First, the buffer control apparatus 200 for reducing audio input processing delay allocates a DMA buffer ( S310 ).

The buffer control apparatus 200 for reducing audio input processing delay receives the minimum buffer size, which is the minimum buffer size required by the user for processing in the application program, and allocates the DMA buffer based on the minimum buffer size.

In the existing system, when an interrupt occurs and the contents of the DMA buffer are copied to the user buffer, if the user buffer is not filled due to the difference between the user buffer size and the DMA buffer size, it cannot be notified that the buffer is full until the next interrupt cycle. You have to wait, and for this reason, there is a delay.

However, the buffer control apparatus 200 for reducing the delay of audio input processing according to an embodiment of the present invention allocates a DMA buffer to twice the minimum buffer size requested by the user in consideration of double buffering, and thereby the buffer size difference jitter caused by this can be minimized.

In addition, when data is stored in the DMA buffer, an interrupt is generated for each size of the user buffer requested by the user, thereby minimizing the frequency of interrupt generation and the period of notifying the user, and lowering the initial buffer delay.

In addition, the buffer control apparatus 200 for reducing audio input processing delay initializes the A/D converter and executes the operation of the A/D converter (S320).

The buffer control apparatus 200 for reducing audio input processing delay initializes and operates the A/D converter after receiving the DMA buffer. Here, the A/D converter converts an analog sound wave signal into a digital form.

In the existing system, after initializing the A/D converter, the A/D converter is operated when the user actually requests data. However, the buffer control device 200 for reducing audio input processing delay according to an embodiment of the present invention operates the A/D converter from the moment the user prepares to use the audio input device to quickly fill the DMA buffer. make it possible

Next, the buffer control apparatus 200 for reducing audio input processing delay transfers the digital sound wave data converted by the A/D converter to the DMA buffer (S330).

When using the double buffering method, an interrupt occurs when digital sound wave data is stored up to half the size of the entire DMA buffer.

When receiving the interrupt of the A/D converter, the buffer control apparatus 200 for reducing audio input processing delay copies the data of the DMA buffer to the user buffer (S340).

When receiving an audio input request from a user, the buffer control apparatus 200 for reducing audio input processing delay sets a run flag (RunFlag) to ON, copies the contents of the DMA buffer to the user buffer, and provides can

Since the buffer control apparatus 200 for reducing audio input processing delay performs an operation of storing digital sound wave data in the DMA buffer before the user transmits the audio input request, when the user actually transmits the audio input request Previous data may be stored in the DMA buffer.

Therefore, in order to process the data before the request time, the buffer control apparatus 200 for reducing the delay of audio input processing silences the data before the time when the user actually transmits the audio input request from among the digital sound wave data filled in the DMA buffer can be processed with In this case, the buffer control apparatus 200 for reducing audio input processing delay may set data before the time of transmitting the audio input request as silence data and copy it to the user buffer.

It is difficult to distinguish between the section set as silent data and the section in which there is no audio because audio processing is not performed, so even if the data before the time the user actually requested data (the time when the audio input request is transmitted) is set as silent data, There is little impact on users.

And when the user buffer is full, the buffer control apparatus 200 for reducing audio input processing delay transmits a buffer full notification (S350).

The buffer control apparatus 200 for reducing audio input processing delay may transmit a buffer full notification (ButterFullNotify) informing that the user buffer is full to the process requesting recording.

4 is a flowchart for explaining a method of operating a buffer control system for reducing audio input processing delay according to an embodiment of the present invention.

As shown in FIG. 4, the buffer control apparatus 200 for reducing the delay of audio input processing sets the execution flag to OFF (S410), operates the system timer (S415), and initializes the A/D converter ( S420).

The run flag (RunFlag) indicates whether the user has transmitted an audio input request. Before receiving the audio input request from the user, a system timer ( System Timer). Also, the buffer control apparatus 200 for reducing audio input processing delay initializes the A/D converter before executing the A/D converter.

Next, the buffer control apparatus 200 for reducing audio input processing delay allocates a DMA buffer according to a user's request (S425), and transmits information on the DMA buffer to the A/D converter (S430).

The buffer control apparatus 200 for reducing audio input processing delay receives a minimum buffer size from a user and allocates a DMA buffer based on the minimum buffer size. In addition, the buffer control apparatus 200 for reducing audio input processing delay transfers information on the DMA buffer including the start address and size of the DMA buffer to the initialized A/D converter.

The buffer control apparatus 200 for reducing audio input processing delay registers an interrupt service routine in the operating system (S435) and executes the operation of the A/D converter (S440).

The buffer control apparatus 200 for reducing audio input processing delay may register the interrupt service routine in the operating system so that the interrupt service routine is automatically executed when the A/D converter generates an interrupt. The interrupt service routine may perform an operation of copying the contents of the DMA buffer to the user's buffer requested by the user whenever an interrupt is generated from the A/D converter.

In addition, the buffer control apparatus 200 for reducing audio input processing delay waits for the user's audio input request (S445), and when receiving the audio input request, stores the current time of the system timer (S450). Also, the buffer control apparatus 200 for reducing audio input processing delay sets the execution flag to ON ( S455 ).

When receiving an audio input request from a user, the buffer control apparatus 200 for reducing audio input processing delay may store the current time of the system timer in the User Request Time Saver. And by setting the run flag (RunFlag) to ON, the contents of the DMA buffer are copied to the user buffer.

The buffer control apparatus 200 for reducing the delay of audio input processing while performing the buffer copy waits to receive a stop request from the user (S460), and sets the execution flag back to OFF when the stop request is received from the user (S465) ).

When the buffer control apparatus 200 for reducing audio input processing delay receives a request to stop audio input from the user, it sets the run flag (RunFlag) to OFF, and performs the process of copying the contents of the DMA buffer to the user buffer. can stop

5 is a flowchart illustrating a method of operating an A/D converter according to an embodiment of the present invention.

First, the A/D converter 110 waits for reception of an operation start request (S510).

After initialization is performed by the buffer control device 200 for reducing audio input processing delay, the A/D converter 110 may receive an operation start request from the buffer control device 200 for reducing audio input processing delay. have.

And, upon receiving the operation start request, the A/D converter 110 performs A/D conversion, and transfers the converted digital sound wave data to the DMA buffer (S520).

The A/D converter 110 converts analog sound waves into digital sound wave data, and stores the converted digital sound wave data in a DMA buffer. Here, the DMA buffer in which the digital sound wave data is stored may be allocated based on the user's minimum buffer size.

If the 1/2 point of the DMA buffer has not yet been reached (S530 NO), the A/D converter 110 may again perform step S520 to transfer the A/D-converted digital sound wave data to the DMA buffer.

On the other hand, when the 1/2 point of the DMA buffer is reached (S530 Yes), the A/D converter 110 generates an interrupt signal (S540), and continues to transmit digital sound wave data to the DMA buffer (S550).

When an interrupt occurs, the operating system executes the registered interrupt service routine, responds to the interrupt reception, and copies the digital sound wave data stored in the DMA buffer to the DMA buffer.

Then, the A/D converter 110 determines whether the last point of the DMA buffer is reached (S560), and when the last point of the DMA buffer is reached, an interrupt signal is generated (S570).

When digital sound wave data is stored up to the last point of the DMA buffer, the A/D converter 110 generates an interrupt, and the operating system executes an interrupt service routine.

In addition, after generating the interrupt signal, the A/D converter 110 stores digital sound wave data again from the starting point of the DMA buffer (S580).

Until the A/D converter operation end request is received (S590), the A/D converter 110 may repeat the process after step S520 to transfer digital sound wave data to the DMA buffer and generate an interrupt. .

Hereinafter, a process of allocating a DMA buffer in step S310 of FIG. 3 by the buffer control apparatus 200 for reducing audio input processing delay according to an embodiment of the present invention will be described in detail with reference to FIG. 6 .

6 is a flowchart illustrating a DMA buffer allocation process according to an embodiment of the present invention.

First, the buffer control apparatus 200 for reducing audio input processing delay receives the minimum buffer size (S610).

The buffer control apparatus 200 for reducing audio input processing delay receives the minimum buffer size BS, which is the size of the user buffer, from the user, and allocates the DMA buffer according to the minimum buffer size BS input by the user as much as possible.

Due to the characteristics of double buffering, if the time to store digital sound wave data in the 1/2 part of the DMA buffer is longer than the time to copy the contents of 1/2 of the DMA buffer to the user buffer, the data will be damaged due to overwriting of the data can be

Accordingly, the buffer control apparatus 200 for reducing audio input processing delay according to an embodiment of the present invention reflects the minimum buffer size BS received from the user and allocates the DMA buffer.

The buffer control apparatus 200 for reducing audio input processing delay may minimize the initial buffer delay by making the interrupt generation period and the user buffer copy period the same as possible. At this time, the buffer control apparatus 200 for reducing the delay of audio input processing adjusts the size of the DMA buffer in the system so that data is not lost or damaged, thereby reducing the delay and maximally guaranteeing the integrity of audio data. .

Next, the buffer control apparatus 200 for reducing audio input processing delay calculates a DMA time and stores the calculated time information (S620).

The buffer control apparatus 200 for reducing audio input processing delay may calculate a DMA time as shown in Equation 1 below.

[Equation 1]

After calculating the DMA time, the buffer control apparatus 200 for reducing audio input processing delay may store the calculated DMA time in the DMA BufferFill-up Count.

In addition, the buffer control apparatus 200 for reducing audio input processing delay allocates a DMA buffer for testing and a user buffer for testing (S630).

The buffer control apparatus 200 for reducing audio input processing delay may allocate a DMA buffer for testing and a user buffer for testing as a minimum buffer size (BS) that is a buffer size requested by a user.

In addition, the buffer control apparatus 200 for reducing the delay of audio input processing stores the current time of the system in Tcur (S640).

The buffer control apparatus 200 for reducing audio input processing delay transmits the buffer size to the interrupt service routine and stores the current time in Tnow (S650).

The buffer control device 200 for reducing audio input processing delay calls the test mode, transmits information of the minimum buffer size (BS), which is the buffer size requested by the user, to the interrupt service routine, and waits for a response from the interrupt service routine . In addition, when the buffer control apparatus 200 for reducing audio input processing delay receives a response from the interrupt service routine, it stores the current time of the system timer in Tnow.

The buffer control device 200 for reducing audio input processing delay compares the difference between Tnow and Tcur with the DMA BufferFill-up Count value (S660), and when the difference between Tnow and Tcur is smaller than the DMA BufferFill-up Count value, the minimum A DMA buffer is allocated with a size twice the buffer size (S670).

When Tnow-Tcur is less than the DMA BufferFill-up Count value, the buffer control device 200 for reducing audio input processing delay sets the size of the DMA buffer to twice the minimum buffer size (BS), which is the size of the user buffer. You can allocate a buffer.

On the other hand, when the difference between Tnow and Tcur is greater than the DMA BufferFill-up Count value, the buffer control device 200 for reducing audio input processing delay calculates and allocates the DMA buffer size (S680), and calculates the difference between Tnow and Tcur. It is stored in the DMA BufferFill-up Count (S690).

The buffer control apparatus 200 for reducing audio input processing delay may set the size of the DMA buffer as shown in Equation 2 below.

[Equation 2]

Here, the frame rate means a frame rate in Hz units set in the system, and the number of bytes per channel is in bytes.

In FIG. 6, after generating an arbitrary interrupt, the time required for actual copying is tested by allocating a DMA buffer and a user buffer in the interrupt service routine, and the time taken to copy the result value of the DMA buffer to the user buffer can be used as

7 is a flowchart illustrating an operation method of an interrupt service routine according to an embodiment of the present invention.

The buffer control apparatus 200 for reducing audio input processing delay stores the current time of the system timer in Ttemp (S710).

And the buffer control device 200 for reducing the delay of audio input processing determines whether the currently called mode is the test mode (S720), and if it is the test mode, stores the contents of the test DMA buffer in the test user buffer ( S730).

In the test mode for measuring the data copy time between the DMA buffer and the user buffer, the buffer control device 200 for reducing audio input processing delay stores the contents of the DMA buffer for testing in the user buffer for testing, may end the execution of the process.

On the other hand, if it is not in the test mode, the buffer control apparatus 200 for reducing audio input processing delay responds to the interrupt reception (S740) and determines whether the execution flag is OFF (S750).

When an interrupt is generated because data is stored in 1/2 of the DMA buffer, the buffer control device 200 for reducing audio input processing delay checks a run flag (RunFlag) to determine whether an audio input request has been received from the user. check whether

When the execution flag is OFF, the buffer control apparatus 200 for reducing audio input processing delay ends the execution of the interrupt service routine of FIG. 7 ( S750 No).

When the execution flag is OFF, that is, when the user's audio input request is not received, the buffer control apparatus 200 for reducing audio input processing delay may end the process of FIG. 7 .

When the execution flag is ON, the buffer control apparatus 200 for reducing the delay of audio input processing determines whether the data request time value is greater than 0 (S760), and if it is less than 0, the DMA buffer copy is performed (S770) .

When the execution flag is ON, that is, when an audio input request is received from the user, the buffer control apparatus 200 for reducing audio input processing delay copies the contents of the DMA buffer to the user buffer. In this case, the process of the buffer control apparatus 200 for reducing the delay of audio input processing to copy the contents of the DMA buffer to the user buffer is the same as the existing double buffering method.

Also, the buffer control apparatus 200 for reducing audio input processing delay may check whether a data request time value (User Request Time Saver) is greater than 0 in order to check whether the corresponding audio input request is an initial request.

If the audio input request is not the first request, the data request time value is 0. Accordingly, the buffer control apparatus 200 for reducing audio input processing delay may perform step S770 when the data request time value is 0 or less.

When the data request time value is greater than 0, the buffer control apparatus 200 for reducing audio input processing delay sets the byte to be deleted and processes the byte to be deleted as silence (S780).

The buffer control apparatus 200 for reducing audio input processing delay calculates Tdur as shown in Equation 3 below, and sets Byte-to-delete as shown in Equation 4 .

[Equation 3]

[Equation 4]

Byte-to-delete =

Then, the buffer control apparatus 200 for reducing audio input processing delay calls the DMA buffer copy routine (S790) and resets the data request time value (S800).

When the audio input request is the first request, the value of the data request time value (User Request Time Saver) is not 0. In addition, the buffer control apparatus 200 for reducing audio input processing delay uses a data request time value in which the time when an audio input request is received is recorded, and a time when the interrupt service routine is called when the data is filled, so that the user requests an audio input Set the data before transmission to the byte to be deleted.

In addition, the buffer control apparatus 200 for reducing the delay of audio input processing fills the data set as the bytes to be deleted with data indicating silence, and resets the data request time value to 0. In the subsequent process, through steps S780 to S800 You can prevent the initial data deletion process from being performed.

8 is a flowchart illustrating a process of calling the DMA buffer copy routine in step S790 of FIG. 7 .

In FIG. 8 , the first interrupt means an interrupt that occurs when the DMA buffer from the start address of the DMA buffer to half the size of the DMA buffer is filled in the double buffering method, and the second interrupt refers to the half point of the DMA buffer. It means an interrupt that occurs when the entire DMA buffer is filled with the start address.

First, the buffer control apparatus 200 for reducing audio input processing delay checks whether it is the first interrupt (S810), and in case of the first interrupt, silences the byte to be deleted from the DMA buffer start address (S820).

In addition, the buffer control apparatus 200 for reducing audio input processing delay copies half of the size of the DMA buffer from the DMA buffer start address to the user buffer (S830).

On the other hand, in the case of the second interrupt instead of the first interrupt (S810 No), the buffer control device 200 for reducing audio input processing delay silences the byte to be deleted from the DMA buffer start address + 1/2 of the DMA buffer size. process (S840).

In addition, the buffer control apparatus 200 for reducing audio input processing delay copies data as much as 1/2 of the DMA buffer size from the DMA buffer start address + 1/2 of the DMA buffer size to the user buffer ( S850 ).

At this time, the method of processing the byte to be deleted as silence in steps S820 and S840 differs depending on the method of converting audio data, and the byte to be deleted is selected using the silence value specified in the conversion algorithm such as A-law and u-law. It can be handled silently.

9 is a block diagram illustrating a computer system according to an embodiment of the present invention.

Referring to FIG. 9 , an embodiment of the present invention may be implemented in a computer system 900 such as a computer-readable recording medium. As shown in FIG. 9 , the computer system 900 includes one or more processors 910 , a memory 930 , a user interface input device 940 , and a user interface output device 950 that communicate with each other via a bus 920 . and storage 960 . In addition, computer system 900 may further include a network interface 970 coupled to network 980 . The processor 910 may be a central processing unit or a semiconductor device that executes processing instructions stored in the memory 930 or storage 960 . The memory 930 and the storage 960 may be various types of volatile or non-volatile storage media. For example, the memory may include ROM 931 or RAM 932 .

Accordingly, the embodiment of the present invention may be implemented as a computer-implemented method or a non-transitory computer-readable medium in which computer-executable instructions are recorded. When the computer readable instructions are executed by a processor, the computer readable instructions are capable of performing a method according to at least one aspect of the present invention.

As described above, in the buffer control apparatus and method for reducing audio input processing delay according to the present invention, the configuration and method of the above-described embodiments are not limitedly applicable, but various modifications may be made to the embodiments. All or part of each embodiment may be selectively combined and configured.

10: analog sound wave 20: digital sound wave data
110: A/D converter 120: DMA buffer
130: user buffer
200: Buffer control device for reducing audio input processing delay
210: DMA buffer allocation unit 220: A / D converter execution unit
230: DMA buffer transfer unit 240: user buffer copy unit
250: notification transmitter 900: computer system
910: processor 920: bus
930: memory 931: ROM
932: ram 940: user interface input device
950: user interface output device
960: storage 970: network interface
980: network

Claims (10)

A buffer control method for reducing audio input processing delay performed by a buffer control device for reducing audio input processing delay, the method comprising:
allocating a direct memory access (DMA) buffer based on the user's minimum buffer size;
After initializing an A/D converter that converts analog sound waves into digital sound wave data, executing an operation of the A/D converter before receiving an audio input request from the user;
transferring the converted digital sound wave data to the DMA buffer;
Copying the digital sound wave data stored in the DMA buffer to a user buffer upon reception of the interrupt of the A/D converter in a state in which the audio input request is received, and
sending, to a process corresponding to the audio input request, a buffer pool notification indicating that the user buffer is full;
The step of executing the operation of the A/D converter,
transmitting the start address and size of the DMA buffer to the A/D converter;
registering the interrupt service routine in the operating system so that the interrupt service routine is executed when an interrupt occurs in the A/D converter; and
and executing the operation of the A/D converter and waiting for the user to receive the audio input request. delete The method according to claim 1,
The interrupt service routine is
When the received audio input request is the first request, the digital sound wave data before the time corresponding to the first request is silenced, and then the digital sound wave data in the DMA buffer is copied to the user buffer. Buffer control method to reduce input processing delay. 4. The method according to claim 3,
The interrupt service routine is
Buffer for reducing audio input processing delay for setting the digital sound wave data to be processed in silence based on time information including at least one of a current time, a time when the DMA buffer is filled, and a time when the audio input request is received control method. The method according to claim 1,
The step of transferring the digital sound wave data to the DMA buffer comprises:
A buffer control method for reducing audio input processing delay in which the interrupt is generated for each size of the user buffer in order to minimize the frequency of occurrence of the interrupt. a DMA buffer allocator for allocating a DMA (Direct Memory Access) buffer based on the user's minimum buffer size;
an A/D converter executing unit that initializes an A/D converter that converts analog sound waves into digital sound wave data, and then executes an operation of the A/D converter before receiving an audio input request from the user;
a DMA buffer transfer unit transferring the converted digital sound wave data to the DMA buffer;
a user buffer copy unit for copying the digital sound wave data stored in the DMA buffer to a user buffer upon reception of the interrupt of the A/D converter in a state in which the audio input request is received; and
A process corresponding to the audio input request, comprising a notification transmitter for transmitting a buffer pool notification indicating that the user buffer is full,
The A/D converter execution unit,
transmitting the start address and size of the DMA buffer to the A/D converter;
Register the interrupt service routine in the operating system so that the interrupt service routine is executed when an interrupt occurs in the A/D converter,
Execute the operation of the A/D converter,
A buffer control device for reducing an audio input processing delay waiting for the user to receive the audio input request. delete 7. The method of claim 6,
The interrupt service routine is
When the received audio input request is the first request, the digital sound wave data before the time corresponding to the first request is silenced, and then the digital sound wave data in the DMA buffer is copied to the user buffer. Buffer control device to reduce input processing delay. 9. The method of claim 8,
In order to set the digital sound wave data to be processed as silence, a data request processing unit for storing time information including at least one of a current time, a time at which the DMA buffer is filled, and a time at which the audio input request is received, further comprising a data request processing unit Buffer control device for reducing delay in processing audio input. 7. The method of claim 6,
The DMA buffer transfer unit,
A buffer control apparatus for reducing audio input processing delay for generating the interrupt for each size of the user buffer in order to minimize the frequency of occurrence of interrupts.

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