KR102303502B1 - Light emitting device and light emitting device package having thereof - Google Patents

Abstract

The embodiment relates to a light emitting device.
A light emitting device according to an embodiment includes: a first conductive semiconductor layer having a dopant of a first conductivity type; an active layer disposed on the first conductive semiconductor layer and having a plurality of barrier layers and a plurality of well layers; an electron blocking structure layer disposed on the active layer; and a second conductive semiconductor layer disposed on the electron blocking structure layer, wherein the active layer includes a first barrier layer adjacent to the electron blocking structure layer and a first well layer adjacent to the first barrier layer, wherein The electron blocking structure layer is adjacent to the active layer and includes a first semiconductor layer having a first concentration of a dopant of a second conductivity type and a first composition of aluminum, and a dopant of a second conductivity type having a second concentration on the first semiconductor layer. and a second semiconductor layer having a second composition of aluminum, and a third semiconductor layer having a third concentration of a dopant of a second conductivity type and aluminum of a third composition on the second semiconductor layer, wherein the first to The dopant of the second conductivity type of the third semiconductor layer satisfies the condition of the second concentration > the first concentration > the third concentration, and the aluminum of the first to third semiconductor layers has a first composition > a second composition > a third composition conditions.

Description

A light emitting device and a light emitting device package having the same

The embodiment relates to a light emitting device.

In general, a nitride semiconductor material including a group V source such as nitrogen (N) and a group III source such as gallium (Ga), aluminum (Al), or indium (In) has excellent thermal stability and is a direct transition type energy source. Since it has a band structure, it is widely used as a material for nitride-based semiconductor devices, for example, nitride-based semiconductor light emitting devices in the ultraviolet region and solar cells.

Nitride-based materials have a wide energy bandgap of 0.7eV to 6.2eV, and are widely used as materials for solar cell devices due to their characteristics matching the solar spectrum region.

The embodiment provides a light emitting device in which an electron blocking structure layer having a plurality of semiconductor layers is provided between the barrier layer of the active layer and the second conductive semiconductor layer.

The embodiment provides a light emitting device with improved stress in the electron blocking structure layer.

The embodiment provides a light emitting device in which the concentration of the dopant of the second conductivity type in the electron blocking structure layer is improved.

A light emitting device according to an embodiment includes: a first conductive semiconductor layer having a dopant of a first conductivity type; an active layer disposed on the first conductive semiconductor layer and having a plurality of barrier layers and a plurality of well layers; an electron blocking structure layer disposed on the active layer; and a second conductive semiconductor layer disposed on the electron blocking structure layer, wherein the active layer includes a first barrier layer adjacent to the electron blocking structure layer and a first well layer adjacent to the first barrier layer, wherein The electron blocking structure layer is adjacent to the active layer and includes a first semiconductor layer having a first concentration of a dopant of a second conductivity type and a first composition of aluminum, and a dopant of a second conductivity type having a second concentration on the first semiconductor layer. and a second semiconductor layer having a second composition of aluminum, and a third semiconductor layer having a third concentration of a dopant of a second conductivity type and aluminum of a third composition on the second semiconductor layer, wherein the first to The dopant of the second conductivity type of the third semiconductor layer satisfies the condition of the second concentration > the first concentration > the third concentration, and the aluminum of the first to third semiconductor layers has a first composition > a second composition > a third The composition conditions are satisfied.

A light emitting device package according to an embodiment includes a body having a cavity; a plurality of lead electrodes on the body; and at least one light emitting device among the plurality of lead electrodes, wherein the light emitting device includes the light emitting device of any one of claims 1 to 5.

According to an embodiment, the doping concentration of the dopant of the second conductivity type may be improved by controlling the stress in the electron blocking structure layer.

According to the embodiment, the electrical properties of the electron blocking structure layer may be improved.

According to the embodiment, it is possible to prevent deterioration of the crystallinity of the second conductive semiconductor layer due to the electron blocking structure layer.

According to the embodiment, the peak position of the dopant of the second conductivity type added to the electron blocking structure layer is adjacent to the center region of the electron blocking structure layer from the interface with the second conductive semiconductor layer, so that the hole formed by the electron blocking structure layer is There is an effect that can improve the injection efficiency.

The embodiment may improve the reliability of a light emitting device and a light emitting device package having the same.

1 is a view showing a light emitting device according to an embodiment.
FIG. 2 is a diagram showing an energy band diagram of an active layer and an electron blocking structure layer according to the first embodiment in the light emitting device of FIG. 1 .
(A) of FIG. 3 is the energy band diagram of FIG. 2, and (B) is an analysis of the composition of aluminum and the concentration of the dopant of the second conductivity type in the electron blocking structure layer by secondary-ion mass spectroscopy (SIMS). am.
4 is a partially enlarged view of the electron blocking structure layer of FIG. 3B.
FIG. 5A is an energy band diode gram of the electron blocking layer of FIG. 3 , and FIG. 5B is a diagram showing a doping profile of a dopant of the second conductivity type of the electron blocking layer.
6 is a view showing the stress in the electron blocking structure layer according to the embodiment.
7 is a diagram comparing internal quantum efficiencies according to the indium composition of the first semiconductor layer of the electron blocking structure layer according to the embodiment.
8 is a diagram comparing lattice constants and band gaps of semiconductors according to an embodiment.
9 is a graph comparing relaxation rates according to aluminum compositions in an electron blocking structure layer according to an embodiment.
FIG. 10 is a view illustrating an example in which electrodes are disposed in the light emitting device of FIG. 1 .
11 is a view illustrating another example in which electrodes are disposed in the light emitting device of FIG. 1 .
12 is a side cross-sectional view of a light emitting device package including the light emitting device of FIG. 10 .

In the description of the embodiment, each layer (film), region, pattern or structure is “on/over” or “under” the substrate, each layer (film), region, pad or patterns. )", "on/over" and "under/under" are "directly" or "indirectly" formed through another layer. includes all that is In addition, the criteria for the upper / upper or lower / lower of each layer will be described with reference to the drawings.

<Light emitting element>

1 is a cross-sectional view of a light emitting device according to an embodiment.

Referring to FIG. 1 , the light emitting device according to the embodiment includes a first conductive semiconductor layer 41 , an active layer 51 disposed on the first conductive semiconductor layer 41 , and disposed on the active layer 51 . an electron blocking structure layer 60 , and a second conductive semiconductor layer 71 disposed on the electron blocking structure layer 60 .

The light emitting device may include one or more or all of the semiconductor layer 33 , the buffer layer 31 , and the substrate 21 under the first conductive semiconductor layer 41 .

The light emitting device includes at least a first clad layer 43 between the first conductive semiconductor layer 41 and the active layer 51 and a third conductive semiconductor layer 73 on the second conductive semiconductor layer 71 . may include one or both.

The light emitting device may emit one or a plurality of peak wavelengths within a wavelength range of ultraviolet to visible light. The light emitting device may emit at least one of ultraviolet rays, blue, green, red, and white.

The substrate 21 may be, for example, a light-transmitting, conductive, or insulating substrate. For example, the substrate 21 may include at least one _{of sapphire (Al 2} O ₃ ), SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, and Ga ₂ O _{3 .} A plurality of protrusions (not shown) may be formed on the upper and/or lower surfaces of the substrate 21, and each of the plurality of protrusions includes at least one of a hemispherical shape, a polygonal shape, and an elliptical shape and has a side cross-section. It may be arranged in a form or a matrix form. The protrusion may improve light extraction efficiency.

A plurality of compound semiconductor layers may be grown on the substrate 21 , and equipment for growing the plurality of compound semiconductor layers is an electron beam evaporator, physical vapor deposition (PVD), chemical vapor deposition (CVD), or plasma laser deposition (PLD). , a dual-type thermal evaporator may be formed by sputtering, metal organic chemical vapor deposition (MOCVD), or the like, but is not limited thereto.

A buffer layer 31 may be formed between the substrate 21 and the first conductive semiconductor layer 41 . The buffer layer 31 may be formed of at least one layer using a group II to group VI compound semiconductor. The buffer layer 31 includes a semiconductor layer using a group III-V compound semiconductor, for example, In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y) It can be implemented with a semiconductor material having a compositional formula of ≤1). The buffer layer 31 includes, for example, at least one of a material such as GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and ZnO.

The buffer layer 31 may be formed in a super lattice structure by alternately disposing different semiconductor layers. The buffer layer 31 may be disposed to alleviate a difference in lattice constant between the substrate 21 and the nitride-based semiconductor layer, and may be defined as a defect control layer. The lattice constant of the buffer layer 31 may have a value between the lattice constant between the substrate 21 and the nitride-based semiconductor layer. The buffer layer 31 may not be formed, but is not limited thereto.

The semiconductor layer 33 may be disposed between the buffer layer 31 and the first conductive semiconductor layer 41 . The semiconductor layer 33 may have lower electrical conductivity than the first conductive semiconductor layer 41 .

The semiconductor layer 33 may be an undoped semiconductor layer, and the undoped semiconductor layer may be implemented with a group II to group VI compound semiconductor, for example, a group III-V compound semiconductor. The undoped semiconductor layer may have a lower doping concentration than that of the first conductive semiconductor layer 41 even if it is not intentionally doped with a conductivity type dopant, and has a first conductivity type characteristic. The undoped semiconductor layer may not be formed, but is not limited thereto. The semiconductor layer 33 may include, for example, at least one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. The semiconductor layer 33 may not be formed, but is not limited thereto.

The first conductive semiconductor layer 41 may be disposed between at least one of the substrate 21 , the buffer layer 31 , and the semiconductor layer 33 and the active layer 51 . The first conductive semiconductor layer 41 may be implemented with at least one of a group III-V group and a group II-VI compound semiconductor doped with a first conductive type dopant.

The first conductive semiconductor layer 41 is formed of, for example, _{a semiconductor material having a composition formula of In x} Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). can be The first conductive semiconductor layer 41 may include, for example, at least one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. The first conductive semiconductor layer 41 may be an n-type semiconductor layer doped with an n-type dopant such as Si, Ge, Sn, Se, or Te.

The first conductive semiconductor layer 41 may be disposed as a single layer or a multilayer. The first conductive semiconductor layer 41 may be formed in a superlattice structure in which at least two different layers are alternately disposed. The first conductive semiconductor layer 41 may be an electrode contact layer to which an electrode is in contact.

The first clad layer 43 may be formed of a group III-V or group II-VI compound semiconductor. The first clad layer 43 may be an n-type semiconductor layer having a dopant of a first conductivity type, for example, an n-type dopant. The first cladding layer 43 may include at least one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP, and may include Si, Ge, Sn, Se, Te. The n-type semiconductor layer may be doped with an n-type dopant.

The active layer 51 may be formed of at least one of a single well, a single quantum well, a multi well, a multi quantum well (MQW) structure, a quantum wire (Quantum-Wire) structure, or a quantum dot structure. can

In the active layer 51, electrons (or holes) injected through the first conductive semiconductor layer 41 and holes (or electrons) injected through the second conductive semiconductor layer 71 meet each other, and the active layer ( 51) is a layer that emits light due to the difference in the band gap of the energy band according to the forming material. The active layer 51 may emit at least one peak wavelength of ultraviolet, blue, green, and red.

The active layer 51 may be implemented with a compound semiconductor. The active layer 51 may be implemented, for example, by at least one of a group II-VI group and a group III-V group compound semiconductor.

2 , when the active layer 51 is implemented as a multi-well structure, the active layer 51 includes a plurality of well layers 53 and a plurality of barrier layers 55 . In the active layer 51 , a well layer 53 and a barrier layer 55 are alternately disposed. A pair of the well layer 53 and the barrier layer 55 may have 2 to 30 cycles.

The well layer 53 may be formed of, for example, _{a semiconductor material having a composition formula of In x} Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). . The barrier layer 55 may be formed of, for example, _{a semiconductor material having a composition formula of In x} Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). .

The period of the well layer 53/barrier layer 55 is, for example, InGaN/GaN, GaN/AlGaN, AlGaN/AlGaN, InGaN/AlGaN, InGaN/InGaN, AlGaAs/GaAs, InGaAs/GaAs, InGaP/GaP. , AlInGaP/InGaP, and at least one of a pair of InP/GaAs.

The well layer 53 of the active layer 51 according to the embodiment may be implemented with InGaN, and the barrier layer 55 may be implemented with a GaN-based semiconductor. The indium composition of the well layer 53 has a higher composition than the indium composition of the barrier layer 55 . The barrier layer 55 may have no indium composition, but is not limited thereto. The well layer 53 may have a first band gap G1 . The barrier layer 55 may have a second band gap G2 wider than the first band gap G1 of the well layer 53 .

The barrier layer 55 may have a thickness greater than that of the well layer 53 . The thickness of the well layer 53 may be in the range of 2 nm to 5 nm, for example, 3 nm to 4 nm or 2 nm to 4 nm. When the thickness of the well layer 53 is smaller than the above range, the carrier confinement efficiency is lowered, and when the thickness of the well layer 53 is thicker than the above range, there is a problem in that the carrier is excessively constricted.

The thickness of the barrier layer 55 may be in the range of 4 nm to 20 nm, for example, in the range of 4 nm to 10 nm. When the thickness of the barrier layer 55 is thinner than the above range, electron blocking efficiency is lowered, and when the thickness of the barrier layer 55 is thicker than the above range, there is a problem in that electrons are excessively blocked. According to the thickness of the barrier layer 55 , the wavelength of light, and the quantum well structure, each carrier may be effectively confined to the well layer 53 .

At least one of the plurality of barrier layers 55 may include a dopant, for example, at least one of an n-type and a p-type dopant. The barrier layer 55 may be an n-type semiconductor layer when an n-type dopant is added. When the barrier layer 55 is an n-type semiconductor layer, the injection efficiency of electrons injected into the active layer 51 may be increased.

The active layer 51 includes a first barrier layer (B1) adjacent to the electron blocking structure layer (60), adjacent to the first barrier layer (B1), and has a first conductivity than the first barrier layer (B1) A first well layer W1 close to the semiconductor layer 41 is included. The first barrier layer B1 is disposed between the first well layer W1 and the electron blocking structure layer 60 . The first well layer W1 may be disposed between the first barrier layer B1 and another barrier layer B2. The first barrier layer B1 may have the same thickness or a wider thickness than the other barrier layers B2, but is not limited thereto.

When the substrate 21 and the compound semiconductor layer are made of different materials, stress may be generated at the interface between the layers due to reasons such as differences in thermal expansion coefficient and lattice constant, which may cause defects or energy in the semiconductor layer. Bands may be bent or doping efficiency may be reduced. In the embodiment, the doping efficiency of the dopant of the second conductivity type may be improved by controlling the stress in the electron blocking structure layer 60 .

The electron blocking structure layer 60 includes a multilayer structure. The electron blocking structure layer 60 may include a plurality of semiconductor layers 61 , 63 , and 65 , and the plurality of semiconductor layers 61 , 63 , and 65 may include an AlN-based semiconductor.

The plurality of semiconductor layers 61 , 63 , and 65 may include semiconductors having different aluminum (Al) compositions. The plurality of semiconductor layers 61 , 63 , and 65 may include a semiconductor having a dopant of the second conductivity type of 1E19 cm −3 or more, for example, a semiconductor having a p-type dopant.

The plurality of semiconductor layers 61 , 63 , and 65 include a first semiconductor layer 61 and the first semiconductor layer 61 disposed between the first barrier layer B1 and the second conductive semiconductor layer 71 . ) and a second semiconductor layer 63 disposed between the second conductive semiconductor layer 71, and a third semiconductor layer disposed between the second semiconductor layer 63 and the second conductive semiconductor layer 71 ( 65).

The first semiconductor layer 61 is adjacent to the active layer 51 , for example, in contact with the first barrier layer B1 , and the second semiconductor layer 63 is formed on the first semiconductor layer 61 . The third semiconductor layer 65 may be in contact with the second semiconductor layer 63 and the second conductive semiconductor layer 71 .

The aluminum (Al) of the first semiconductor layer 61 has a first composition, the aluminum of the second semiconductor layer 63 has a second composition, and the aluminum of the third semiconductor layer 65 has a third composition. can The aluminum composition in the first to third semiconductor layers 61 , 63 and 65 satisfies the condition of first composition > second composition > third composition.

The first composition has an average of 40% or more of the aluminum composition, the second composition has an average aluminum composition of 15% to 25%, and the third composition has an aluminum composition of 0% to less than the second composition. can have a range. The third composition may be reduced so that the composition of aluminum is graded stepwise or linearly.

The dopant of the second conductivity type of the first semiconductor layer 61 has a first concentration, the dopant of the second conductivity type of the second semiconductor layer 63 has a second concentration, and the third semiconductor layer 65 has a second concentration. The silver second conductivity type dopant may have a third concentration. The concentration of the first conductive dopant satisfies the condition of second concentration > first concentration > third concentration. The first concentration has an average of less than 1E20 cm -3 of the dopant of the second conductivity type, the second concentration has an average of 1E20 cm -3 or more of the dopant of the second conductivity type, and the third concentration is the amount of the dopant of the second conductivity type Average less than 1E20cm-3 or can be undoped.

The band gap G3 of the first semiconductor layer 61 may be wider than the band gap G5 of the first conductive semiconductor layer 71 and the band gap G2 of the first barrier layer B1 . The band gap G4 of the second semiconductor layer 63 may be narrower than the band gap G3 of the first semiconductor layer 61 , and the band gap G5 of the first conductive semiconductor layer 71 and It may be wider than the band gap G2 of the first barrier layer B1.

The first semiconductor layer 61 may be formed of a semiconductor having a composition higher than the average aluminum composition of the electron blocking structure layer 60 , for example, 40% or more of aluminum.

The first composition of the first semiconductor layer 61 may be at least twice the value of the second composition. Since the first composition is disposed higher than the second composition and the third composition, it is possible to prevent electrons from overflowing. Accordingly, the first semiconductor layer 61 may increase electron blocking efficiency and improve hole injection efficiency.

The first semiconductor layer 61 may include at least one of AlGaN, AlInN, and AlInGaN semiconductors. The thickness of the first semiconductor layer 61 may be 5 nm or less, for example, in the range of 0.5 nm to 5 nm. The thickness of the first semiconductor layer 61 may be different from or thicker than the thickness of the third semiconductor layer 65 . The thickness of the first semiconductor layer 61 may be 10% or less of the thickness of the electron blocking structure layer 60 .

Since the first semiconductor layer 61 has a high aluminum composition, a lattice mismatch of the first barrier layer B1 with a semiconductor, for example, GaN may be improved.

For example, when the first barrier layer 61 is GaN as shown in FIG. 8 , when the first semiconductor layer 61 is grown with AlInN, lattice mismatch is reduced. Here, referring to FIG. 7 , it can be seen that the internal quantum efficiency is improved when the indium (In) composition of the first semiconductor layer 61 is 17%. In the embodiment, when the indium (In) composition of the first semiconductor layer 61 is in the range of 15% to 35%, for example, 16% to 22%, lattice matching to GaN may be provided, and internal quantum efficiency may be improved. have. As shown in FIG. 9 , it can be seen that the higher the aluminum composition of the first semiconductor layer 61, for example, 40% or more, the higher the ratio R of stress relaxation.

Since the first semiconductor layer 61 includes indium and aluminum, a difference in lattice constant between the active layer 51 and the first barrier layer B1 may be reduced.

By providing the thickness of the first semiconductor layer 61 to, for example, 5 nm or less, it is possible to minimize damage due to tensile stress. For example, as the thickness of the first semiconductor layer 61 increases, the doping efficiency of the p-type dopant may not be improved, and the film quality may deteriorate. The thickness of the first semiconductor layer 61 may be provided to allow tunneling. The first semiconductor layer 61 may be defined as a stress relaxation layer or a buffer layer.

The second semiconductor layer 63 may include at least one of AlGaN, AlInN, and AlInGaN semiconductors. The second semiconductor layer 63 may have a smaller aluminum composition than that of the first semiconductor layer 61 , for example, an average of 15% to 25%. A thickness of the second semiconductor layer 63 may be greater than a thickness of the first semiconductor layer 61 . The thickness of the second semiconductor layer 63 may range from 10 nm to 50 nm. When the second semiconductor layer 63 is grown, since the composition of aluminum is reduced, tensile stress may be relaxed, and thus doping efficiency of the p-type dopant may be improved. As the thickness of the second semiconductor layer 63 increases, relaxation of the tensile stress is gradually improved, thereby increasing the doping efficiency of the p-type dopant added to the second semiconductor layer 63 . Accordingly, hole injection efficiency by the second semiconductor layer 63 may be improved.

The third semiconductor layer 65 _{may be formed of a semiconductor having a composition formula of In x} Al _y Ga _1-xy N (0≤x≤1, 0≤y<0.25, 0≤x+y≤1). The thickness of the third semiconductor layer 65 may be in the range of 5 nm to 20 nm.

In order to reduce the difference in lattice constants before the growth of the second conductive semiconductor layer 71, the third semiconductor layer 65 is formed with In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y<0.25). , 0≤x+y≤1) can be grown as a semiconductor. If the third semiconductor layer 65 continues to grow as a semiconductor having the same aluminum composition as the second semiconductor layer 63 , the second conductive semiconductor layer 71 , for example, due to the compressive stress of the GaN semiconductor The doping concentration of the dopant of the second conductivity type is rapidly increased. Due to this, the crystal quality of the interface between the second conductive semiconductor layer 71 and the electron blocking structure layer 60 may be deteriorated.

In the embodiment, when the third semiconductor layer 65 is grown, as shown in FIG. 3B, the composition of aluminum (see P2) is gradually or linearly reduced by grading the second conductive semiconductor layer 71 and can reduce the difference in lattice constant of In addition, when the third semiconductor layer 65 is grown, the doping concentration of the dopant of the second conductivity type may be linearly or gradually reduced or undoped. Accordingly, compressive stress and over-doping of the dopant of the second conductivity type are prevented by the third semiconductor layer 65, thereby reducing the film quality at the interface between the second conductive semiconductor layer 71 and the electron blocking structure layer 60 can prevent

The thickness of the third semiconductor layer 65 may be a thickness capable of minimizing compressive stress due to a material difference between the second semiconductor layer 63 and the second conductive semiconductor layer 71, and even if the thickness is increased, There may be no effect of improving the compressive stress.

3 (A) (B) and 4, when looking at the doping profile p1 of the dopant of the second conductivity type, for example, the p-type dopant, the doping concentration of the p-type dopant is determined by the first semiconductor layer ( 61), it gradually increases to have a peak position P0 in the second semiconductor layer 63 . The peak position P0 may be spaced apart from the interface T1 between the third semiconductor layer 65 and the second conductive semiconductor layer 71 by a predetermined distance D1, for example, at least 1 nm or more. As the peak position P0 is closer to the center of the second semiconductor layer 63, the p-type dopant in the second semiconductor layer 63 may have a uniform distribution, and internal quantum efficiency and rated voltage characteristics may be improved. have.

When the peak position P0 is present at the interface T1 , film quality may be deteriorated, and hole injection efficiency by the electron blocking structure layer 60 may be reduced. If the electron blocking layer is an AlGaN layer, if the elongation stress in the AlGaN layer is not relieved, even if the p-type dopant is constantly flowed, the more the doping profile of the p-type dopant is adjacent to the second conductive semiconductor layer 71 There is an increasing problem. That is, there is a problem in that the peak position of the doping concentration of the p-type dopant exists in the second conductive semiconductor layer 71 . In addition, the higher the aluminum composition of the AlGaN layer, the greater the relaxation stress. As a result, the doping profile of the p-type dopant increases as it approaches the second conductive semiconductor layer 71 . As the doping profile of the AlGaN layer increases as it approaches the second conductive semiconductor layer 71 , the doping efficiency of the p-type dopant of the AlGaN layer may decrease and the hole injection efficiency may also decrease.

In addition, in the doping concentration of the dopant of the second conductivity type in the second semiconductor layer 63 , for example, the p-type dopant, a section D2 of 1E20cm -3 or more on average is a section of 1E19cm -3 or more in the electron blocking structure layer 160 . When set to 1, it can be placed at 20% or more. Among the concentrations of the p-type dopant in the second semiconductor layer 63 , the average region D2 of 1E20 cm −3 or more may be arranged in a range of 30% or more when the thickness of the electron blocking structure layer 160 is 1.

In FIG. 3B , the profile P2 is an aluminum profile, and the profile P3 is a gallium profile. Looking at the aluminum profile P2, it can be seen that the composition of aluminum in the third semiconductor layer 63 is significantly reduced.

In the embodiment, the first semiconductor layer 61 has the minimum tensile stress, and the tensile stress is gradually relaxed due to the decrease in the aluminum composition of the second semiconductor layer 63, so that p in the second semiconductor layer 63 is The implantation efficiency of the type dopant may be improved as the second semiconductor layer 63 increases. Accordingly, the peak position P0 of the dopant of the second conductivity type in the electron blocking structure layer 60 may be disposed in the second semiconductor layer 63 . Also, in the second semiconductor layer 63 , the peak position P0 of the dopant of the second conductivity type moves in a direction closer to the first semiconductor layer 61 than the interface T1 with the third semiconductor layer 65 . can be

3 and 5, by controlling the distribution of the p-type dopant in the electron blocking structure layer 60 (moving from P1' to P1), the peak position of the p-type dopant (moving from P0' to P0) is By moving adjacent to the active layer 51 _{and increasing the section D2 having a level of at least a certain level (PD} ), for example, an average of 1E20cm-3 or higher, the internal quantum efficiency and the rated voltage can be improved.

The embodiment applies a tensile stress to the first semiconductor layer 61 of the electron blocking structure layer 60 and then relieves the tensile stress in the second semiconductor layer 63 to improve the implantation efficiency of the p-type dopant. can In addition, the doping profile of the p-type dopant is distributed in the second semiconductor layer 63 , thereby improving hole injection efficiency.

FIG. 6B is a diagram illustrating stress according to a band gap (FIG. 4A) of the electron blocking structure layer.

In FIG. 6B , tensile stress is generated in the region A1 of the first semiconductor layer 61 by the composition of aluminum, and the composition of aluminum decreases toward the region A2 of the second semiconductor layer 63. The tensile stress is relieved, and the composition of aluminum gradually decreases in the region A3 of the third semiconductor layer 65 . Also, looking at the profile P4 of the p-type dopant, it can be seen that the region A1 of the first semiconductor layer 61 is formed and then the region A2 of the second semiconductor layer 63 is grown. have. Then, the region A3 of the third semiconductor layer 65 is gradually reduced or undoped while growing.

The second conductive semiconductor layer 71 is disposed on the electron blocking structure layer 60 . The second conductive semiconductor layer 71 is disposed between the electron blocking structure layer 60 and the third conductive semiconductor layer 73 .

The second conductive semiconductor layer 71 may be in contact with the third semiconductor layer 65 and may include a GaN-based semiconductor. The second conductive semiconductor layer 71 may include the same semiconductor as the third semiconductor layer 65 . The second conductive semiconductor layer 71 may be a p-type semiconductor layer having a second conductive dopant, for example, a p-type dopant. The second conductive semiconductor layer 71 may include at least one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP, and Mg, Zn, Ca, Sr , and a p-type dopant such as Ba.

The third conductive semiconductor layer 73 may be disposed on the second conductive semiconductor layer 71 . The third conductive semiconductor layer 73 may be a p-type semiconductor layer having a dopant of the second conductivity type, for example, a p-type dopant. The third conductive semiconductor layer 73 is formed of, for example, _{a semiconductor material having a composition formula of In x} Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). can be The third conductive semiconductor layer 73 may include, for example, at least one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, or AlGaInP.

The doping concentration of the dopant of the second conductivity type of the third conductive semiconductor layer 73 may be higher than that of the dopant of the second conductivity type of the second conductive semiconductor layer 71 . The third conductive semiconductor layer 73 may have a doping concentration of a p-type dopant of 1E20 cm −3 or more, and the second conductive semiconductor layer 71 may have a doping concentration of a p-type dopant of less than 1E20 cm −3 . The second conductive semiconductor layer 71 may be disposed to have a higher doping concentration than the p-type dopant of the third semiconductor layer 65 of the electron blocking structure layer 60 . Accordingly, deterioration of the film quality at the interface between the second conductive semiconductor layer 71 and the third semiconductor layer 65 can be prevented.

The second conductive semiconductor layer 73 may be disposed as a single layer or a multilayer. The second conductive semiconductor layer 73 may have a superlattice structure in which at least two different layers are alternately disposed. The second conductive semiconductor layer 73 may be an electrode contact layer.

The light emitting structure may include a first conductive semiconductor layer 41 to a second conductive semiconductor layer 73 . Such a light emitting structure may be implemented as any one of an np junction structure, a pn junction structure, an npn junction structure, and a pnp junction structure.

FIG. 10 shows an example in which electrodes are disposed in the light emitting device of FIG. 1 . In the description of FIG. 10 , the same parts as those of the above-described configuration will be referred to in the description of the above-described embodiment.

Referring to FIG. 10 , the light emitting device 101 includes a first electrode 91 and a second electrode 95 . A first electrode 91 may be electrically connected to the first conductive semiconductor layer 41 , and a second electrode 95 may be electrically connected to the second conductive semiconductor layer 73 . The first electrode 91 may be disposed on the first conductive semiconductor layer 41 , and the second electrode 95 may be disposed on the second conductive semiconductor layer 73 .

The first electrode 91 and the second electrode 95 may further have a current diffusion pattern having an arm structure or a finger structure. The first electrode 91 and the second electrode 95 may be made of a non-transmissive metal having characteristics of an ohmic contact, an adhesive layer, and a bonding layer, but is not limited thereto. The first electrode 93 and the second electrode 95 are selected from Ti, Ru, Rh, Ir, Mg, Zn, Al, In, Ta, Pd, Co, Ni, Si, Ge, Ag and Au and their selections. alloys can be selected.

An electrode layer 93 may be disposed between the second electrode 95 and the second conductive semiconductor layer 73 , and the electrode layer 93 is a light-transmitting material that transmits 70% or more of light or 70% or more of light. It may be formed of a material having reflective properties, such as a metal or a metal oxide. The electrode layer 93 includes indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), and indium gallium tin oxide (IGTO). ), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), ZnO, IrOx, RuOx, NiO, Al, Ag, Pd, Rh, Pt, and Ir.

An insulating layer 81 may be disposed on the electrode layer 93 . The insulating layer 81 may be disposed on an upper surface of the electrode layer 93 and a side surface of the semiconductor layer, and may selectively contact the first and second electrodes 91 and 95 . The insulating layer 81 includes an insulating material or insulating resin formed of at least one of oxide, nitride, fluoride, and sulfide having at least one of Al, Cr, Si, Ti, Zn, and Zr. The insulating layer 81 may be selectively formed from _{, for example, SiO 2} , Si ₃ N ₄ , Al ₂ O ₃ , and TiO _{2 .} The insulating layer 81 may be formed as a single layer or a multilayer, but is not limited thereto.

11 is a view showing an example of a vertical light emitting device using the light emitting device having an electron blocking structure layer of FIG. 1 . In the description of FIG. 11 , the same parts as those of the above-described configuration will be referred to in the description of the above-described embodiment.

Referring to FIG. 11 , the light emitting device 102 includes a plurality of conductive layers 96 , 97 , 98 , 99 under the first electrode 91 and the second conductive semiconductor layer 73 on the first conductive semiconductor layer 41 . ) and a second electrode having

The second electrode is disposed under the second conductive semiconductor layer 73 , and includes a contact layer 96 , a reflective layer 97 , a bonding layer 98 , and a support member 99 . The contact layer 96 is in contact with a semiconductor layer, for example, the second conductive semiconductor layer 73 . The contact layer 96 may be formed of a low-conductivity material such as ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, or a metal of Ni or Ag. A reflective layer 97 is disposed under the contact layer 96, and the reflective layer 97 is composed of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, and combinations thereof. It may be formed in a structure including at least one layer made of a material selected from the group. The reflective layer 97 may be in contact under the second conductive semiconductor layer 73 , but is not limited thereto.

A bonding layer 98 is disposed under the reflective layer 97, and the bonding layer 98 may be used as a barrier metal or a bonding metal, and the material thereof is, for example, Ti, Au, Sn, Ni, Cr, at least one of Ga, In, Bi, Cu, Ag, and Ta and an optional alloy.

A channel layer 83 and a current blocking layer 85 are disposed between the second conductive semiconductor layer 73 and the second electrode.

The channel layer 83 is formed along the lower edge of the second conductive semiconductor layer 73 and may be formed in a ring shape, a loop shape, or a frame shape. The channel layer 83 includes a transparent conductive material or an insulating material, for example, ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , It may include at least one of Al ₂ O ₃ and TiO _{2 .} An inner portion of the channel layer 163 is disposed under the second conductive semiconductor layer 73 , and an outer portion of the channel layer 163 is disposed outside the side surface of the light emitting structure.

The current blocking layer 85 may be disposed between the second conductive semiconductor layer 73 and the contact layer 96 or the reflective layer 97 . The current blocking layer 85 may include an insulating material, for example, at least one of _{SiO 2} , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , and TiO _{2 .} As another example, the current blocking layer 85 may be formed of a metal for a Schottky contact.

The current blocking layer 161 is disposed to correspond to the first electrode 181 disposed on the light emitting structure 150A in a thickness direction of the light emitting structure 150A. The current blocking layer 161 may block the current supplied from the second electrode 170 and spread it to another path. One or a plurality of the current blocking layers 85 may be disposed, and at least a portion or the entire region may overlap the first electrode 91 in a vertical direction.

A support member 99 is formed under the bonding layer 98 , and the support member 99 may be formed of a conductive member, and the material is copper (Cu-copper), gold (Au-gold), or nickel. It may be formed of a conductive material such as (Ni-nickel), molybdenum (Mo), copper-tungsten (Cu-W), or a carrier wafer (eg, Si, Ge, GaAs, ZnO, SiC, etc.). As another example, the support member 99 may be implemented as a conductive sheet.

Here, the substrate of FIG. 1 is removed. The growth substrate may be removed by a physical method (eg, laser lift off) and/or a chemical method (eg, wet etching) to expose the first conductive semiconductor layer 41 . The first electrode 91 is formed on the first conductive semiconductor layer 41 by performing isolation etching in the direction in which the substrate is removed.

A light extraction structure (not shown) such as roughness may be formed on the upper surface of the first conductive semiconductor layer 41 . An insulating layer (not shown) may be further disposed on the surface of the semiconductor layer, but is not limited thereto. Accordingly, the light emitting device 102 having a vertical electrode structure including the first electrode 91 on the light emitting structure and the support member 99 below may be manufactured.

<Light emitting device package>

12 is a view illustrating a light emitting device package including the light emitting device of FIG. 10 .

12 , the light emitting device package includes a body 211 having a cavity 215 , a first lead frame 221 and a second lead frame 223 disposed in the body 211 , and a light emitting device 101 . , including wires 231,233 and a molding member 241 .

The body 211 may include a conductive or insulating material. The body 211 is made of at least one of a resin material such as polyphthalamide (PPA), silicon (Si), a metal material, photo sensitive glass (PSG), sapphire (Al ₂ O ₃ ), and a printed circuit board (PCB). can be formed into one. The body 211 may be made of a resin material such as polyphthalamide (PPA) or epoxy.

The body 211 has an open top and a cavity 215 formed of a side surface and a bottom. The cavity 215 may include a cup structure or a recess structure concave from the upper surface of the body 211 , but is not limited thereto.

The first lead frame 221 is disposed in a first area of the bottom area of the cavity 215 , and the second lead frame 223 is disposed in a second area of the bottom area of the cavity 215 . The first lead frame 221 and the second lead frame 223 are spaced apart from each other in the cavity 215 .

The first lead frame 221 and the second lead frame 223 may be made of a metal material, for example, titanium (Ti), copper (Cu), nickel (Ni), gold (Au), chromium (Cr), or tantalum. It may include at least one of nium (Ta), platinum (Pt), tin (Sn), silver (Ag), and phosphorus (P), and may be formed as a single metal layer or a multi-layered metal layer.

The light emitting device 101 may be disposed on at least one of the first and second lead frames 221 and 223 , for example, disposed on the first lead frame 221 , and first and second with wires 231,233 . It is connected to the lead frames 221 and 223 .

The light emitting device 101 may selectively emit light in a range of a visible ray band to an ultraviolet ray band, and may be selected from, for example, a red LED chip, a blue LED chip, a green LED chip, and a yellow green LED chip. The light emitting chip 101 includes a compound semiconductor light emitting device of a group III to group V element.

A molding member 241 is disposed in the cavity 215 of the body 211 , and the molding member 241 includes a light-transmitting resin layer such as silicone or epoxy, and may be formed as a single layer or multiple layers. A phosphor for changing the wavelength of light emitted from the molding member 241 or the light emitting device 101 may be included, and the phosphor may excite a part of the light emitted from the light emitting device 101 to generate a different wavelength. emitted as light. The phosphor may be selectively formed from among YAG, TAG, Silicate, Nitride, and Oxy-nitride-based materials. The phosphor may include at least one of a red phosphor, a yellow phosphor, and a green phosphor, but is not limited thereto. The surface of the molding member 241 may be formed in a flat shape, a concave shape, a convex shape, or the like, but is not limited thereto.

A lens may be further formed on the upper portion of the body 211 , and the lens may include a structure of a concave and/or convex lens, and adjust the light distribution of the light emitted by the light emitting device 34 . can

A protection device may be disposed in the light emitting device package. The protection element may be implemented as a thyristor, a Zener diode, or a transient voltage suppression (TVS).

In addition, an optical lens or a phosphor layer may be further disposed on the light emitting device package, but is not limited thereto.

The light emitting device or the light emitting device package according to the embodiment may be applied to a light unit. The light unit is an assembly including one or a plurality of light emitting devices or light emitting device packages, and may include an ultraviolet lamp.

Features, structures, effects, etc. described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, features, structures, effects, etc. illustrated in each embodiment can be combined or modified for other embodiments by those of ordinary skill in the art to which the embodiments belong. Accordingly, the contents related to such combinations and modifications should be interpreted as being included in the scope of the present invention.

In addition, although the embodiment has been described above, it is merely an example and does not limit the present invention, and those of ordinary skill in the art to which the present invention pertains are exemplified above in a range that does not depart from the essential characteristics of the present embodiment. It can be seen that various modifications and applications that have not been made are possible. For example, each component specifically shown in the embodiment can be implemented by modification. And differences related to such modifications and applications should be construed as being included in the scope of the present invention defined in the appended claims.

21: substrate 31: buffer layer
33: semiconductor layer 41: first conductive semiconductor layer
43: first clad layer 51: active layer
53,W1: well layer 55,B1,B2: barrier layer
60: electron blocking structure layer 61: first semiconductor layer
63: second semiconductor layer 65: third semiconductor layer
71: second conductive semiconductor layer 73: third conductive semiconductor layer

Claims (13)

a first conductive semiconductor layer having a dopant of a first conductivity type;
an active layer disposed on the first conductive semiconductor layer and having a plurality of barrier layers and a plurality of well layers;
an electron blocking structure layer disposed on the active layer; and
a second conductive semiconductor layer disposed on the electron blocking structure layer;
The active layer includes a first barrier layer adjacent to the electron blocking structure layer and a first well layer adjacent to the first barrier layer,
The electron blocking structure layer,
a first semiconductor layer adjacent to the active layer and having a first concentration of a dopant of a second conductivity type and a first composition of aluminum;
a second semiconductor layer having a second concentration of a dopant of a second conductivity type and a second composition of aluminum on the first semiconductor layer; and
a third semiconductor layer having a third concentration of a dopant of a second conductivity type and a third composition of aluminum on the second semiconductor layer;
The dopant of the second conductivity type of the first to third semiconductor layers satisfies the condition of second concentration > first concentration > third concentration,
The aluminum composition of the first to third semiconductor layers is a light emitting device having the condition of first composition > second composition > third composition. According to claim 1,
The dopant of the first conductivity type includes an n-type dopant,
The dopant of the second conductivity type includes a p-type dopant,
The first composition is more than twice the second composition,
has a band gap wider than that of the first barrier layer;
The thickness of the second semiconductor layer is disposed to be thicker than the thickness of the first semiconductor layer,
The third composition is a light emitting device in which the composition of aluminum is gradually reduced as it is adjacent to the second conductive semiconductor layer. 3. The method of claim 2,
The first semiconductor layer is a light emitting device including indium. 4. The method of claim 2 or 3,
The first semiconductor layer has a band gap wider than that of the second semiconductor layer and the third semiconductor layer,
When 1E19cm-3 or more is 1 with respect to the doping concentration of the second conductivity type in the electron blocking structure layer, a section of 1E20cm-3 or more among the second concentrations of the second semiconductor layer is 20% in the electron blocking structure layer A light emitting device that is more than one. 4. The method of claim 2 or 3,
The dopant of the second conductivity type of the third semiconductor layer is undoped or has a third concentration lower than the doping concentration of the second conductive semiconductor layer,
and a third conductive semiconductor layer on the second conductive semiconductor layer,
The third conductive semiconductor layer has a dopant concentration higher than that of the second conductive type dopant of the second conductive semiconductor layer and the second semiconductor layer,
The first barrier layer and the second conductive semiconductor layer may include a GaN-based semiconductor.
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