KR102093380B1 - 반도체 패키지의 검사테이블 - Google Patents
반도체 패키지의 검사테이블 Download PDFInfo
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- KR102093380B1 KR102093380B1 KR1020180013191A KR20180013191A KR102093380B1 KR 102093380 B1 KR102093380 B1 KR 102093380B1 KR 1020180013191 A KR1020180013191 A KR 1020180013191A KR 20180013191 A KR20180013191 A KR 20180013191A KR 102093380 B1 KR102093380 B1 KR 102093380B1
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- semiconductor package
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 126
- 238000007689 inspection Methods 0.000 title claims abstract description 36
- 239000011148 porous material Substances 0.000 claims abstract description 7
- 238000005520 cutting process Methods 0.000 description 8
- 238000001035 drying Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 7
- 238000005406 washing Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 230000004308 accommodation Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000004438 eyesight Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68785—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
Description
도 2는 본원의 일 실시예에 따른 베이스부의 사시도이다.
도 3은 본원의 일 실시예에 따른 안착시트에 복수의 반도체 패키지가 재치된 모습을 설명하기 위한 평면도이다.
도 4는 본원의 일 실시예에 따른 복수의 함몰부가 구비된 반도체 패키지의 검사테이블의 사시도이다.
도 5는 본원의 일 실시예에 따른 안착시트에 복수의 반도체 패키지가 재치된 모습을 설명하기 위한 평면도이다.
도 6은 본원의 일 실시예에 따른 반도체 패키지의 검사테이블의 단면도이다.
도 7은 본원의 일 실시예에 따른 프레임부가 배치된 반도체 패키지의 검사테이블의 단면도이다.
도 8은 종래의 반도체 패키지의 검사테이블의 평면도이다.
10: 반도체 패키지
11: 반도체 패키지의 볼
100: 베이스부
110: 수용홈
120: 진공홀
200: 안착시트
210: 함몰부
211: 메인부
212: 확장부
230: 지지턱
300: 받침
400: 프레임부
410: 프레임부의 홈
500: 종래의 안착테이블
510: 안착영역
511: 안착부
512: 여유공간부
513: 진공홀
Claims (8)
- 포러스를 이용한 반도체 패키지의 검사테이블로서,
수용홈 및 복수의 진공홀이 구비되는 베이스부;
상기 수용홈 상에 배치되는 안착시트;
상기 진공 홀과 상기 안착시트가 상하 방향으로 간격을 두고 배치되도록, 상기 안착시트의 하면과 상기 수용홈의 상면 사이에 구비되어 상기 안착시트를 지지하는 복수의 받침; 및
상기 안착시트 상에 배치되며, 각각의 내부에 반도체 패키지의 볼이 위치 가능한 홈 복수 개가 형성되는 포러스(porous) 재질의 프레임부,
를 포함하고,
상기 안착시트는 포러스(porous) 재질이며,
상기 홈 각각은 일자 형상의 메인부 및 상기 메인부의 양 끝단에서 상기 메인부보다 더 넓은 폭을 갖는 확장부를 갖는 아령 형상이되, 상기 확장부의 양 끝단의 테두리가 라운드 처리된 형상이며,
상기 프레임부의 높이는 상기 안착시트의 상면에 상기 볼이 접촉되지 않도록, 반도체 패키지의 볼의 높이보다 크게 설정되는 것인,
반도체 패키지의 검사테이블. - 삭제
- 삭제
- 삭제
- 삭제
- 삭제
- 삭제
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Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020180013191A KR102093380B1 (ko) | 2018-02-02 | 2018-02-02 | 반도체 패키지의 검사테이블 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020180013191A KR102093380B1 (ko) | 2018-02-02 | 2018-02-02 | 반도체 패키지의 검사테이블 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20190093861A KR20190093861A (ko) | 2019-08-12 |
KR102093380B1 true KR102093380B1 (ko) | 2020-03-26 |
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KR1020180013191A Active KR102093380B1 (ko) | 2018-02-02 | 2018-02-02 | 반도체 패키지의 검사테이블 |
Country Status (1)
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KR (1) | KR102093380B1 (ko) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009117552A (ja) * | 2007-11-05 | 2009-05-28 | Fuji Electric Systems Co Ltd | 吸着ステージ |
JP2011067888A (ja) * | 2009-09-25 | 2011-04-07 | Shin Etsu Polymer Co Ltd | 半導体ウェーハ用チャックテーブル及び半導体ウェーハの加工方法 |
JP2013198944A (ja) * | 2012-03-23 | 2013-10-03 | Toshiba Corp | ダイシング装置及びダイシング方法 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101801264B1 (ko) * | 2011-06-13 | 2017-11-27 | 삼성전자주식회사 | 반도체 제조 장치 및 이를 이용한 반도체 패키지 방법 |
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2018
- 2018-02-02 KR KR1020180013191A patent/KR102093380B1/ko active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009117552A (ja) * | 2007-11-05 | 2009-05-28 | Fuji Electric Systems Co Ltd | 吸着ステージ |
JP2011067888A (ja) * | 2009-09-25 | 2011-04-07 | Shin Etsu Polymer Co Ltd | 半導体ウェーハ用チャックテーブル及び半導体ウェーハの加工方法 |
JP2013198944A (ja) * | 2012-03-23 | 2013-10-03 | Toshiba Corp | ダイシング装置及びダイシング方法 |
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KR20190093861A (ko) | 2019-08-12 |
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