KR101973405B1 - Liquid crystal display device - Google Patents

Abstract

A liquid crystal display device according to an embodiment includes a gate driver for supplying a gate voltage to a gate line of a liquid crystal panel; A data driver for supplying a data voltage to a data line of the liquid crystal panel; A timing controller for transmitting a control signal to the gate driver and the data driver; A power supply unit for supplying a power voltage and a ground voltage to the gate driver, the data driver, and the timing controller; And a gamma generator for generating a gamma voltage between the power supply unit and the data driver, wherein the gamma generator applies the gamma voltage to the data driver in a normal mode, and supplies the power supply voltage and the ground voltage to the data driver in a power saving mode, It is driven selectively by directly applying it to the driver.

Description

[0001] Liquid crystal display device [0002]

The embodiment relates to a liquid crystal display device.

Various display devices capable of displaying information are being developed. The display device may be, for example, a liquid crystal display device, a plasma display panel device, an electrophoretic display device, an organic electro-luminescence display device, And a semiconductor light-emitting display device.

Of these, the liquid crystal display device has excellent image quality, light weight, thinness, and low power consumption, and has been popular as a representative display device. For example, liquid crystal displays are widely employed in mobile phones, navigation systems, notebooks, and televisions.

Unlike an impulse type cathode ray tube (CRT), the liquid crystal display device is driven in a hold type and displays light by controlling light generated from the backlight, thereby causing a significant power consumption problem.

In recent years, various power saving modes have been attempted to solve the power consumption problem of the liquid crystal display device. One example of the power saving mode is an 8-color mode in which images are displayed in only eight colors.

In the eight-color mode, each of the conventional pixels is displayed in 255 gradations. An image is displayed in only two gradations, and images are displayed in eight colors through on / off of R, G, and B pixels. Since the 8-color mode is used in the power saving mode driving, the problem of power consumption reduction becomes more significant.

Embodiments provide a liquid crystal display device capable of reducing power consumption in a power saving mode operation.

A liquid crystal display device according to an embodiment includes a gate driver for supplying a gate voltage to a gate line of a liquid crystal panel; A data driver for supplying a data voltage to a data line of the liquid crystal panel; A timing controller for transmitting a control signal to the gate driver and the data driver; A power supply unit for supplying a power voltage and a ground voltage to the gate driver, the data driver, and the timing controller; And a gamma generator for generating a gamma voltage between the power source and the data driver, wherein the gamma generator applies the gamma voltage to the data driver in the normal mode, and supplies the power source voltage and the ground voltage in the power save mode Directly to the data driver.

Embodiments provide a liquid crystal display device capable of reducing power consumption by directly applying a power source voltage and a ground voltage generated in a power source unit to a data driver in a power saving mode operation, for example, in an 8-color mode.

1 is a block diagram showing a liquid crystal display device according to a first embodiment.
2 is a diagram illustrating a gamma generator, a power source, and a data driver of the liquid crystal display according to the first embodiment.
3 is a diagram illustrating a gamma generator, a power supply, and a data driver of the liquid crystal display according to the second embodiment.
4 is a waveform diagram of a high gray scale switch of the liquid crystal display according to the first embodiment.

1 is a block diagram showing a liquid crystal display device according to a first embodiment.

Referring to FIG. 1, the liquid crystal display according to the first embodiment includes a liquid crystal panel 1, a timing controller 10, a gate driver 20, a data driver 30, and a gamma generator 40.

A plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm may be formed on the liquid crystal panel 1. The thin film transistor 11 may be electrically connected to the plurality of gate lines GL1 to GLn and the plurality of data lines DL1 to DLm.

The timing controller 10 can receive a data clock signal Dclk, a vertical synchronization signal Vsync, and a horizontal synchronization signal Hsync together with a data signal from an external graphics card.

The timing controller 10 generates a timing control signal for controlling the gate driver 20 and the data driver 30 based on a data clock signal Dclk, a vertical synchronization signal Vsync and a horizontal synchronization signal Hsync. Lt; / RTI > The timing control signal may include a gate control signal and a data control signal. The gate control signal may include, for example, a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable (GOE). The gate start pulse GSP is a signal for controlling the driving start timing of the first gate line of the liquid crystal panel 1 in one frame and the gate shift clock GSC controls the gate driving start time of the liquid crystal panel And the gate output enable (GOE) is a signal for controlling the timing of sending a gate signal to each gate line.

The data control signal may include a source start pulse (SSP), a source shift clock (SSC), a source output enable (SOE) signal, a polarity signal (POL) . The source start pulse SSP is a signal for controlling the supply time point of the data voltage of the first line in one frame and the source shift clock SSC is a signal for controlling the supply time point of the data voltage for each line, The source output enable (SOE) is a signal for controlling a time point of sending a data voltage to the data lines 31 of the liquid crystal panel, and the polarity signal POL is a signal for selecting a data voltage or a negative data voltage to be.

The timing controller 10 may rearrange data signals provided from the graphics card to provide the data drivers 30 with data signals.

The timing controller 10 may provide the gate control signal to the gate driver 20 and provide the data control signal and the data signal to the data driver 30.

The gate driver 20 sequentially generates a gate signal based on the gate control signal provided from the timing controller 10 and provides the generated gate signal to the plurality of gate lines GL1 to GLn.

The data driver 30 may supply a data voltage corresponding to the data signal provided from the timing controller 10 to the plurality of data lines DL1 to DLm.

The gamma generator 40 may generate a gamma voltage at a power supply voltage supplied from a power supply unit (not shown). The power supply unit (not shown) may be included in the timing controller 10. The gamma generator 40 may generate a plurality of gamma voltages corresponding to the grayscales at a power supply voltage, and may transmit the gamma voltages to the data driver 30.

The thin film transistor 11 is on / off controlled by the gate signal, receives the data voltage, transfers the data voltage to the pixel electrode, and controls the displacement of the liquid crystal molecules to display an image. In other words, the gate electrode of the thin film transistor 11 is electrically connected to the gate lines GL1 to GLn to which the gate signal is applied, and the source electrode is electrically connected to the data lines DL1 to DLm through which the data voltage is transmitted , And the drain electrode may be electrically connected to the pixel electrode capable of controlling the displacement of the liquid crystal molecules.

2 is a diagram illustrating a gamma generator, a power source, and a data driver of the liquid crystal display according to the first embodiment.

Referring to FIG. 2, the gamma generator 40 of the liquid crystal display according to the first embodiment may include a reference voltage generator 42, a gamma voltage generator 44, and a gamma voltage selector 46 .

The gamma generator 40 generates a gamma voltage using the power source voltage Vdd applied from the power source unit 50 and outputs the gamma voltage corresponding to a data signal applied to the timing controller from the outside to the data driver 30 Can supply. The gamma generator 40 may be included in the data driver 30 and may be included in the timing controller. A part of the configuration of the gamma generator 40 may be included in the data driver 30 and included in the timing controller.

The power supply unit 50 applies a voltage having a plurality of levels for driving the configuration of the liquid crystal display device to the configuration of the liquid crystal display device by receiving a voltage from the outside. The gamma generation unit 40 may also receive the power supply voltage Vdd from the power supply unit 50 to generate a gamma voltage.

The reference voltage generating unit 42 may generate the gamma reference voltage Vref using the power source voltage Vdd applied by the power source unit 50. [ The reference voltage generator 42 may be controlled by an enable signal. The reference voltage generator 42 may output the gamma reference voltage Vref by an enable signal Enable. The gamma reference voltage Vref may have a level lower than the power supply voltage Vdd. For example, when the power supply voltage Vdd is 4.5V to 5.5V, the reference voltage generator 42 reduces the voltage to generate a gamma reference voltage Vref of 4V to 5V, and supplies the gamma voltage to the gamma voltage generator 44 Can supply.

The gamma voltage generator 44 may generate a plurality of gamma voltages Vgma1 to Vgma255 by receiving the gamma reference voltage Vref. The plurality of gamma voltages gma1 to Vgma255 may be supplied to the gamma voltage selector 46. The gamma voltage generator 44 may include a plurality of gamma strings R1 through R255 connected in series. The gamma voltage generator 44 divides the gamma reference voltage Vref by a plurality of gamma strings R1 to R255 to generate a plurality of gamma voltages Vgma1 to Vgma255. The number of the gamma voltages may be determined by the number of gradations to be expressed. For example, the number of the gamma voltages may be 255 divided to represent 255 gradations. The number of gamma strings of the gamma voltage generator 44 may be determined by the number of the gamma voltages Vgma1 to Vgma255 to be generated. The plurality of gamma voltages Vgma1 to Vgma255 may be applied to the gamma voltage selector 46.

The gamma voltage selector 46 receives the plurality of gamma voltages Vgma1 to Vgma255 and applies a specific gamma signal corresponding to the data signal applied to the timing controller to the data driver 30 . The gamma selector 46 may include a plurality of gamma switches SW1 to SW255, a high gray scale switch SWhigh, and a low gray scale switch SWlow. The gamma voltages Vgma1 to Vgma255 may be applied to the plurality of gamma switches SW1 to SW255. The number of the gamma switches may be determined by the number of the gamma voltages.

The gamma switches SW1 to SW255 may be controlled by a gamma selection signal applied by the timing controller. The gamma selection signal may control on / off the gamma switch according to a data signal applied from the outside to the timing controller.

The high gray scale switch SWhigh and the low gray scale switch SWlow may be controlled by a data signal data from the timing controller and may be controlled by a signal for controlling the input of the data signal data have. Alternatively, the high gray scale switch (SWhigh) and the low gray scale switch (SWlow) may be controlled by separate signals. The high gray scale switch SWhigh and the low gray scale switch SWlow may operate in synchronization with the data signal data.

The high gray scale switch SWhigh may electrically connect the power supply unit 50 and the data driver 30. The high gray scale switch SWhigh may apply the power supply voltage Vdd from the power supply unit 50 to the data driver 30. The high gray scale switch SWhigh may be synchronized with the data signal to apply the power supply voltage Vdd to the data driver 30. The power supply voltage Vdd is applied to the data driver 30 to serve as an upper gamma voltage corresponding to a high gray level in the 8-color mode.

The low gray scale switch SWlow may electrically connect the power supply unit 50 and the data driver 30. [ The low gray scale switch SWlow may apply the ground voltage Vgnd from the power supply unit 50 to the data driver 30. [ The low gray scale switch SWlow may apply the ground voltage Vgnd to the data driver 30 in synchronization with the data signal data. The ground voltage Vgnd may be applied to the data driver 30 to serve as a lower gamma voltage corresponding to a low gray level in the 8-color mode.

The high gray scale switch SWhigh and the low gray scale switch SWlow are exclusively turned on / off. In other words, when the high gray scale switch SWhigh is short-circuited, the low gray scale switch SWlow is opened and when the high gray scale switch SWhigh is opened, the low gray scale switch SWlow is short-circuited. The high gray scale switch SWhigh and the low gray scale switch SWlow are exclusively turned on / off to prevent the voltage of two levels from being applied to the data driver 30 at the same time.

The control of the high gray scale switch (SWhigh) and the low gray scale switch (SWlow) can be determined by the magnitude of the data signal (data). When the data signal data is a data signal corresponding to an intermediate gray level or higher, the high gray scale switch SWhigh is short-circuited and the power supply voltage Vdd is applied to the data driver 30 as an upper gamma voltage to display a white image have. When the data signal (data) is a data signal corresponding to less than the middle gray level, the low gray level switch SWlow is short-circuited and the ground voltage gnd is applied to the data driver 30 as a lower gamma voltage to display a black image .

In other words, when the liquid crystal display device is driven in the 8-color mode, a low level voltage is applied to the enable signal Enable for controlling the reference voltage generator 42 to operate the reference voltage generator 42 The upper gamma voltage or the lower gamma voltage can be directly applied from the power supply unit 50 to the data driver 30. [ In the case of driving the 8-color mode of the liquid crystal display device as described above, it is possible to prevent power consumption loss as much as driving the reference voltage generating unit 42. [

3 is a diagram illustrating a gamma generator, a power supply, and a data driver of the liquid crystal display according to the second embodiment.

The liquid crystal display device according to the second embodiment is the same as the first embodiment except that the positions of the high gray scale switch and the low gray scale switch are different. Therefore, in the description of the second embodiment, the detailed description is omitted in the same parts as in the first embodiment.

3, the gamma generation unit 140 of the liquid crystal display according to the second embodiment may include a reference voltage generation unit 142, a gamma voltage generation unit 144, and a gamma voltage selection unit 146 .

The gamma voltage selector 146 receives a plurality of gamma voltages Vgma1 to Vgma255 and applies a specific gamma signal corresponding to the data signal applied to the timing controller to the data driver 130 . The gamma selector 146 may include a plurality of gamma switches SW1 to SW255. The gamma voltages Vgma1 to Vgma255 may be applied to the plurality of gamma switches SW1 to SW255. The number of the gamma switches may be determined by the number of the gamma voltages.

A high gray scale switch (SWhigh) and a low gray scale switch (SWlow) may be electrically connected in parallel between the power supply unit (150) and the data driver (130).

The high gray scale switch SWhigh and the low gray scale switch SWlow may be included in the power supply unit 150. The high gray scale switch SWhigh and the low gray scale switch SWlow may be included in the gamma generation unit 140. The high gray scale switch SWhigh and the low gray scale switch SWlow may be included in the timing controller.

 The high gray scale switch SWhigh and the low gray scale switch SWlow may be controlled by a data signal data from the timing controller and may be controlled by a signal for controlling the input of the data signal data have. Alternatively, the high gray scale switch (SWhigh) and the low gray scale switch (SWlow) may be controlled by separate signals. The high gray scale switch SWhigh and the low gray scale switch SWlow may operate in synchronization with the data signal data.

The high gray scale switch SWhigh may apply the power supply voltage Vdd from the power supply unit 150 to the data driver 130. The high gray scale switch SWhigh may be synchronized with the data signal to apply the power supply voltage Vdd to the data driver 130. The power source voltage Vdd is applied to the data driver 130 to serve as an upper gamma voltage corresponding to a high gray level in the 8-color mode.

The low gray scale switch SWlow may apply the ground voltage Vgnd from the power supply unit 150 to the data driver 130. The low gray scale switch SWlow may apply the ground voltage Vgnd to the data driver 130 in synchronization with the data signal data. The ground voltage Vgnd may be applied to the data driver 130 to serve as a lower gamma voltage corresponding to a low gray level in the 8-color mode.

The control of the high gray scale switch (SWhigh) and the low gray scale switch (SWlow) can be determined by the magnitude of the data signal (data). When the data signal data is a data signal corresponding to an intermediate gray level or more, the high gray scale switch SWhigh is short-circuited and the power supply voltage Vdd is applied to the data driver 130 as an upper gamma voltage to display a white image have. When the data signal (data) is a data signal corresponding to less than the intermediate gray level, the low gray level switch SWlow is short-circuited and the ground voltage gnd is applied to the data driver 130 as a lower gamma voltage to display a black image .

In other words, when the liquid crystal display device is driven in the 8-color mode, the reference voltage generating unit 142 is operated by applying a low level voltage to the enable signal Enable for controlling the reference voltage generating unit 142 The upper gamma voltage or the lower gamma voltage may be directly applied from the power supply unit 150 to the data driver 130. In the case of driving the 8-color mode of the liquid crystal display device as described above, it is possible to prevent power consumption loss as much as driving the reference voltage generator 142. [

4 is a waveform diagram of a high gray scale switch of the liquid crystal display according to the first embodiment.

4A is a waveform diagram of a high-gradation switch in the normal mode of the liquid crystal display according to the first embodiment, and FIG. 4B is a waveform diagram of a high-gradation switch in the 8-color mode of the liquid crystal display according to the first embodiment .

Referring to FIG. 4A, in the liquid crystal display according to the first embodiment, in the normal mode, the high level is applied to the enable signal to enable the reference voltage generating unit to operate normally, and the high gray level switch SWhigh has a low level And a gamma voltage generated by the input data is generated and applied to the data driver.

Referring to FIG. 4B, in the 8-color mode, the liquid crystal display according to the first embodiment has a low level applied to the enable signal to leave the reference voltage generating unit in an inactive state, and a high gray scale switch SWhigh ) So that the high gray scale switch SWhigh is short-circuited only for the time when the input data is applied, and the power supply voltage is applied to the data driver. The input data is assumed to be higher than the middle gradation, and in the case of less than the middle gradation, the low gradation switch may be shorted in synchronization with the input data.

The waveform diagram for the high gray scale switch can be operated synchronously with the input data in the case of the low gray scale switch.

The waveform diagrams are not limited to the first embodiment and can be similarly applied to the second embodiment.

1: liquid crystal panel 10: timing controller
11: Thin film transistor 20: Gate driver
30: Data driver 40: Gamma generator
42: reference voltage generator 44: gamma voltage generator
46: gamma voltage selector 50: power supply

Claims (13)

A liquid crystal display device driven in a power saving mode in which an image is displayed in eight colors through a normal mode and on / off of R, G, and B pixels,
A gate driver for supplying a gate voltage to a gate line of the liquid crystal panel;
A data driver for supplying a data voltage to a data line of the liquid crystal panel;
A timing controller for transmitting a control signal to the gate driver and the data driver;
A power supply unit for supplying a power voltage and a ground voltage to the gate driver, the data driver, and the timing controller;
A gamma generator for generating a gamma voltage between the power supply and the data driver;
A high gray scale switch for controlling a power supply voltage directly applied to the data driver; And a low gray scale switch for controlling a ground voltage directly applied to the data driver,
Wherein the gamma generator applies the gamma voltage to the data driver in the normal mode and selectively drives the power source voltage and the ground voltage to the data driver in the power save mode,
Wherein the high gray scale switch and the low gray scale switch are synchronized and turned on and off by a data signal generated by the timing controller,
Wherein the high gray scale switch is synchronized with the data signal when the data signal is higher than a reference gray level,
Wherein the low gray level switch is synchronized with the data signal when the data signal is lower than a reference gray level. delete delete delete delete The method according to claim 1,
Wherein the reference gradation is a middle system join. The method according to claim 1,
The gamma-
A reference voltage generator for generating a gamma reference voltage with the power supply voltage;
A gamma voltage generator for generating a plurality of gamma voltages with the gamma reference voltage; And
And a gamma voltage selector for selectively applying the gamma voltage. 8. The method of claim 7,
Wherein the operation of the reference voltage generator is determined by an enable signal generated by the timing controller. 9. The method of claim 8,
Wherein the enable signal is at a high level in the normal mode and operates at a low level in the power saving mode. 8. The method of claim 7,
Wherein the high gray scale switch and the low gray scale switch are located in the gamma voltage selection unit. 8. The method of claim 7,
Wherein the high gray scale switch and the low gray scale switch are located in the power supply unit. 9. The method of claim 8,
When the enable signal is at a low level, a low level signal is applied to the high gray level switch and the low gray level switch,
Wherein when the enable signal is at a high level, a high level signal or a low level signal is applied to the high gray level switch and the low gray level switch. delete

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