KR101853027B1 - Electrostatic capacity type touch screen panel and method of manufacturing the same - Google Patents

Abstract

The present invention relates to a touch screen panel capable of preventing defects due to substrate undercuts by protecting substrates from etching gas particles, and a method of manufacturing the same. A plurality of first electrode rows arranged in a first direction on the substrate; A plurality of second electrode rows arranged in a second direction intersecting with the first electrode rows; And an insulating layer formed at an intersection of the first and second electrode rows to electrically isolate the first and second electrode rows, wherein each of the first electrode rows includes a plurality of first electrode patterns Wherein each of the second electrode rows includes a plurality of second electrode patterns, each of the first electrode patterns includes at least one groove formed inwardly and at least one protrusion protruding toward the outside Wherein each of the second electrode patterns includes at least one groove formed toward the inside and at least one protrusion formed toward the outside, and the protrusion of the second electrode pattern is inserted into the groove of the first electrode pattern, And the projection of the first electrode pattern is inserted into the groove of the second electrode pattern.

Description

TECHNICAL FIELD [0001] The present invention relates to an electrostatic capacity type touch screen panel,

The present invention relates to a capacitive touch screen panel and a method of manufacturing the same.

In recent years, display devices such as liquid crystal displays (LCDs), electroluminescent displays, and plasma display panels have attracted attention because of their high response speed, low power consumption, and excellent color recall . Such display devices have been used in various electronic products such as televisions, computer monitors, notebook computers, mobile phones, display parts of refrigerators, personal digital assistants, and automated teller machines. Generally, these display devices constitute an interface with a user by using various input devices such as a keyboard, a mouse, and a digitizer. However, the use of a separate input device such as a keyboard and a mouse has been required to learn how to use the device and to inconvenience such as occupying a space, thereby making it difficult to improve the completeness of the product. Therefore, there is a growing demand for an input device that is convenient and simple and can reduce malfunctions. In accordance with such a demand, a touch screen panel has been proposed in which a user directly touches a screen with a hand or a pen to input information.

The touch screen panel is simple, has little malfunction, can be input without using a separate input device, and can be operated quickly and easily through the contents displayed on the screen. .

The touch screen panel includes a resistive type in which a metallic electrode is formed on a top plate or a bottom plate in accordance with a method of detecting a touched portion to determine a touched position as a voltage gradient according to a resistance in a state in which a direct current voltage is applied, (Electrostatic capacitive type) which detects the position where the voltage change of the upper and lower plates due to the touch is sensed by forming the equal potential on the conductive film and reads the LC value induced by touching the conductive film And an electro-magnetic type in which an indented portion is detected.

Hereinafter, a capacitive touch screen panel according to the related art will be described with reference to FIGS. 1, 2, and 3A to 3E. FIG. 1 is a plan view of a conventional capacitive touch screen panel, FIG. 2 is a cross-sectional view taken along line I-I 'of the touch screen panel shown in FIG. 1, FIG. 2 is a cross-sectional view illustrating a manufacturing process of a touch screen panel.

Referring to FIGS. 1 and 2, a conventional capacitive touch screen panel includes a substrate 10, a plurality of first electrodes (not shown) arranged on the substrate 10 and arranged in a first direction Electrode patterns 40 and a plurality of second electrode patterns 50 arranged in a direction (for example, Y-axis direction) intersecting with the first electrode patterns 40. The touch screen panel is also formed at the intersection of the first electrode patterns 40 and the second electrode patterns 50 to electrically isolate the first electrode patterns 40 from the second electrode patterns 50 Insulating patterns 30 are formed on the substrate 10 under the insulation pattern 30 at the intersections of the first electrode patterns 40 and the second electrode patterns 50, And a first connection pattern 20 for connecting the one-electrode patterns 40.

However, in the conventional capacitive touch screen panel, as shown in FIG. 2, in the process of forming the insulating pattern 30 for insulating the first connection pattern 20 and the second electrode pattern 50, The substrate 10 may be etched in an undercut shape at a position A of both ends of the first connection pattern 20 adjacent to the insulation pattern 30 and the first electrode pattern 40 may be disconnected.

As described above, in the step of forming the insulation pattern 30, the substrate 10 is over-etched by the etching gas at the end position of the first connection pattern 20, which is close to the insulation pattern 30, Will be described in more detail with reference to Figs. 3A to 3E.

First, as shown in FIG. 3A, a first conductive layer is formed on a substrate 10 through a deposition process such as sputtering, and then wet etching is performed on the first conductive layer using a photolithography process, (20). Here, ITO is used as a material for forming the first conductive layer.

Next, an insulating layer INS is formed on the substrate 10 on which the first connection pattern 20 is formed through a deposition method such as sputtering as shown in FIG. 3B.

After the insulating layer INS is formed, a photoresist pattern PR1 having a width narrower than the length of the first connection pattern 20 is formed by using a photolithography process as shown in FIG. 3C. When the insulating layer INS is dry-etched using the photoresist pattern PR1 as a mask, the insulating layer INS is patterned so that both end portions of the first connection pattern 20 as shown in Fig. An exposed insulating pattern 30 is formed.

However, in the process of dry etching the insulating layer INS, a portion of the substrate 10 under the both ends of the first connection pattern 20 deposited using the ITO film is also etched to form the substrate 10 The undercut portion 13 is formed. The reason that the undercut portion 13 is formed in this way is that the ITO which is a material used for forming the first connection pattern 20 does not react to the dry etching so that the dry etching gas particles flowing on the side wall of the insulating pattern 30 Is partially concentrated at the position of the substrate 10 corresponding to both ends of the first connection pattern 20 formed close to the end of the insulation pattern 30. [

Next, the second conductive layer is entirely deposited on the substrate 10 on which the first connection pattern 20 and the insulating pattern 30 are formed through a process such as sputtering, and the second conductive layer is patterned by a photolithography process. The first and second electrode patterns 40 and 50 are formed by wet etching. However, since the undercut portion 13 is formed at the position of the substrate 10 corresponding to both ends of the first connection pattern 20, both ends of the first connection pattern 20 can be collapsed, When the second conductive layer is deposited, there is a high possibility that the second conductive layer is depressed by gravity in the undercut portion 13 as shown in Fig. 3E. When the second conductive layer is embedded in the undercut portion 13 of the substrate, neighboring first electrode patterns 40 formed on the first connection pattern 20 are electrically connected to the first connection pattern 20 The possibility of not being in electrical contact with the electrodes becomes high. If the first electrode patterns 40 are not in electrical contact with the first connection pattern 20 in the region A on the substrate, even if the touch is made, the touch position can not be accurately recognized. Therefore, A need emerged.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to solve the above-mentioned problems, and it is an object of the present invention to provide a method of manufacturing a semiconductor device, And to provide a touch screen panel capable of preventing contact failure and a manufacturing method thereof.

According to an aspect of the present invention, there is provided a capacitive touch screen panel comprising: a substrate; A plurality of first electrode rows arranged in a first direction on the substrate; A plurality of second electrode rows arranged in a second direction intersecting with the first electrode rows; And an insulating layer formed at an intersection of the first and second electrode rows to electrically isolate the first and second electrode rows, wherein each of the first electrode rows includes a plurality of first electrode patterns, And first connection patterns connecting first electrode patterns adjacent to each other, wherein each of the second electrode columns includes a plurality of second electrode patterns and a second connection connecting the neighboring second electrode patterns to each other, Wherein the first electrode pattern and the first connection pattern are integrally formed, and the thickness of the first electrode pattern is thicker than the thickness of the first connection pattern.

In the above structure, the second electrode pattern and the second connection pattern are integrally formed, and the thickness of the second electrode pattern is the same as the thickness of the second connection pattern.

The second connection pattern and the first connection pattern may be formed to cross each other with the insulation layer interposed therebetween. The first connection pattern may be formed under the insulation layer, As shown in FIG.

Further, the touch screen panel according to the present invention includes a plurality of first routing lines connected to the plurality of first electrode lines, respectively; And a plurality of second routing interconnections respectively connected to the plurality of second electrode lines, wherein each of the first routing interconnections includes a lower layer formed on the substrate and a lower layer formed on the lower layer of the first routing interconnections Wherein each of the second routing wirings includes a lower layer formed on the substrate and a lower layer formed on the lower layer of the second routing wiring, And an upper layer connected to the lower layer.

The touch screen panel according to the present invention further includes a plurality of first pads connected to the plurality of first routing lines, respectively; Each of the first pads being formed on the substrate and connected to a lower layer of the first routing wiring, and a second layer formed on the substrate, A second layer formed on the first layer and connected to an upper layer of the first routing wiring; and a third layer formed on the second layer, wherein each of the second pads is formed on the substrate A second layer formed on the first layer of the second pad and connected to an upper layer of the second routing wiring, and a second layer formed on the second layer, And a second layer formed on the second layer.

According to another aspect of the present invention, there is provided a method of manufacturing a touch screen panel, including: preparing a substrate including an electrode formation region and a routing wiring formation region located outside the electrode formation region; Forming a first conductive layer on the substrate and patterning the first conductive layer to form a first conductive pattern group including a lower layer of the first routing wiring and a lower layer of the second routing wiring in the routing wiring formation area ; A second conductive layer is formed on the substrate on which the first conductive pattern group is formed and the second conductive layer is patterned to form a plurality of first electrode patterns and a plurality of first electrode patterns, Forming a plurality of first electrode columns including first connection patterns connecting patterns; Forming an insulating layer on the substrate on which the first electrode lines are formed and patterning the insulating layer to form first insulation patterns on the first connection patterns of the electrode formation region, Forming a second insulation pattern on the lower layers of the second insulation layer, respectively; And forming a third conductive layer in the electrode formation region of the substrate on which the first insulation patterns and the second insulation pattern are formed and patterning the third conductive layer to form a pattern in a direction crossing the plurality of first electrode lines Wherein the first electrode patterns and the first connection patterns are integrally formed and the thickness of the first electrode pattern is thicker than the thickness of the first connection pattern, .

In the method, the plurality of first electrode row forming steps may include: forming the second conductive layer on the substrate on which the first conductive pattern group is formed; Forming a first photoresist pattern having a first height and a second height lower than the first height using a photolithography process using a halftone mask; Etching the second conductive layer using the first photoresist pattern as a mask to remove a second conductive layer in a portion where the first photoresist pattern is not located; Ashing the photoresist pattern until the portion of the photoresist having the second height is removed; And etching the exposed portion of the second conductive layer exposed by the ashing to form the first connection patterns connecting the plurality of first electrode patterns and the adjacent first electrode patterns to the electrode formation region Forming the plurality of first electrode rows; And removing the remaining photoresist pattern.

The plurality of second electrode row forming steps may include depositing the third conductive layer on the substrate on which the first insulating patterns and the second insulating pattern are formed, And forming the plurality of second electrode lines crossing the plurality of first electrode lines by patterning the third conductive layer using a mask, wherein each of the plurality of second electrode lines includes a plurality of Wherein the second electrode patterns and the second connection patterns are integrally formed, and the thickness of the second electrode pattern is greater than the thickness of the second electrode pattern, Is equal to the thickness of the second connection pattern.

The second connection pattern and the first connection pattern are formed to cross each other with the first insulation pattern interposed therebetween. The first connection pattern is formed below the first insulation pattern, Is formed on the first insulating pattern.

According to the capacitive touch screen panel and the method of manufacturing the same according to the embodiment of the present invention, the first electrode pattern is formed on the substrate with a thickness larger than that of the first connection pattern. Therefore, when the insulating layer is etched by dry etching to form an insulating pattern, the first electrode pattern can protect the substrate from the etching gas particles, thereby preventing defects of the touch screen panel due to undercut.

1 is a plan view of a conventional capacitive touch screen panel,
FIG. 2 is a sectional view taken along lines I-I ', II-II', and III-III 'of the capacitive touch screen panel shown in FIG.
FIGS. 3A to 3E are cross-sectional views illustrating a manufacturing process of a capacitive touch screen panel according to a conventional technique shown in FIG. 1;
4 is a plan view of a capacitive touch screen panel according to an embodiment of the present invention,
5 is a cross-sectional view taken along lines I-I ', II-II', III-III ', and IV-IV' of the capacitive touch screen panel shown in FIG.
6A and 6B are a plan view and a sectional view showing a first step of a manufacturing process of a touch screen panel according to an embodiment of the present invention,
7A to 7G are a plan view and a cross-sectional view illustrating a second process using a halftone mask in a manufacturing process of a touch screen panel according to an embodiment of the present invention,
8A and 8B are a plan view and a cross-sectional view illustrating a third step of the manufacturing process of the touch screen panel according to the embodiment of the present invention,
9A and 9B are a plan view and a cross-sectional view illustrating a fourth step of a manufacturing process of a touch screen panel according to an embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals refer to like elements throughout the specification.

First, a touch screen panel according to an embodiment of the present invention will be described with reference to FIGS. 4 and 5. FIG. FIG. 4 is a plan view of a touch screen panel according to an exemplary embodiment of the present invention. FIG. 5 is a sectional view taken along the line I-I ', line II-II', and line III- III ', and IV-IV', respectively.

4 and 5, a capacitive touch screen panel according to an embodiment of the present invention includes an electrode forming portion A, a routing wiring portion B, and a pad portion C. As shown in FIG.

The electrode forming portion A includes a plurality of first electrode rows Tx arranged in a first direction (e.g., an X axis direction) and a plurality of first electrode rows Tx arranged in a second direction , Y-axis direction) of the second electrode rows Rx.

Each of the first electrode lines Tx includes first electrode patterns 141 formed of a triangle, a quadrangle, a rhombic, a polygon, a circle, an ellipse, And connection patterns 143. The second electrode patterns 151 formed by a triangle, a quadrangle, a rhombic, a polygon or the like similar to the first electrode patterns 141 of the second electrode rows Rx and the second electrode patterns 151 formed by the adjacent second electrode patterns 151, And second connection patterns 153 connecting the first and second connection patterns.

In the touch screen panel according to the embodiment of the present invention, the first connection patterns 143 are formed integrally with the first electrode patterns 141, but the thickness of the first electrode patterns 141 is different from that of the first connection patterns 141 143). On the other hand, the second connection patterns 153 are formed integrally with the second electrode patterns 151, but the thickness of the second electrode patterns 151 and the thickness of the second connection patterns 153 are the same.

The first connection pattern 143 of the first electrode row Tx and the second connection pattern 153 of the second electrode row Rx are formed to intersect the first insulation pattern 150, The connection pattern 143 is formed under the first insulation pattern 150 and the second connection pattern 153 is formed on the first insulation pattern 150.

 The routing wiring portion B includes a plurality of first routing wirings 112 formed in the outer portion of the electrode forming portion A and connected to the plurality of first electrode rows Tx, And a plurality of second routing wirings 114 connected to the plurality of second routing wirings Rx. Each of the first routing wirings 112 includes a lower layer 112a formed on the substrate 100 and an upper layer 112b formed on the upper portion of the lower layer 112a, Each of the light emitting devices 114 includes a lower layer 114a formed on the substrate 100 and an upper layer 114b formed on the upper portion of the lower layer 114a. The first and second routing interconnects 112 and 114 are protected by a second insulation pattern 152.

The pad portion C includes a plurality of first pads 116 connected to the plurality of first electrode lines Tx through the plurality of first routing lines 112, And a plurality of second pads 118 connected to the plurality of second electrode rows Rx through the plurality of second electrode lines Rx. Each of the first pads 116 also includes a first layer 116a formed on the substrate 100 and a second layer 116b formed on the first layer 116a to cover the first layer 116a. And a third layer 116c formed on the second layer 116b exposed through the contact hole of the second insulation pattern 152. The second layer 116b is exposed through the contact hole of the second insulation pattern 152. [ A first layer 118a formed on the substrate 100 of the second pads 118 and a second layer 118b formed on the first layer 118a to cover the first layer 118a, And a third layer 118c formed on the second layer 128b exposed through the contact hole of the second insulation pattern 152. [

Meanwhile, in the touch screen panel according to the embodiment of the present invention, the first and second electrode rows Tx and Rx, the upper layers 112b and 114b of the first and routing wirings, The second layers 116b and 118b and the third layers 116c and 118c of the first and second pads may be formed of a transparent material such as indium tin oxide (ITO), indium zinc oxide (IZO), gallium-doped zinc oxide The lower layers 112a and 114a of the first and second routing wirings and the first layers 116a and 118a of the first and second pads are formed of a conductive material such as Al, AlNd, Mo, MoTi, Cu, CuOx, Cr, and the like.

Hereinafter, a method of manufacturing a capacitive touch screen panel according to an embodiment of the present invention will be described with reference to FIGS. 6A to 9B. FIGS. 6A and 6B are a plan view and a cross-sectional view illustrating a first step of a manufacturing process of a touch screen panel according to an embodiment of the present invention. FIGS. 7A to 7G are cross- FIGS. 8A and 8B are a plan view and a cross-sectional view illustrating a third step of the manufacturing process of the touch screen panel according to the embodiment of the present invention, and FIGS. 9A and 9B are cross- And FIG. 9B are a plan view and a cross-sectional view illustrating a fourth step of the manufacturing process of the touch screen panel according to the embodiment of the present invention.

6A and 6B, a lower layer 112a of a first routing wiring and a lower layer 114a of a second routing wiring are formed on a substrate 100 by using a photolithography process using a first mask, A first conductive pattern group including a first layer 116a of the pad and a first layer 118a of the second pad is formed.

 In more detail, the first conductive layer is deposited on the substrate 100 including the electrode forming portion A, the routing wiring portion B, and the pad portion C by a deposition process such as sputtering. As the material for forming the first conductive layer, Al, AlNd, Mo, MoTi, Cu, CuOx, Cr and the like are used.

The photolithography process using the first mask is performed after the entire surface of the photoresist is coated on the substrate on which the first conductive layer is formed so that the whole area of the electrode formation portion A and the entire area of the routing wiring portion B and the pad portion C The first photoresist pattern exposing the first conductive layer in a partial region of the first photoresist pattern is formed. Then, the first conductive layer exposed by the first photoresist pattern is removed through wet etching, and then the remaining first photoresist pattern is removed. Thus, the routing wiring portion B is electrically connected to the first and second routing wirings The lower layers 112a and 114a are formed and the first layers 116a and 118a of the first and second pads are formed in the pad portion C. [

7A to 7G, a first electrode line Tx and a first electrode line Tx are formed on a substrate 100 on which a first conductive pattern group is formed by using a photolithography process using a halftone mask, A second conductive pattern group including the upper layers 112b and 114b of the first and second pads and the second layers 116b of the first and second pads is formed.

In more detail, as shown in FIG. 7B, the second conductive layer TL1 is completely deposited on the substrate 100 through a deposition process such as sputtering. As a material for forming the second conductive layer TL1, a transparent conductive material such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or GZO (Gallium Zinc Oxide) is used.

After the second conductive layer TL1 is formed on the substrate 100, a first height h1 and a second height h2 are formed by using a photolithography process using a half tone as shown in Fig. a photoresist pattern PR having a thickness h2 is formed. The first height h1 is set to have a value greater than the second height h2. The portion of the photoresist pattern PR having the first height h1 is disposed at a position where the first electrode patterns to be described later are to be formed and the portion having the second height h2 is disposed at a position where the first connection patterns are to be formed A routing portion B to which the first and second routing wirings are to be formed, and a pad portion C on which the first and second pads are to be formed, respectively.

Next, the second conductive layer TL1 is exposed and developed using the photoresist pattern PR as a mask, and wet etching is performed to form a second conductive layer PR in a portion where the photoresist pattern PR is not located. The conductive pattern TL1 'as shown in Fig. 7D is formed by removing the layer TL1. When the second conductive layer TL1 is etched, the second conductive layer TL1 is over-etched so that the conductive patterns TL1 'are under-etched so as to facilitate removal of the photoresist pattern PR in a post- cut structure.

7E, by using an ashing process using an oxygen plasma or the like, the second height h2 portion of the photoresist pattern PR disposed at the position where the first connection patterns are to be formed To expose the first connection patterns, the first and second routing wirings, and the conductive patterns TL1 'at the positions where the first and second pads are to be formed. At this time, the photoresist pattern at the portion where the first electrode patterns are to be formed in the electrode forming portion A becomes lower by h1 and becomes a photoresist pattern PR 'having a height of h2-h1.

7F, the photoresist pattern PR 'having a reduced height is used as a mask to form conductive patterns A, B and C of the electrode forming portion A, the routing wiring portion B and the pad portion C TL1 'are wet-etched to form a first connection pattern 143 having a reduced thickness and a first electrode pattern 141 having an original thickness. At this time, the upper layers 112b and 114b of the first and second routing wirings and the second layers 116b and 118b of the first and second pads, which are also thinned in the routing wiring part B and the pad part C, .

Next, as shown in FIG. 7G, the first electrode pattern 141 formed integrally with the electrode forming portion A and the first electrode pattern 141 'formed integrally with the electrode forming portion A are removed by lifting off the photoresist pattern PR' The upper layers 112b and 114b of the first and second routing wirings formed in the routing wiring part B and the second layers 116b and 118b formed in the pad part C can be obtained. The first electrode pattern 141 and the first connection pattern 143 form a first electrode row Tx.

8A and 8B, the first insulating patterns 150 and the second insulating patterns 152 are formed on the substrate 100 on which the second conductive pattern group is formed by using the photolithography process using the third mask .

More specifically, the first electrode lines Tx, the upper layers 112b and 114b of the first and second routing wirings, and the second layers 116b and 118b of the first and second pads, An insulating layer is formed on the entire surface of the substrate 100 having the second conductive pattern group formed thereon through a deposition method such as sputtering. As the material of the insulating layer, an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide is preferable, but an organic insulating material such as photo-acrylic may be used, or a hybrid material obtained by synthesizing them may be used.

Next, a photolithography process using a third mask is performed to form a third photoresist pattern exposing a part of the insulating layer. In the embodiment of the present invention, the portion of the insulating layer exposed by the third photoresist pattern is a portion except for the first connection patterns 143, that is, the first electrode patterns 141 in the electrode forming portion A And the second layers 116b and 118b of the first and second electrode pads are formed in the pad portion C, respectively.

The insulating layer exposed by the third photoresist pattern is removed by dry etching, and then the remaining third photoresist pattern is removed to form first insulating patterns 150 formed on the first connection patterns 143, 2 insulating patterns 152 are formed. In the embodiment of the present invention, the first electrode pattern 141 formed of a material such as ITO, IZO, or GZO is formed on the substrate 100 in a thicker thickness than the first connection pattern 143 in the halftone mask process, Since the insulating layer is etched by dry etching after the insulating layer is formed thereon, it is possible to prevent the substrate from being damaged by the etching gas particles for dry etching.

9A and 9B, a plurality of second electrode rows Rx are formed on a substrate 100 on which first and second insulation patterns 150 and 152 are formed by using a fourth mask process. And third layers 116c and 118c of the first and second pads are formed.

In more detail, the third conductive layer is deposited on the substrate 100 on which the first insulating patterns 150 and the second insulating patterns 152 are formed through a deposition process such as sputtering. Then, the third conductive layer is patterned by the photolithography process and the etching process using the third mask to form a second electrode line Tx intersecting the plurality of first electrode lines Tx arranged in the first direction (for example, x direction) A plurality of second electrode rows Rx arranged in a direction (for example, y direction) and a plurality of second layers 116b of the first and second pads exposed through the contact holes of the second insulating pattern 152 And 118b, respectively, are formed on the third layer 116c. Each of the second electrode rows Rx includes a plurality of second electrode patterns 151 and second connection patterns 153 connecting adjacent second electrode patterns 151, The two-electrode patterns 151 and the second connection patterns 153 are integrally formed. The first connection pattern 143 of the first electrode line Tx and the second connection pattern 153 of the second electrode line Rx are formed to intersect with each other with the first insulation pattern 150 interposed therebetween.

The first electrode pattern 141 formed of a material such as ITO, IZO, or GZO in the halftone mask process may be formed to have a thickness greater than that of the first connection pattern 143, . Therefore, when the insulating layer is etched by dry etching to form an insulation pattern, the first electrode pattern can protect the substrate from the etching gas particles, thereby preventing defects of the touch screen panel due to undercut.

A touch screen panel according to an exemplary embodiment of the present invention includes a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), an electroluminescent display device Electroluminescence Device, EL), an electrophoretic display device, and the like. In this case, the substrate of the touch screen panel according to the embodiments of the present invention can be used as a substrate of the display device.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

100: substrate 112: first routing wiring
114: second routing wiring 116: first pad
118: second pad 141: first electrode pattern
143: first connection pattern 150: first insulation pattern
151: second electrode pattern 152: second insulation pattern
A: electrode forming portion B: routing wiring portion
C: pad portion Tx: first electrode column
Rx: second electrode row

Claims (9)

Board;
A plurality of first electrode rows arranged in a first direction on the substrate;
A plurality of second electrode rows arranged in a second direction intersecting with the first electrode rows; And
And an insulating layer formed at an intersection of the first and second electrode rows to electrically isolate the first and second electrode rows,
Wherein each of the first electrode rows includes a plurality of first electrode patterns and first connection patterns connecting adjacent first electrode patterns,
Wherein each of the second electrode rows includes a plurality of second electrode patterns and second connection patterns connecting the adjacent second electrode patterns to each other and formed integrally with the second electrode patterns,
Wherein the first electrode pattern and the first connection pattern are integrally formed, and the thickness of the first electrode pattern is thicker than the thickness of the first connection pattern.
The method according to claim 1,
Wherein a thickness of the second electrode pattern is equal to a thickness of the second connection pattern.
The method according to claim 1,
Wherein the second connection pattern and the first connection pattern are formed to cross each other with the insulation layer interposed therebetween, the first connection pattern is formed under the insulation layer, and the second connection pattern is formed on the insulation layer Wherein the touch screen panel is a touch screen panel.
The method according to claim 1,
A plurality of first routing lines connected to the plurality of first electrode lines, respectively;
Further comprising a plurality of second routing interconnections each connected to the plurality of second electrode columns,
Each of the first routing wirings includes a lower layer formed on the substrate and an upper layer formed on a lower layer of the first routing wiring and connected to the first electrode pattern,
Wherein each of the second routing wirings includes a lower layer formed on the substrate and an upper layer formed on a lower layer of the second routing wiring and connected to the first electrode pattern.
5. The method of claim 4,
A plurality of first pads each connected to the plurality of first routing wirings;
Further comprising a plurality of second pads each connected to the plurality of second routing interconnects,
Each of the first pads being formed on the substrate and connected to a lower layer of the first routing wiring; a second layer formed on the first layer and connected to an upper layer of the first routing wiring; And a third layer formed on the second layer,
Wherein each of the second pads is formed on the substrate and is connected to a lower layer of the second routing wiring and a second layer formed on the first layer of the second pad and connected to the upper layer of the second routing wiring A second layer, and a third layer formed on the second layer.
Preparing a substrate including an electrode formation region and a routing wiring formation region located outside the electrode formation region;
Forming a first conductive layer on the substrate and patterning the first conductive layer to form a first conductive pattern group including a lower layer of the first routing wiring and a lower layer of the second routing wiring in the routing wiring formation area ;
A second conductive layer is formed on the substrate on which the first conductive pattern group is formed and the second conductive layer is patterned to form a plurality of first electrode patterns and a plurality of first electrode patterns, Forming a plurality of first electrode columns including first connection patterns connecting patterns;
Forming an insulating layer on the substrate on which the first electrode lines are formed and patterning the insulating layer to form first insulation patterns on the first connection patterns of the electrode formation region, Forming a second insulation pattern on the lower layers of the second insulation layer, respectively; And
A third conductive layer is formed in the electrode formation region of the substrate on which the first insulation patterns and the second insulation pattern are formed, and the third conductive layer is patterned to form the first insulation pattern in a direction crossing the plurality of first electrode lines And forming a plurality of second electrode columns,
Wherein the first electrode patterns and the first connection patterns are integrally formed, and the thickness of the first electrode pattern is thicker than the thickness of the first connection pattern.
The method according to claim 6,
The plurality of first electrode row forming steps may include:
Forming the second conductive layer on the substrate on which the first conductive pattern group is formed;
Forming a first photoresist pattern having a first height and a second height lower than the first height using a photolithography process using a halftone mask;
Etching the second conductive layer using the first photoresist pattern as a mask to remove a second conductive layer in a portion where the first photoresist pattern is not located;
Ashing the photoresist pattern until the portion of the photoresist having the second height is removed;
And etching the exposed portion of the second conductive layer exposed by the ashing to form the first connection patterns connecting the plurality of first electrode patterns and the adjacent first electrode patterns to the electrode formation region Forming the plurality of first electrode rows; And
And removing the remaining photoresist pattern. ≪ RTI ID = 0.0 > 11. < / RTI >
The method according to claim 6,
Wherein the plurality of second electrode row forming steps comprise:
Depositing the third conductive layer on the substrate on which the first insulating patterns and the second insulating pattern are formed;
And forming the plurality of second electrode lines crossing the plurality of first electrode lines by patterning the third conductive layer using a mask,
Wherein each of the plurality of second electrode columns includes a plurality of second electrode patterns and second connection patterns connecting second electrode patterns adjacent to each other,
Wherein the second electrode patterns and the second connection patterns are integrally formed and the thickness of the second electrode pattern is equal to the thickness of the second connection pattern.
9. The method of claim 8,
Wherein the second connection pattern and the first connection pattern are formed to cross each other with the first insulation pattern interposed therebetween, the first connection pattern is formed below the first insulation pattern, Wherein the first insulation pattern is formed on the first insulation pattern.

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