KR101704260B1 - A Semiconductor Module and A Manufacturing method thereof - Google Patents

Abstract

An embodiment relates to a semiconductor module and a manufacturing method thereof.
The semiconductor module according to the embodiment includes a module substrate 102 on which a semiconductor chip 104 is disposed on an upper surface and a first circuit pattern 106 is disposed on a lower surface of the module substrate 102, And a solder portion S2 electrically connecting the first circuit pattern 106 and the electrode pad 124 to each other. The lower surface of the module substrate 102 may have a predetermined recess R. The first circuit pattern 106 may be disposed in the recess R. [

Description

Technical Field [0001] The present invention relates to a semiconductor module and a manufacturing method thereof,

An embodiment relates to a semiconductor module and a manufacturing method thereof.

A mobile terminal, particularly a smart phone, is a mobile phone to which hardware and software modules capable of wireless telephone communication are added to a device equipped with a miniaturized operating system of a PC. The smartphone can be used as a small electronic computing device connected to an extension device through an internal keyboard, an external USB keyboard, or an external output terminal, which can be used as an application device by e-mail, Internet search, text reading and writing, .

Telematics is a compound word of telecommunication and informatics. It is a compound word of telecommunication and information science. It also not only car navigation but also news, game, stock and financial transactions, You can also provide a system for watching movies.

According to Telematics, it is possible to provide a service that allows various data (image) information to be exchanged by attaching a device having all functions of computer wireless communication satellite navigation to automobile, aircraft, and ship.

According to Telematics, if you apply it to your car, you can send e-mail through the front monitor and retrieve the map, and you can enjoy computer games on the rear monitor.

Telematics services can be made in a joint form between car makers and mobile carriers. For example, depending on the type of telematics service, various services such as news reception, stock investment, electronic commerce, financial transaction, hotel reservation, facsimile transmission / reception, game, vehicle accident and theft are possible. Especially, It can be used for rescue activities by automatically tracking the location of the accident vehicle and delivering it to the nearest rescue team.

In order to implement such a mobile terminal or telematics, various communication modules are required. Such communication modules are manufactured in the form of semiconductor modules and packages of various types.

The wafer level semiconductor package according to the prior art includes a semiconductor package of an LGA (Land Grid Array) structure in which lands are formed under the substrate, a BGA (solder ball) Ball Grid Array) structure.

However, in the semiconductor package of the LGA (Land Grid Array) structure according to the related art, voids are generated during packaging and the electrical characteristics may be deteriorated. Opening or shorting (open) A phenomenon may occur. Also, in the case of the semiconductor package of the BGA (Ball Grid Array) structure according to the related art, the substrate may be warped, and cracking of the solder ball may occur.

Japanese Unexamined Patent Application Publication No. 2005-353965, published on December 22, 2005

Embodiments provide a semiconductor module with improved electrical characteristics and a method of manufacturing the same.

Also, the embodiments are directed to a semiconductor module having improved physical characteristics and a method of manufacturing the same.

The semiconductor module according to the embodiment includes a module substrate 102 on which a semiconductor chip 104 is disposed on an upper surface and a first circuit pattern 106 is disposed on a lower surface of the module substrate 102, And a solder portion S2 electrically connecting the first circuit pattern 106 and the electrode pad 124 to each other. The lower surface of the module substrate 102 may have a predetermined recess R. The first circuit pattern 106 may be disposed in the recess R. [

The method of manufacturing a semiconductor module according to an embodiment of the present invention includes the steps of preparing a module substrate 102 having a semiconductor chip 104 on one surface and a first circuit pattern 106 on the other surface, Forming a bump mask M on the first circuit pattern 106 using the bump mask M and printing the solder paste S1 on the first circuit pattern 106 using the bump mask M, Removing the bump mask M after the printing step, and vacuum-molding the printed solder paste S1 to form the solder portion S2.

Embodiments can provide a semiconductor module with improved electrical characteristics and a method of manufacturing the same.

Also, the embodiment can provide a semiconductor module with improved physical characteristics and a method of manufacturing the same.

1A is a cross-sectional view of a semiconductor module according to an embodiment;
1B is a partial enlarged view of a semiconductor module according to an embodiment.
2A is a photograph of solder part analysis of a comparative semiconductor module.
FIG. 2B is a photograph of the solder part analysis of the semiconductor module according to the embodiment. FIG.
2C is a view of a solder portion of a semiconductor module according to an embodiment.
FIGS. 3 to 10 are cross-sectional views illustrating a method of manufacturing a semiconductor module according to an embodiment.
11 is a perspective view of a mobile terminal to which a semiconductor module according to an embodiment is applied.

In the description of the embodiments, it is to be understood that each layer (film), area, pattern or structure may be referred to as being "on" or "under" the substrate, each layer Quot; on "and" under "are intended to include both" directly "or" indirectly " do. Also, the criteria for top, bottom, or bottom of each layer will be described with reference to the drawings.

(Example)

1A is a cross-sectional view of a semiconductor module 100 according to an embodiment.

The semiconductor module 100 according to the embodiment may include a module substrate portion 110, a main substrate portion 120, a solder portion S2, and the like. The module substrate portion 110 may include a module substrate 102, a first circuit pattern 106, and a semiconductor chip 104. The main substrate unit 120 may include a main substrate 122 and an electrode pad 124.

For example, the semiconductor module 100 according to the embodiment includes a module substrate 102 on which a semiconductor chip 104 is disposed on an upper surface, a first circuit pattern 106 is disposed on a lower surface of the module substrate 102, And a solder portion S2 for electrically connecting the first circuit pattern 106 and the electrode pad 124. The main board 122 may include a first circuit pattern 106 and a solder portion S2 electrically connecting the first circuit pattern 106 and the electrode pad 124. [

The module substrate 102 may be formed of a single substrate or a plurality of substrates. The module substrate 102 may be an insulating substrate. For example, the module substrate 102 may be a thermosetting or thermoplastic polymer substrate, a ceramic substrate, an organic-inorganic composite substrate, or a glass fiber composite substrate.

When the module substrate 102 includes a polymer resin, it may include an epoxy-based insulating resin such as FR-4, bismaleimide triazine (BT), and ABF (Ajinomoto Build-up Film) But is not limited thereto.

A semiconductor chip 104 may be disposed on the upper surface of the module substrate 102 and a predetermined molding portion may be formed on the semiconductor chip 104 to protect the semiconductor chip 104. The semiconductor chip may be a processor chip or an electronic device, but is not limited thereto.

For example, the electronic device may be a passive device such as a resistor, an inductor, or a capacitor, but is not limited thereto.

A conductive first circuit pattern 106 may be formed on the lower surface of the module substrate 102. For example, the first circuit pattern 106 may be formed of a land grid array type, but is not limited thereto.

The first circuit pattern 106 may be formed by an additive process, a subtractive process, a modified semi- additive process (MSAP), or a semi-additive process (SAP) It is not.

The first circuit pattern 106 may be electrically connected to the semiconductor chip 104 through a predetermined conductive via (not shown). The conductive vias may be formed by forming via holes in the module substrate 102 by a machining method. For example, a predetermined via hole (not shown) may be formed in the main substrate 122 by a machining method such as a milling, a drill, or a routing. Alternatively, the via hole may be formed by laser processing or chemical processing.

Thereafter, a predetermined conductive via can be formed by filling the via hole with a metal material. For example, the conductive via may be formed using any one material selected from among Cu, Ag, Sn, Au, Ni, and Pd, and may be formed by electroless plating, electrolytic plating, screen printing, sputtering, But it is not limited thereto, and may be formed by filling the via hole using any one of a combination of electrophoresis, inkjetting, and dispensing, or a combination thereof.

1B is a partially enlarged schematic view of a semiconductor module 100 according to an embodiment.

In an embodiment, the module substrate 102 may have a predetermined recess (R).

For example, the module substrate 102 may have a predetermined recess R that is concave upward with respect to the lower surface 102B of the module substrate 102. [ The recess R may be in the form of a trench as shown, but is not limited thereto.

The recess R may be formed in the main substrate 122 by a machining method, a laser machining method, or a chemical machining method, but is not limited thereto.

In an embodiment, the first circuit pattern 106 may be disposed within the recess R. For example, the bottom portion 106B of the first circuit pattern may be positioned higher than the bottom surface 102B of the module substrate. Also, the first circuit pattern 106 may not protrude from the lower surface 102B of the module substrate. Thus, it is possible to prevent a short circuit between the first circuit patterns 106.

The solder portion S2 may be formed by a screen printing solder bump process, but is not limited thereto. The solder portion S2 may be formed using any one of lead-free solder, Pb / In / Ag or Sn / Pb / Cd / In, but is not limited thereto. The lead-free solder may be Cu / Ag / Sn or Cu / Sb / Ag / Sn.

In an embodiment, a portion of the solder S2 may be disposed within the recess R of the module substrate 102. [ For example, the upper portion ST of the solder portion S2 may be disposed in the recess R of the module substrate 102 to widen the contact area of the solder portion S2 to improve the physical bonding force .

2A is a photograph of solder part analysis of a comparative semiconductor module.

The comparative example is a photograph of a solder portion (SA) analysis in a packaging process of an LGA (Land Grid Array) type, and the concentration of voids (V) in the solder portion SA in the comparative example reaches about 30% to 45%. As a result, according to the comparative example, there are cases where electrical characteristics and physical characteristics are poor.

2B is a photograph of the solder portion S2 of the semiconductor module according to the embodiment.

The void concentration of the solder portion S2 in the semiconductor module according to the embodiment can be controlled to 10% or less, which is excellent in electrical characteristics and physical characteristics.

 For example, the void concentration of the solder portion S2 in the semiconductor module according to the embodiment may be about 5% or less. Also, when the embodiment is applied, the void concentration of the solder portion S2 in the semiconductor module can be controlled to about 3.5% or less.

For example, in the data of the embodiment analyzed in Fig. 2B, the void concentration of solder S2 was scarcely scaled close to 0%.

As the concentration of voids in the solder portion in the semiconductor module according to the embodiment is lowered, the electrical conductivity is improved and the electrical characteristics can be remarkably improved.

Also, as the void concentration of the solder portion in the semiconductor module according to the embodiment is improved, the occurrence of the solder crack can be remarkably improved.

2C is a photograph of a solder portion of the semiconductor module according to the embodiment.

On the other hand, according to the related art, since the void concentration is high, the height of the solder portion can not be secured properly, and there is a problem that an open between the solder portion and the circuit pattern occurs.

As the void concentration of the solder portion S2 in the semiconductor module according to the embodiment is improved, the height H of the solder portion can be sufficiently secured, so that the mechanical and electrical reliability can be improved.

For example, in the embodiment, the height H of the solder portion can be ensured to be about 0.10 mm to 0.50 mm, and the width W of the solder portion can be ensured to be about 0.20 mm to 0.60 mm, but is not limited thereto.

For example, in the embodiment, the height H of the solder portion can be secured to about 0.35 mm to 0.40 mm, and the width W of the solder portion can be secured to about 0.850 mm to 0.900 mm, but is not limited thereto.

   In addition, the upper surface design of the solder portion S2 in the embodiment may be circular, rounded square, rectangular or rhombic, but is not limited thereto.

Hereinafter, a method of manufacturing a semiconductor module according to an embodiment will be described with reference to FIGS. 3 to 10. FIG. The following description of the manufacturing method will be described with reference to the drawings, but the manufacturing method is not limited to the drawings or the sequence of the following description.

3, a module substrate unit 110 is prepared. The module substrate unit 110 may include a module substrate 102, a first circuit pattern 106, and a semiconductor chip 104.

The semiconductor chip 104 may be disposed on one side of the module substrate 102 and the first circuit pattern 106 may be disposed on the other side.

The module substrate 102 may be formed of a single substrate or a plurality of substrates.

The module substrate 102 may be an insulating substrate. For example, the module substrate 102 may be a thermosetting or thermoplastic polymer substrate, a ceramic substrate, an organic-inorganic composite substrate, or a glass fiber impregnated substrate.

In addition, when the module substrate 102 includes a polymer resin, it may include an epoxy-based insulating resin such as FR-4, bismaleimide triazine (BT), or Ajinomoto Build-up Film (ABF) But the present invention is not limited thereto.

A semiconductor chip 104 may be disposed on one side of the module substrate 102. For example, the semiconductor chip 104 may be disposed on the lower surface of the module substrate 102 and the molding resin (not shown) may be formed on the semiconductor chip 104 based on FIG. 3, but the present invention is not limited thereto.

The semiconductor chip may be a processor chip or an electronic device, but is not limited thereto. For example, the electronic device may be a passive device such as a resistor, an inductor, or a capacitor, but is not limited thereto.

A first circuit pattern 106 may be formed on the other surface of the module substrate 102. For example, the first circuit pattern 106 may be formed on the upper surface of the module substrate 102 as a land grid array type based on FIG. 3, but the present invention is not limited thereto.

The first circuit pattern 106 may be formed by an additive process, a subtractive process, a modified semi- additive process (MSAP), or a semi-additive process (SAP) no.

The first circuit pattern 106 may be electrically connected to the semiconductor chip 104 through a predetermined conductive via (not shown).

For example, a predetermined via hole (not shown) may be formed in the main substrate 122 by a machining method such as a milling, a drill, or a routing. Alternatively, the via hole can be formed by laser processing or chemical processing.

Then, a predetermined conductive via may be formed in the via hole by filling a metal material. For example, the conductive via may be formed using any one material selected from among Cu, Ag, Sn, Au, Ni, and Pd, and may be formed by electroless plating, electrolytic plating, screen printing, sputtering, May be formed by filling using any one of the following methods, eco-deposition, ink-jetting or dispensing, or a combination thereof, but is not limited thereto.

In an embodiment, the module substrate 102 may have a predetermined recess R as shown in FIG. 1B. For example, the module substrate 102 may have a predetermined recess R based on the lower surface 102B of the module substrate 102. [ The recess R may be in the form of a trench as shown, but is not limited thereto.

The recess R may be formed in the main substrate 122 by a machining method, a laser machining method, or a chemical machining method, but is not limited thereto.

In an embodiment, the first circuit pattern 106 may be disposed within the recess R. For example, the bottom portion 106B of the first circuit pattern may be positioned higher than the bottom surface 102B of the module substrate. Also, the first circuit pattern 106 may not protrude from the lower surface 102B of the module substrate.

Next, a solder S2 is formed on the module substrate 102 through the steps of FIGS. The solder portion S2 may be formed by a screen printing solder bump process, but is not limited thereto.

First, as shown in FIG. 4, a bump mask M for exposing the first circuit pattern 106 is formed on the module substrate 102. The bump mask M may be formed using a photoresist PR, but is not limited thereto.

Next, as shown in FIG. 5, the solder paste S1 is printed using the bump mask M.

The solder paste S1 may be any one of lead-free solder, Pb / In / Ag or Sn / Pb / Cd / In, but is not limited thereto. The lead-free solder may be Cu / Ag / Sn or Cu / Sb / Ag / Sn.

The bump mask M may be formed to have a height as shown in Table 1 according to the width W of the solder S2 to be formed later, but the present invention is not limited thereto.

Solder portion S2 width (W, mm) Bump mask (M) Height (mm) 0.1 to 0.2 0.2 to 0.25 0.2 to 0.3 0.3 to 0.35 0.3 to 0.4 0.4 to 0.45 0.4 to 0.5 0.5 to 0.60

Next, as shown in FIG. 6, the bump mask M is removed by an ashing process or the like.

Next, as shown in FIG. 7, the printed solder paste S1 is vacuum-formed in a predetermined chamber C to form a solder portion S2 as shown in FIG.

The chamber (C), which is a vacuum forming equipment, is required to satisfy the reflow oven specification and to be able to make a vacuum atmosphere in the soldering section, and the level thereof must satisfy the vacuum forming condition.

Vacuum equipment which can be employed in the embodiment should be a device capable of maintaining a vacuum level of at least 1.0 kPa. In addition, the vacuum equipment must be capable of controlling the evacuation rate in reaching the vacuum level.

In embodiments, the vacuum pressure and vacuum time during vacuum forming may vary depending on the set conditions of the solder required.

In the vacuum molding method of the embodiment, the vacuum pressure may be about 0.5 kPa to 10.0 kPa, and the vacuum time may be about 18 sec to 60 sec, but is not limited thereto.

When the vacuum pressure exceeds 10.0 kPa, the shape of the formed solder portion may be deformed, the shape of the sphere may not be formed, and the solder may be scattered.

When the vacuum pressure is less than 0.5 kPa, the formed solder portion may have a size larger than the required size, the density of the solder portion may be lowered, and a defect phenomenon such as void (puncture) .

In embodiments, if the vacuum time of the vacuum forming exceeds 60 seconds, the same or similar defects may occur at high vacuum pressures.

Also, when the vacuum forming time is less than 18se, the same or similar failure may occur at a lower vacuum pressure.

As the void concentration of the solder portion S2 in the semiconductor module according to the embodiment is lowered, the electrical conductivity is improved and the electrical characteristics can be remarkably improved.

In addition, as the void concentration of the solder portion S2 in the semiconductor module according to the embodiment is improved, the occurrence of solder cracks can be remarkably improved.

Also, as the void concentration of the solder portion S2 in the semiconductor module according to the embodiment is improved, the height of the solder portion can be sufficiently secured, so that the mechanical and electrical reliability can be improved. For example, in the embodiment, the height H of the solder portion can be secured to about 0.35 mm to 0.40 mm, and the width W of the solder portion can be secured to about 0.850 mm to 0.900 mm, but is not limited thereto.

Next, as shown in FIG. 9, a main substrate 122 having an electrode pad 124 on its upper surface is prepared. A second solder 126 may be formed on the electrode pad 124.

Next, the module substrate 102 is mounted on the main substrate 122 as shown in FIG.

The semiconductor module according to the embodiment can be applied to a mobile terminal, a telematics device, and the like, but is not limited thereto.

For example, FIG. 11 is a perspective view of a mobile terminal or a mobile terminal according to an embodiment viewed from the front.

The mobile terminal 200 shown in FIG. 11 includes a bar-shaped terminal body. However, the embodiments are not limited thereto, and the present invention is applicable to various structures such as a slide type, a folder type, a swing type, and a swivel type in which the above-mentioned bodies are relatively movably coupled.

In an embodiment, the body of the mobile terminal 200 may include a case (casing, housing, cover, etc.) which forms an appearance.

In the embodiment, the case may be divided into a front case 201 and a rear case 202. Various electronic components may be embedded in the space formed between the front case 201 and the rear case 202. [ At least one intermediate case may be additionally disposed between the front case 201 and the rear case 202. [

The cases may be formed by injection molding of a synthetic resin or may be formed of a metal material such as stainless steel (STS) or titanium (Ti).

An output unit 251, an audio output unit 252, a camera 212, a user input unit 232, a microphone 222, an interface 270, and the like may be disposed in the front body 201.

The output unit 251 can occupy most of the main surface of the front case 201. [ The sound output unit 216 and the camera 221 may be disposed in an area adjacent to one end of both ends of the output unit 251 and the user input unit 233 and the microphone may be disposed in an area adjacent to the other end.

The user input unit 232 and the interface 270 may be disposed on the side surfaces of the front case 201 and the rear case 202.

The user input unit is operated to receive a command for controlling the operation of the mobile terminal 200 and may include a plurality of operation units 231. [ The operation units 231 may be collectively referred to as a manipulating portion and may be employed in any manner as long as the user operates in a tactile manner with a tactile impression.

The features, structures, effects and the like described in the embodiments are included in at least one embodiment and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects and the like illustrated in the embodiments can be combined and modified by other persons skilled in the art to which the embodiments belong. Accordingly, the contents of such combinations and modifications should be construed as being included in the scope of the embodiments.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention. It can be seen that the modification and application of branches are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that the present invention may be embodied in many other specific forms without departing from the spirit or essential characteristics thereof.

The module substrate portion 110, the semiconductor chip 104, the first circuit pattern 106, the module substrate 102,
The main board portion 120, the electrode pad 124, the main board 122, the solder portion S2,

Claims (13)

A module substrate having a semiconductor chip disposed on an upper surface thereof and a first circuit pattern disposed on a lower surface thereof;
A main substrate having an electrode pad on an upper surface thereof;
And a solder portion electrically connecting the first circuit pattern and the electrode pad,
The lower surface of the module substrate has a predetermined recess,
Wherein the first circuit pattern is disposed within the recess,
The bottom of the first circuit pattern is positioned higher than the bottom of the module substrate so that the entire first circuit pattern is embedded in the recess of the module substrate
The upper portion of the solder portion
A module substrate disposed within the recess of the module substrate and having a side surface defining the recess in the module substrate,
Semiconductor module. delete The method according to claim 1,
The first circuit pattern
LGA (Land Grid Array) type semiconductor module. The method according to claim 1,
And a void in the solder portion is 10% or less. 5. The method of claim 4,
Wherein a void in the solder portion is 5% or less. The method according to claim 1,
And a portion of the solder portion is disposed in the recess. Preparing a module substrate on which a semiconductor chip is disposed on one side and a first circuit pattern is disposed on the other side;
Forming a bump mask on the module substrate;
Printing a solder paste on the first circuit pattern using the bump mask;
Removing the bump mask after printing the solder paste; And
And forming a solder portion by vacuum-molding the printed solder paste,
The lower surface of the module substrate has a predetermined recess,
Wherein the first circuit pattern is disposed in the recess,
The bottom of the first circuit pattern is positioned higher than the bottom of the module substrate so that the entire first circuit pattern is embedded in the recess of the module substrate
The upper portion of the solder portion
A module substrate disposed within the recess of the module substrate and having a side surface defining the recess in the module substrate,
A method of manufacturing a semiconductor module. delete 8. The method of claim 7,
The step of vacuum-molding the printed solder paste to form a solder portion
Lt; RTI ID = 0.0 > kPa < / RTI > to 1.0 kPa. delete delete 8. The method of claim 7,
Wherein a void in the solder portion is 10% or less. 13. The method of claim 12,
And a void in the solder portion is 5% or less.

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