KR101676035B1 - Display apparatus and method for operating display apparatus - Google Patents

Abstract

A display device is provided. The display device includes a pixel array in a panel portion. The display device includes a data driver for supplying a scan control signal and a scan signal for selecting a first scan line of the pixel array and supplying a data signal to each pixel of the first scan line, And a decoder unit for decoding the first scan line of the pixel array and transmitting the scan signal to the first scan line.

Description

DISPLAY APPARATUS AND METHOD FOR OPERATING DISPLAY APPARATUS [0002]

Some embodiments of the present invention relate to a display device, and more particularly to an implementation of a scan driver that selects a scan line of a pixel array of a display device.

2. Description of the Related Art Recently, display devices have been implemented using flat panel panels such as TFT LCDs, PDPs, and OLEDs.

Such a flat panel panel includes a pixel array composed of a plurality of rows and columns. In this case, the scan driver selects a row-directional scan line, and the data driver applies a data signal to each pixel of the selected scan line, thereby performing display on one scan line.

However, when a scan driver IC (Integrated Circuit) including a shift register and a buffer is disposed outside the panel by a conventional method, the manufacturing cost is high and the bonding between the panel and the scan driver IC ) Limits the flexibility of the panel.

Therefore, if a scan driver is implemented so as to select a scan line in a panel without implementing a scan driver circuit in a separate IC, it is advantageous in applications such as the implementation of a flexible panel, and the cost for producing a display device can be reduced.

On the other hand, when the scan driver circuit is implemented in a panel and the scan driver circuit is controlled through a signal line for selecting a scan line, it is necessary to reduce the number of signal lines and reduce the DC stress of each transistor element .

There is provided a display device and a method of driving a display device that can realize a scan driver for selecting a scan line of a pixel array within a panel, thereby lowering the production cost and increasing the flexibility of the panel.

There is also provided a display device and a method of driving a display device that reduce variations in threshold voltage Vth (threshold voltage) by reducing DC stress of each transistor element in a scan driver implemented in a panel.

According to an aspect of the present invention, there is provided a display device including a pixel array in a panel portion, comprising: a scan driver for supplying a scan control signal and a scan signal for selecting a first scan line of the pixel array, And a decoder unit for decoding the scan control signal to select a first scan line of the pixel array and transferring the scan signal to the first scan line, is provided .

According to an embodiment of the present invention, the decoder unit may be included in the panel unit.

According to an embodiment of the present invention, the scan control signal is a first digital value of log ₂ (N) bits that identifies the first scan line among the N scan lines of the pixel array. Where N is a natural number as the number of rows of the pixel array.

In this case, the decoder unit decodes the first digital value to turn on the switches of the first scan line among the N scan lines.

In this embodiment, when the first scanning line is an odd-numbered scanning line, the scanning signal is input to N / 2 odd-numbered scanning lines of N scanning lines of the pixel array, Value to turn on the switches of the first scan line and to transfer the scan signal to the first of the N / 2 odd-number scan lines.

If the first scan line is an even scan line, the scan signal is input to N / 2 even-numbered scan lines of N scan lines of the pixel array, and the decoder unit decodes the first digital value The switches of the first scan line may be turned on and the scan signal may be transmitted to the first one of the N / 2 even scan lines.

According to an embodiment of the present invention, when the scan control signal is not the first digital value, the decoder unit pulls down the first scan line through parallel switches that are complementary to the switches of the first scan line .

Meanwhile, according to another embodiment of the present invention, the scan control signal may be a log ₂ (N / 2) bit of the first scan line and the second scan line simultaneously identifying the first scan line and the second scan line among the N scan lines of the pixel array. 2 is a digital value.

In this case, the decoder unit may decode the second digital value to turn on the switches of the first and second scan lines among the N scan lines, and the scan signal may be supplied to the first scan line and the And is transferred to the first one of the two scanning lines.

On the other hand, in the above embodiment, the first scan line is the k1-th scan line of the pixel array and the second scan line is the k2-th scan line of the pixel array, the value of k1mod4 is 0 or 1, 4 is 2 or 3, the scan signal is input to N / 2 k-th scan lines in which the value of k mod 4 among the N scan lines of the pixel array is 0 or 1.

Herein, k1 or k2 denotes a row of the first scan line or a row of the second scan line, and is a natural number. K denotes a row of any of the plurality of scan lines of the pixel array, and is a natural number.

Then, the decoder unit decodes the second digital value to turn on the switches of the first scan line and the switches of the second scan line, and the scan signal is supplied to the N / And is transferred to the first one of the two scan lines.

Also, the first scan line is the k1-th scan line of the pixel array and the second scan line is the k2-th scan line of the pixel array, the value of k1mod4 is 2 or 3 and the value of k2mod4 is 0 Or 1, the scan signal is input to N / 2 scan lines where the value of k mod 4 of the N scan lines of the pixel array is 2 or 3.

Then, the decoder unit decodes the second digital value to turn on the switches of the first scan line and the switches of the second scan line, and the scan signal is supplied to the N / And is transferred to the first one of the two scan lines.

In this embodiment, if the scan control signal is not the second digital value, the decoder unit may pull down the first scan line through parallel switches complementary to the switches of the first scan line.

The decoder unit may further include an additional pull down switch that is turned on by the voltage value of the next line of the first scan line to pull down the first scan line when the next line of the first scan line is selected .

Meanwhile, in the above embodiments, the first scan lines may include a plurality of pairs of scan line switches configured in parallel.

In this case, when the decoder unit decodes the scan control signal to select the first scan line of the pixel array and transfers the scan signal to the first scan line, each of the plurality of scan line switch pairs During a half of the time that a scan signal is transferred to the first scan line, the scan signal is transferred through one scan line switch, and during the remaining half of the time the scan signal is transferred to the first scan line, And transmits the scan signal through one of the scan line switches.

According to another aspect of the present invention, there is provided a method of driving a display device including a pixel array in a panel portion, the method comprising: receiving a scan control signal and a scan signal for selecting a first scan line of the pixel array from a data driver; The method comprising: decoding the scan control signal; and selecting a first scan line of the pixel array and transferring the scan signal to the first scan line.

It is possible to reduce the number of signal lines without requiring a separate scan driving IC to be bonded to the outside of the panel, so that the production cost of the flat panel display device can be reduced and the flexibility of the panel can be increased.

Further, since the DC stress of each transistor element for scan driving can be reduced, the distortion of the pixel value is reduced.

1 shows a display device according to an embodiment of the present invention.
2 shows a decoder unit according to an embodiment of the present invention.
Fig. 3 shows an exemplary waveform of the scan control signal input to the decoder section according to the embodiment of Fig.
4 shows an exemplary waveform of a scan signal for selecting a scan line in the decoder section according to the embodiment of FIG.
Fig. 5 shows a configuration of an exemplary pull-down switch included in the decoder unit according to the embodiment of Fig.
FIG. 6 illustrates the exemplary pull down switches of FIG. 5 included in the decoder portion according to the embodiment of FIG.
7 shows a decoder unit according to another embodiment of the present invention.
Fig. 8 shows an exemplary waveform of the scan control signal input to the decoder section according to the embodiment of Fig.
FIG. 9 shows an exemplary waveform of a scan signal for selecting a scan line in the decoder section according to the embodiment of FIG.
Fig. 10 shows a configuration of an exemplary pull-down switch included in the decoder section according to the embodiment of Fig.
FIG. 11 illustrates the exemplary pull down switches of FIG. 10 included in the decoder portion according to the embodiment of FIG.
12 shows a configuration in which scan control switches of a decoder unit are configured in parallel according to an embodiment of the present invention.
Fig. 13 shows an exemplary waveform of the scan control signal input to the decoder section according to the embodiment of Fig.
FIG. 14 illustrates a method of driving a display device according to an embodiment of the present invention.

Hereinafter, some embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to or limited by the embodiments. Like reference symbols in the drawings denote like elements.

1 shows a display device 100 according to an embodiment of the present invention.

The panel unit 130 includes a pixel array 140.

The pixel array 140 includes a plurality of pixels. The plurality of pixels included in the pixel array 140 constitute a matrix having a plurality of rows and columns.

The plurality of pixels of the pixel array 140 may be organic light emitting diodes (OLEDs), thin film transistor liquid crystal displays (TFTs), or the like. The OLED includes AMOLED (Active Matrix Organic Light Emitting Diode) and PMOLED (Passive Matrix Organic Light Emitting Diode).

Accordingly, the present invention should not be construed as being limited to a certain type of pixel element, and various modifications and variations of the present invention may be made without departing from the scope of the present invention. Variations and applications are also not excluded from the scope of the present invention.

The data driver IC 110 is also referred to as a column driver and transmits pixel values to pixels of the selected scan line.

Conventionally, when a scan driver selects a scan line of the pixel array 140 outside the panel unit 130, the data driver 110 transmits pixel values to pixels of the selected scan line.

As described above, when a separate scan driver IC is disposed outside the panel unit 130, the manufacturing cost of the display device 100 is increased due to the configuration of the shift register and the buffer, and the bending or twisting of the panel is possible The flexibility to do this is limited.

The scan driver for selecting the row direction scan lines of the pixel array 140 is not formed of a separate IC outside the panel unit 130 but may be formed inside the panel unit 130 A decoding unit 120 to be arranged selects a scanning line.

Here, the decoding unit 120 receives the scan control signal and the scan signal from the data driver 110.

The scan control signal is received in the form of a digital value identifying the first scan line to be selected from among the N scan lines constituting the pixel array 140.

The decoding unit 120 decodes the digital value to select the first one of the N scan lines of the pixel array 140 and transmits the received scan signal. In this case, the data driver 120 transmits pixel values to the respective pixels of the first scan line.

The exemplary configuration and operation of the decoding unit 120 will be described in more detail below with reference to FIG.

2 shows a decoder unit 200 according to an embodiment of the present invention.

In this embodiment, it is assumed that the number of scan lines of the pixel array 140 is eight for convenience of explanation.

The digital value that can identify any one of the eight scan lines is log ₂ (8) = 3 bits.

The scan control signal is received by the decoder unit 200 in the form of a 3-bit digital signal of D0, D1 and D2. Hereinafter, it is assumed that D2 is the MSB (Most Significant Bit). The inverting value of each bit can be made simple by using separate inverters.

the out 1 scan line is selected by the scan control signal 000 which is a digital value, and the out 2 scan line is selected by the scan control signal 001.

In this way, the out 7 scan line is selected by the scan control signal 110 which is a digital value, and the out 8 scan line is selected by the scan control signal 111.

On the other hand, the scan signal is received by the data driver 110 through two nodes of In_odd and In_even.

The In_odd node inputs the scan signal to odd-numbered scan lines among the N scan lines. The In_even node inputs the scan signal to the even scan lines among the N scan lines.

The scan control signals for sequentially selecting the scan lines out 1 to out 8 in the present embodiment will be described later with reference to FIG. 3, and the In_odd and In_even scan signals will be described later with reference to FIG.

FIG. 3 shows an exemplary waveform 300 of the scan control signal input to the decoder section 200 according to the embodiment of FIG.

The D2 bit has a logic low value for four clocks and a logic high value for the next four cycles.

The D1 bit has a logic low value for two clocks and a logic high value for the next two cycles.

The D0 bit is repeated every clocklogic low and logic high.

Accordingly, the scan control signals are changed in the order of digital values 000, 001, 010, 011, 100, 101, 110 and 111 by D2 to D0,

In the structure of the scan line switches in the decoder 200 of FIG. 2, out 1, out 2, out 3, out 4, out 5, out 6, out 7, out 8 scan lines are selected in turn, The scan lines and below are selected in order.

This process can be understood as a process in which the scan control signal in digital value form is decoded.

FIG. 4 shows an exemplary waveform 400 of a scan signal for selecting a scan line in the decoder section 200 according to the embodiment of FIG.

The In_odd scan signal simultaneously inputs a logic high value, which is a scan signal, to odd-numbered scan lines out 1, out 3, out 5, and out 7.

The In_even scan signal inputs a logic high value, which is a scan signal, to the even scan lines out 2, out 4, out 6, and out 8 simultaneously.

Referring again to FIGS. 2 to 3, it can be understood that when the scan control signal is 000, all the scan line switches of the out 1 scan line are turned on and the In_odd scan signal of the logic high is delivered to the out 1 scan line have.

The In_odd scan signal changes to a logic low before the scan control signal changes from 000 to 001, and a logic low value is input to the out 1 scan line. Thus, pull down is performed on the out 1 line.

When the scan control signal is changed to 001, it is understood that the scan line switches of the out 2 scan lines are all turned on and the In_even scan signal of the logic high is transmitted to the out 2 scan line.

Before the scan control signal changes from 001 to 010, the In_even scan signal also changes to a logic low to input a logic low value to the out 2 scan line. Thus, pull down is performed on out 2 lines.

Out 1, out 2, out 3, out 4, out 5 are repeated while the scan control signal is changed in the order of 000, 001, 010, 011, , out 6, out 7, and out 8 scan lines are selected in turn, and out of the out 0 scan lines are sequentially selected.

The In_odd scanning signal and the In_even scanning signal are alternately transmitted to the scanning lines in turn.

N number of control signals are required in order to sequentially select N row-direction scan lines by the conventional scan driver IC, but according to the embodiment, the scan control signals are log ₂ (N) Two are required.

That is, in the above embodiment, the total number of control signals (including both the scan control signal and the scan signal) for sequential selection of the scan lines is reduced to log ₂ (N) + 2.

For example, in a qVGA class pixel array, the scan line N is 320, and when using a conventional scan driver IC, a minimum of 320 control signals are required. According to the embodiment, log ₂ (320) + 2 = 10.32, 11 control signals are required.

This difference becomes larger as the scan line N increases, that is, as the pixel array becomes higher definition.

Of course, the scan line switches may be additionally disposed in each scan line of the decoder unit 200 of FIG. 2, and the inverters for the scan control lines may need to be arranged. However, compared with the separate scan driver IC, And can be integrated together in the panel unit 130. [0064]

On the other hand, the pull-down of each of the scan lines out 1 to out 8 other than the 1/8 cycle selected by itself is performed, and additional pull-down switches for performing the pull-down operation are added .

This will be described in more detail below with reference to FIG.

FIG. 5 illustrates a configuration 500 of an exemplary pull-down switch included in decoder portion 200 according to the embodiment of FIG.

When DC stress is applied to the transistor, the threshold voltage Vth can be shifted. This degrades device characteristics, such as reducing the operating speed in future operations, resulting in a decrease in performance of the display device.

Therefore, according to the embodiment of the present invention, the pull-down can be maintained in the scan control signal values (001, 010, 011, 100, 101, 110 and 111) , A pull-down switch that is turned on by D2, a pull-down switch that is turned on by D1, and a pull-down switch that is turned on by D0 are connected in parallel as shown.

In this case, the duty of each pull-down switch is about 50%, so the DC stress of the pull-down switch can also be kept at a low level.

Likewise, all the scan lines of out 2 or less are provided with dual pull-down switches in each of the scan line switches of each scan line.

FIG. 6 illustrates a view 600 in which the exemplary pull-down switches of FIG. 5 are included in the decoder portion 200 according to the embodiment of FIG.

The selection and pull-down process of each scan line in accordance with the scan control signals D2 to D0 and the scan signals In_odd and In_even are as described above with reference to FIGS.

7 shows a decoder unit 700 according to another embodiment of the present invention.

According to this embodiment, the number of scan lines that can be selected by the 3-bit scan control signal composed of D2 to D0 can be increased to 16 instead of 8.

In the present embodiment, the out 1 scan line and the out 2 scan line are selected by the scan control signal 000 in the same manner.

However, the out 1 scan line is selected when the scan signal In_a is a logic high value and the scan signal In_b is a logic low, and the out 2 scan line is selected when the scan signal In_a is a logic low value and the scan signal In_b is logic high .

The scan control signal waveform for this scan line selection process in this embodiment will be described in more detail below with reference to FIG. 8, and the waveforms of the scan signals In_a and In_b will be described in more detail below with reference to FIG.

FIG. 8 shows an exemplary waveform 800 of the scan control signal input to the decoder section 700 according to the embodiment of FIG.

D2 of the scan control signal remains logic low for eight clocks and remains logic high for the next eight clocks.

And D1 of the scan control signal maintains a logic low for four clocks, and remains logic high for the next four clocks.

D0 of the scan control signal repeats logic low and logic high every two clocks.

Therefore, the scan control signals of the first clock and the second clock are both digital values of 000.

This point corresponds to the point that the scan line switch of the out 1 scan line and the scan line switch of the out 2 scan line in the decoder unit 700 of FIG. 7 have the same configuration.

However, the In_a and In_b scan signals must be input differently so that the out 1 scan line is selected in the first clock and the out 2 scan line is selected in the second clock. This will be described later with reference to FIG.

FIG. 9 shows an exemplary waveform 900 of a scan signal for selecting a scan line in the decoder portion 700 according to the embodiment of FIG.

The scan signal In_a has a logic high value at the first, fourth, fifth, eighth, ninth, twelfth, thirteenth, and sixteenth clocks. That is, it has a logic high value when the remainder obtained by dividing the row of the scan line by 4 is 0 or 1.

Here, the row line time indicated on the waveform 900 of FIG. 9 corresponds to one clock.

If expressed as a mathematical expression, the modulation symbol mod is used and expressed as a case where k mod 4 is 0 or 1.

The scan signal In_b has a logic high value at the second, third, sixth, seventh, tenth, eleventh, fourteenth, fifteenth, etc. clocks as opposed to the scan signal In_a. That is, it has a logic high value when the remainder obtained by dividing the row of the scan line by 4 is 2 or 3.

Therefore, for k, which is a row of arbitrary scan lines, if k mod 4 is 0 or 1, In_a has a value of logic high and out 1, out 4, out 5, out 8, out 9, out 12 , out 13, out 16 input scan signals of logic high to the scan lines.

If k mod 4 is 2 or 3, In_b has a logic high value and a logic high scan signal is applied to the outline 2, out 3, out 6, out 7, out 10, out 11, out 14, .

Therefore, both the out 1 scan line and the out 2 scan line are selected at the first clock and the second clock, but the scan signal is transmitted to the out 1 scan line by the In_a scan signal at the first clock, and the scan signal is transmitted at the second clock by the In_b scan The scanning signal is transferred to the out 2 scanning line by the signal.

In this manner, to drive the scan lines of the pixel array 140 having N scan lines, _two (2) scan control signals are required, and two scan signals are required.

Therefore, since the total number of scan control signals is required to be log ₂ (N / 2) + 2, the N control signals of the conventional scan driver IC and the log ₂ (N) + 2 A smaller number of control signals than the control signal are required.

As described above with reference to FIG. 5, since the specific scan line must be pulled down during the remaining clocks other than the clock selected by itself, the decoder unit 700 of FIG. Pull down switches may be added.

This will be described in more detail below with reference to FIG.

FIG. 10 shows a configuration 1000 of an exemplary pull down switch included in decoder portion 700 according to the embodiment of FIG.

5, in which the pull-down switches complementary to the scan line switches of each scan line are connected in parallel.

It should be noted, however, that additional pull-down switches that are turned on by the voltage of the next scan line are added to the even-numbered scan lines, such as out 2, out 4, and so on.

This can be explained with reference to the In_a and In_b scan signal waveforms 900 in Fig.

In the process in which the out 2 scan line is selected at the second clock of the waveform 900 and the out 3 scan line is selected at the third clock, while the In_b scan signal does not change back to a logic low, And the pull-down of the out 2 scan line is not performed.

Accordingly, when the out 3 scan line is selected and becomes logic high, it is fed back to forcibly perform pull-down of the out 2 scan line.

The same applies to the switches that are added to the out 4 scan lines and feed back the input of the out 5 scan lines to form a pull down.

In accordance with one embodiment of the present invention, to achieve a fast pull down, these additional pull down switches may be larger than other conventional pull down switches.

FIG. 11 illustrates the exemplary pull down switches 1000 of FIG. 10 included in the decoder portion 700 according to the embodiment of FIG.

the scan lines of the out 1 scan line and the out 2 scan line have the same configuration. In the first clock, a scan signal is delivered to the out 1 scan line by the In_a scan signal, and out 2 The process of transmitting the scan signal to the scan line is as described above with reference to FIGS.

The input of the out 3 scan line is fed back to the additional pull-down switch disposed in the out 2 scan line to form a pull-down of the out 2 scan line, as described above with reference to FIG.

According to the embodiments of FIGS. 7 to 11, in the case of the qVGA, log ₂ (320/2) + 2 = 9.32, so 10 control signals (including both the scan control signal and the scan signal) are required.

Fig. 12 shows a figure 1200 in which the scan line switches of the decoder section are configured in parallel according to an embodiment of the present invention.

In the above description with reference to FIG. 5 or 10, the pull-down switches of the respective scan lines are connected in parallel so that the duty of each switch is reduced to 50% when pulling down.

In this embodiment, the scan line switches of each of the scan lines together with the above embodiments form a switch pair, each of which is configured in parallel.

In this case, the duty of each of the scan line switches is reduced to 50% while one scan line is selected and the scan signal is transmitted. Thus, the DC stress is greatly reduced.

FIG. 13 shows an exemplary waveform 1300 of the scan control signal input to the decoder section according to the embodiment of FIG.

Each bit D1 of the scan control signal in the embodiments described with reference to Figs. 2 to 11 is subdivided into D1a and D1b, and one of the pair of the scanning line switches in parallel is turned on alternately I can understand that.

D0 and other scan control signals are the same.

FIG. 14 illustrates a method of driving a display device according to an embodiment of the present invention.

In step S1410, the decoder unit 120 of FIG. 1 receives a scan control signal and a scan signal in the digital value form from the data driver IC 110. FIG.

In this case, the exemplary waveform of the scan control signal that can be set differently according to the embodiment of the decoder unit 120 is as described above with reference to FIG. 3 or FIG.

An exemplary waveform of the scan signal according to each of the above embodiments is as described above with reference to FIG. 4 or FIG.

In step S1420, the decoder unit 120 decodes the scan control signal in the digital value form. Then, in step S1430, the scan signal is transmitted to the selected scan line. Such a decoding process is as described above with reference to FIG. 2 to FIG.

While the present invention has been described with reference to exemplary embodiments of the decoder unit 120, the present invention should not be construed as being limited to these embodiments. Therefore, it is obvious that the configuration of the decoder unit 120, the application of changing the scan control signal, the waveform of the scan signal, and the like can be applied within the scope of not changing the spirit of the present invention.

The method according to an embodiment of the present invention can be implemented in the form of a program command which can be executed through various computer means and recorded in a computer-readable medium. The computer-readable medium may include program instructions, data files, data structures, and the like, alone or in combination. The program instructions recorded on the medium may be those specially designed and constructed for the present invention or may be available to those skilled in the art of computer software. Examples of computer-readable media include magnetic media such as hard disks, floppy disks and magnetic tape; optical media such as CD-ROMs and DVDs; magnetic media such as floppy disks; Magneto-optical media, and hardware devices specifically configured to store and execute program instructions such as ROM, RAM, flash memory, and the like. Examples of program instructions include machine language code such as those produced by a compiler, as well as high-level language code that can be executed by a computer using an interpreter or the like. The hardware devices described above may be configured to operate as one or more software modules to perform the operations of the present invention, and vice versa.

While the invention has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. This is possible.

Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined by the equivalents of the claims, as well as the claims.

100: display device
110: Data driver IC (Data driver IC)
120: Decoder Unit
130:
140: Pixel Array

Claims (23)

A display device comprising a pixel array in a panel portion,
A data driver for supplying a digitally encoded scan control signal and a scan signal for selecting a first scan line among the plurality of scan lines of the pixel array and supplying a data signal to each pixel of the first scan line; And
A decoder unit for decoding the scan control signal to select a first scan line of the pixel array and transferring the scan signal to the first scan line,
And a display device. The method according to claim 1,
And the decoder unit is included in the panel unit. The method according to claim 1,
Wherein the scan control signal is a first digital value of log ₂ (N) bits that identifies the first scan line among N scan lines of the pixel array,
And the decoder unit decodes the first digital value to turn on the switches of the first scan line among the N scan lines. The method of claim 3,
When the first scan line is an odd-numbered scan line,
The scan signal is input to N / 2 odd-numbered scan lines of the N scan lines of the pixel array,
Wherein the decoder unit decodes the first digital value to turn on the switches of the first scan line and to transmit the scan signal to the first one of the N / 2 odd scan lines. The method of claim 3,
If the first scan line is an even scan line,
The scan signal is input to N / 2 even-numbered scan lines of the N scan lines of the pixel array,
Wherein the decoder unit decodes the first digital value to turn on the switches of the first scan line and to transfer the scan signals to the first one of the N / 2 even scan lines. The method of claim 3,
Wherein the decoder unit pulls down the first scan line through parallel switches that are complementary to the switches of the first scan line when the scan control signal is not the first digital value. The method according to claim 1,
Wherein the scan control signal is a second digital value of log ₂ (N / 2) bits that simultaneously identifies the first and second scan lines of the N scan lines of the pixel array,
Wherein the decoder unit decodes the second digital value to turn on the switches of the first and second scan lines among the N scan lines,
And the scan signal is transmitted to the first one of the first scan line and the second scan line. 8. The method of claim 7,
The first scan line is a k1-th scan line of the pixel array and the second scan line is a k2-th scan line of the pixel array, the value of k1mod4 is 0 or 1 and the value of k2mod4 is 2 or 3 Quot;
Wherein the scan signal is input to N / 2 k < th > scan lines in which the value of k mod4 among the N scan lines of the pixel array is 0 or 1,
When the decoder unit decodes the second digital value and turns on the switches of the first scan line and the switches of the second scan line, the scan signal is supplied to the N / 2 Of the first scan line among the plurality of scan lines. 8. The method of claim 7,
The first scan line is a k1-th scan line of the pixel array and the second scan line is a k2-th scan line of the pixel array, the value of k1mod4 is 2 or 3 and the value of k2mod4 is 0 or 1 Quot;
Wherein the scan signal is input to N / 2 < RTI ID = 0.0 > kth < / RTI > scan lines having a value of k mod 4 of N scan lines of the pixel array of 2 or 3,
When the decoder unit decodes the second digital value and turns on the switches of the first scan line and the switches of the second scan line, the scan signal is supplied to the N / 2 Of the first scan line among the plurality of scan lines. 8. The method of claim 7,
Wherein the decoder unit pulls down the first scan line through parallel switches that are complementary to the switches of the first scan line when the scan control signal is not the second digital value. 11. The method of claim 10,
Wherein the decoder section comprises an additional pull down switch that is turned on by the voltage value of the next line of the first scan line to pull down the first scan line when the next line of the first scan line is selected, . The method according to claim 1,
Wherein the first scan line includes a plurality of pairs of scan line switches each configured in parallel,
When the decoder unit decodes the scan control signal to select the first scan line of the pixel array and transfers the scan signal to the first scan line,
Wherein each of the plurality of pairs of scan line switches transfers the scan signals through one of the scan line switches during a half of the time that the scan signals are transferred to the first scan line, And transmits the scan signal through the other of the scan line switches during the other half of the time that is passed to the scan line. A method of driving a display device including a pixel array in a panel portion,
Receiving a digitally encoded scan control signal and a scan signal to select a first one of a plurality of scan lines of the pixel array from a data driver;
Decoding the scan control signal; And
Selecting a first scan line of the pixel array and delivering the scan signal to the first scan line
And driving the display device. 14. The method of claim 13,
Wherein the scan control signal is a first digital value of log ₂ (N) bits that identifies the first scan line among N scan lines of the pixel array,
Wherein the decoding comprises:
And decodes the first digital value to turn on the switches of the first scan line among the N scan lines. 15. The method of claim 14,
When the first scan line is an odd-numbered scan line,
The scan signal is input to N / 2 odd-numbered scan lines of the N scan lines of the pixel array,
The decoding may include decoding the first digital value to turn on the switches of the first scan line,
Wherein the transferring step transfers the scan signal to the first one of the N / 2 odd-numbered scan lines. 15. The method of claim 14,
If the first scan line is an even scan line,
The scan signal is input to N / 2 even-numbered scan lines of the N scan lines of the pixel array,
The decoding may include decoding the first digital value to turn on the switches of the first scan line,
And the transferring step transfers the scan signal to the first one of the N / 2 even-numbered scan lines. 15. The method of claim 14,
Pulling down the first scan line through parallel switches complementary to the switches of the first scan line if the scan control signal is not the first digital value
Further comprising the steps of: 14. The method of claim 13,
Wherein the scan control signal is a second digital value of log ₂ (N / 2) bits that simultaneously identifies the first and second scan lines of the N scan lines of the pixel array,
Wherein the decoding step comprises decoding the second digital value to turn on the switches of the first and second scan lines among the N scan lines,
Wherein the transferring step transfers the scan signal to the first one of the first scan line and the second scan line. 19. The method of claim 18,
The first scan line is a k1-th scan line of the pixel array and the second scan line is a k2-th scan line of the pixel array, the value of k1mod4 is 0 or 1 and the value of k2mod4 is 2 or 3 Quot;
Wherein the scan signal is input to N / 2 k < th > scan lines in which the value of k mod4 among the N scan lines of the pixel array is 0 or 1,
The decoding may include decoding the second digital value to turn on the switches of the first scan line and the switches of the second scan line,
Wherein the transferring step transmits the scan signal to the first scan line among the N / 2 scan lines in which the value of k mod 4 is 0 or 1. 19. The method of claim 18,
The first scan line is a k1-th scan line of the pixel array and the second scan line is a k2-th scan line of the pixel array, the value of k1mod4 is 2 or 3 and the value of k2mod4 is 0 or 1 Quot;
Wherein the scan signal is input to N / 2 < RTI ID = 0.0 > kth < / RTI > scan lines having a value of k mod 4 of N scan lines of the pixel array of 2 or 3,
The decoding may include decoding the second digital value to turn on the switches of the first scan line and the switches of the second scan line,
Wherein the transferring step transfers the scan signal to the first scan line among the N / 2 scan lines in which the value of k mod 4 is 2 or 3. 19. The method of claim 18,
Pulling down the first scan line through parallel switches complementary to the switches of the first scan line if the scan control signal is not the second digital value
Further comprising the steps of: 22. The method of claim 21,
And when the next line of the first scan line is selected, turning on the additional pull-down switch by the voltage value of the next line of the first scan line to pull down the first scan line
Further comprising the steps of: 22. A computer readable recording medium containing a program for carrying out the method of any one of claims 13 to 22.

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