KR101644501B1 - Light emitting device, light emitting device package, and lighting apparatus - Google Patents

Abstract

Embodiments relate to a light emitting device, a light emitting device package, and a method of manufacturing a light emitting device.
A light emitting device according to an embodiment includes a substrate; A plurality of compound semiconductor layers including a first conductive semiconductor layer below the substrate, an active layer below the first conductive semiconductor layer, and a second conductive semiconductor layer below the active layer; A first electrode electrically connected to the first conductive semiconductor layer; A second electrode electrically connected to the second conductive semiconductor layer; And a first phosphor layer formed on the substrate.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting device, a light emitting device package,

Embodiments relate to a light emitting device, a light emitting device package, a method of manufacturing a light emitting device, and a lighting device.

III-V nitride semiconductors (group III-V nitride semiconductors) are widely recognized as key materials for light emitting devices such as light emitting diodes (LEDs) and laser diodes (LD) due to their physical and chemical properties. The III-V group nitride semiconductors are usually made of a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0? X? 1, 0? _Y? 1, 0? _X + y?

BACKGROUND ART Light emitting diodes (LEDs) are a kind of semiconductor devices that convert the electric power to infrared rays or light using the characteristics of compound semiconductors, exchange signals, or use as a light source.

 And is widely used in light emitting devices for obtaining light of an LED or an LD using such a nitride semiconductor material and has been applied as a light source for various products such as a keypad light emitting portion of a cellular phone, an electric sign board, a display device, and a lighting device.

Embodiments provide a light emitting device having a phosphor layer of uniform thickness on the top side and / or the bottom side of a light emitting device and a method of manufacturing the same.

The embodiment provides a light emitting device package in which a light emitting element having a phosphor layer is packaged.

A light emitting device according to an embodiment includes a substrate; A plurality of compound semiconductor layers including a first conductive semiconductor layer below the substrate, an active layer below the first conductive semiconductor layer, and a second conductive semiconductor layer below the active layer; A first electrode electrically connected to the first conductive semiconductor layer; A second electrode electrically connected to the second conductive semiconductor layer; And a first phosphor layer formed on the substrate. The first phosphor layer may be formed on the upper surface of the substrate to have a uniform thickness. The horizontal width of the first phosphor layer may be equal to the horizontal width of the upper surface of the substrate. The embodiment may further include at least one of a transparent electrode layer and a reflective electrode layer disposed under the second conductive type semiconductor layer. The second electrode may be electrically connected to at least one of the transparent electrode layer and the reflective electrode layer. The reflective electrode layer may be in ohmic contact with the second conductivity type semiconductor layer.

A light emitting device according to an embodiment includes a light transmitting substrate; A plurality of compound semiconductor layers including a first conductive type semiconductor layer below the transparent substrate, an active layer below the first conductive type semiconductor layer, and a second conductive type semiconductor layer below the active layer; A transparent electrode layer formed on the second conductive semiconductor layer; A second electrode formed on the transparent electrode layer; A second phosphor layer formed on the transparent electrode layer; And a first electrode electrically connected to the first conductive semiconductor layer. The embodiment may further include a third phosphor layer disposed on the first region of the transparent electrode layer, and the second electrode may be interposed between the third phosphor layers.

A light emitting device package according to an embodiment includes: a substrate; A plurality of compound semiconductor layers including a first conductive semiconductor layer below the substrate, an active layer below the first conductive semiconductor layer, and a second conductive semiconductor layer below the active layer; A first electrode formed under the first conductive semiconductor layer; And a second electrode formed under the second conductive type semiconductor layer; A phosphor layer formed on a top side of the light emitting element; A body having a plurality of lead terminals electrically connected to the electrodes of the light emitting element; And a resin layer formed around the light emitting element. The light emitting device may be mounted on the plurality of lead terminals in a flip chip manner.

A method of manufacturing a light emitting device according to an embodiment of the present invention includes: forming a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on a light transmitting substrate; Forming an electrode layer on the second conductive semiconductor layer; Exposing a portion of the first conductive semiconductor layer; Forming a first electrode on the first conductive semiconductor layer and a second electrode on the electrode layer; And forming a phosphor layer below the translucent substrate.

The embodiment can provide a white light emitting diode chip.

Embodiments can reduce color coordinate spread.

Embodiments can improve color uniformity.

The embodiment can provide the phosphor layer with a uniform thickness.

Embodiments can improve the reliability of the light emitting device and the package having the light emitting device.

1 is a side sectional view showing a light emitting device according to a first embodiment.
2 to 6 are views illustrating a manufacturing process of the light emitting device of FIG.
7 is a view showing a package including the light emitting device of FIG.
8 is a side sectional view showing a light emitting device according to the second embodiment.
9 is a side sectional view showing a light emitting device according to a third embodiment.
10 is a view showing a package including the light emitting element of FIG.
11 is a side sectional view showing a light emitting device according to the fourth embodiment.

In describing an embodiment, it is to be understood that each layer (film), region, pattern or structure is formed "on" or "under" a substrate, each layer On "and" under "include both the meaning of" directly "and" indirectly ". In addition, the criteria for above or below each layer will be described with reference to the drawings. The technical features of the embodiments are not limited to the embodiments, but can be selectively applied to other embodiments.

Hereinafter, embodiments will be described with reference to the accompanying drawings.

1 is a cross-sectional view illustrating a light emitting device according to a first embodiment.

1, the light emitting device 100 includes a substrate 101, a compound semiconductor layer 110, a reflective electrode layer 130, a first electrode 141, a second electrode 143, and a phosphor layer 150 .

The light emitting device 100 includes an LED using a compound semiconductor layer of a plurality of compound semiconductor layers, for example, a group III-V element, and the LED may be a colored LED that emits light such as blue, green, (Ultra violet) LED. The emitted light of the LED may be implemented using various semiconductors within the technical scope of the embodiment.

The substrate 101 is a growth substrate of an insulating material or a conductive material from which a compound semiconductor can be grown. The substrate 101 may be selected from the group consisting of a sapphire substrate (Al ₂ O ₃ ), GaN, SiC, ZnO, Si, GaP, InP, Ga ₂ O ₃ , and GaAs. Hereinafter, the substrate 101 will be described as an example of a transparent substrate such as sapphire.

A plurality of lens-shaped or stripe-shaped protrusions may be formed on or below the substrate 101, and the protrusions may improve light extraction efficiency.

A semiconductor layer (not shown) may be formed under the substrate 101. The semiconductor layer may be formed of a layer or a pattern using a compound semiconductor of Group 2 to Group 6 elements. The material of the semiconductor layer may be ZnO, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, , AlGaInP, or the like. The semiconductor layer may be formed of, for example, a buffer layer or an undoped semiconductor layer, and the buffer layer reduces the difference in lattice constant with respect to the substrate. The undoped semiconductor layer (not shown) may be formed of a GaN-based semiconductor that is not doped, for example.

A plurality of compound semiconductor layers 110 are formed under the substrate 101. The compound semiconductor layer 110 includes a first conductive semiconductor layer 112, an active layer 114, and a second conductive semiconductor layer 116).

A first conductive semiconductor layer 112 is formed under the substrate 101 and an active layer 114 is formed under the first conductive semiconductor layer 112. A second conductive layer 114 is formed under the active layer 114, Type semiconductor layer 116 is formed. Other semiconductor layers may be disposed above or below the respective layers, but the present invention is not limited thereto.

The first conductive semiconductor layer 112 may be formed of a compound semiconductor of a group III-V element doped with a first conductive type dopant such as GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and the like. When the first conductive type is an N type semiconductor, the first conductive type dopant includes N type dopants such as Si, Ge, Sn, Se, and Te. The first conductive semiconductor layer 112 may be formed as a single layer or a multilayer, but the present invention is not limited thereto. The first conductive semiconductor layer 112 may be formed in the same area or more than the active layer 114.

An active layer 114 is formed under the first conductive semiconductor layer 112 and the active layer 114 may have a single quantum well structure or a multiple quantum well structure. The active layer 114 may be formed using a Group III-V compound semiconductor material, such as a period of a well layer and a barrier layer, for example, a period of an InGaN well layer / a GaN barrier layer, a period of an InGaN well layer / And a period of the InGaN well layer / InGaN barrier layer.

A conductive clad layer may be formed on and / or below the active layer 114, and the conductive clad layer may be formed of a GaN semiconductor having a band gap different from that of the active layer 114 .

The second conductivity type semiconductor layer 116 is formed on the active layer 114 and the second conductivity type semiconductor layer 116 is a compound semiconductor of a Group III-V element doped with the second conductivity type dopant, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP and the like. When the second conductivity type is a P-type semiconductor, the second conductivity type dopant includes a P-type dopant such as Mg, Zn, or the like. The second conductive semiconductor layer 116 may be formed as a single layer or a multilayer, but is not limited thereto.

A third conductive semiconductor layer, for example, a semiconductor layer having a polarity opposite to that of the second conductive type may be formed under the second conductive semiconductor layer 116. Accordingly, at least one of the N-P junction, the P-N junction, the N-P-N junction, and the P-N-P junction structure may be formed on the plurality of compound semiconductor layers 110. In the following description, a structure in which the second conductivity type semiconductor layer 116 is disposed under the plurality of compound semiconductor layers 110 will be described as an example.

A reflective electrode layer 130 is formed under the second conductive type semiconductor layer 116. The reflective electrode layer 130 is in ohmic contact with the second conductive type semiconductor layer 116 and reflects incident light. do.

The reflective electrode layer 130 may be formed as a single layer or a multilayer structure by selectively using a material selected from Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, . The reflective electrode layer 130 may be formed of a multilayer of the above materials and conductive oxide materials such as IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO and the like. For example, IZO / Ni, AZO / Ag , IZO / Ag / Ni, AZO / Ag / Ni, or the like. The reflective electrode layer 130 may not be formed, but the reflective electrode layer 130 is not limited thereto. A transparent electrode layer such as ITO may be disposed between the reflective electrode layer 130 and the second conductive semiconductor layer 116, but the present invention is not limited thereto.

A first electrode 141 is disposed under the first conductive semiconductor layer 112 and a second electrode 143 is formed under the reflective electrode layer 130 and / . The first electrode 141 may include an electrode pad, and the second electrode 143 may have electrode patterns of various shapes and may include electrode pads.

The first electrode 141 may be formed of a metal selected from the group consisting of Cu, Ti, Cr, Ta, Al, In, Pd, Co, Ni, Ge, Ag, , But is not limited thereto. The material of the second electrode 143 may be at least one material selected from the group consisting of Ti, Al, Al alloy, In, Ta, Pd, Co, Ni, Si, Ge, Ag, Ag alloy, Au, Hf, Pt, Or may be formed as a single layer or a multilayer using an alloy.

On the upper surface of the substrate 101, a phosphor layer 150 is formed. The phosphor layer 150 may be coated by a screen printing method or a photo luminescent film (PLF).

The phosphor layer 150 absorbs the first light emitted from the active layer 114 and emits a second light having a different wavelength. The second light emitted from the phosphor layer 150 may have a complementary relationship with the first light emitted from the active layer 114. The second light emitted from the phosphor layer 150 may have a color complementary to that of the first light emitted from the active layer 114, White light can be made.

The phosphor layer 150 is formed to have a uniform thickness on the chip-top side, and excites a part of the first light emitted from the active layer 114 to emit the second light. Thus, 1 light and the second light can be emitted. Here, since the region where the first light and the second light are emitted is emitted to the entire region of the substrate 101, the color coordinate dispersion can be reduced and the color uniformity can be improved.

FIGS. 2 to 6 are views illustrating a manufacturing process of the light emitting device according to the first embodiment.

Referring to FIG. 2, the substrate 101 may be loaded in a growth apparatus, and may be formed in a layer or pattern form using a compound semiconductor of Group 2 to Group 6 elements thereon.

The growth equipment may be an electron beam evaporator, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-type thermal evaporator sputtering, metal organic chemical vapor deposition, and the like, and the present invention is not limited thereto.

The substrate 101 may include a conductive substrate, an insulating substrate, or the like. The substrate 101 may be a sapphire substrate (Al ₂ O ₃ ), GaN, SiC, ZnO, Si, GaP, InP, Ga ₂ O ₃ , Can be selected from the group consisting of. On the upper surface of the substrate 101, a lens-like or stripe-shaped protrusion may be formed. A semiconductor layer may be formed on the substrate 101, and the semiconductor layer may be formed of a layer or a pattern using a compound semiconductor of Group 2 to Group 6 elements. For example, a ZnO layer (not shown), a buffer layer ), And an undoped semiconductor layer (not shown) may be formed.

A first conductive semiconductor layer 112 is formed on the substrate 101. An active layer 114 is formed on the first conductive semiconductor layer 112. A second conductive semiconductor layer 112 is formed on the active layer 114, (116) are formed. Other layers may be disposed above or below each layer, but are not limited thereto.

The first conductive semiconductor layer 112 may be formed of a compound semiconductor of a group III-V element doped with a first conductive type dopant such as GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and the like.

The active layer 114 may be formed on the first conductive semiconductor layer 112 and the active layer 114 may have a single quantum well structure or a multiple quantum well structure.

A conductive clad layer may be formed on and / or below the active layer 114, and the conductive clad layer may be formed of a GaN-based semiconductor or a material having a higher bandgap than the active layer.

The second conductivity type semiconductor layer 116 is formed on the active layer 114 and the second conductivity type semiconductor layer 116 is a compound semiconductor of a Group III-V element doped with the second conductivity type dopant, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP and the like.

The first conductive semiconductor layer 112, the active layer 114, and the second conductive semiconductor layer 116 may be defined as a compound semiconductor layer 110. A third conductive type semiconductor layer, for example, a semiconductor layer having a polarity opposite to that of the second conductive type may be formed on the second conductive type semiconductor layer 116. Accordingly, at least one of the N-P junction, the P-N junction, the N-P-N junction, and the P-N-P junction structure may be formed on the plurality of compound semiconductor layers 110. In the following description, a structure in which the second conductivity type semiconductor layer 116 is disposed on the upper side of the plurality of compound semiconductor layers 110 will be described as an example.

Referring to FIG. 3, mesa etching is performed to expose the first conductive type semiconductor layer 112 to each individual chip region.

The exposed region of the first conductivity type semiconductor layer 112 is a region for forming the first electrode, and may be disposed in a region such as one side or the center of the chip.

A reflective electrode layer 130 may be formed on the second conductive semiconductor layer 116. The reflective electrode layer 130 may be formed before or after the mesa etching, but is not limited thereto.

After the reflective electrode layer 130 is formed, an electrode formation process is performed.

Referring to FIG. 4, a second electrode 143 is formed on the reflective electrode layer 130, and a first electrode 141 is formed on the first conductive semiconductor layer 112. The second electrode 143 may be in direct contact with the reflective electrode layer 130 or may be in direct contact with the reflective electrode layer 130 and the second conductive type semiconductor layer 116. An electrode groove is formed in the reflective electrode layer 130 so that the second electrode 143 and the second conductive type semiconductor layer 116 can be in contact with each other.

The reflective electrode layer 130 may be in ohmic contact with the second conductive semiconductor layer 116 and may diffuse current to the entire region. That is, the reflective electrode layer 130 functions as a current diffusion layer and a light reflection layer.

The reflective electrode layer 130 may be formed as a single layer or a multilayer structure by selectively using a material selected from Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, . The reflective electrode layer 130 may be formed of a multilayer of the above materials and conductive oxide materials such as IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO and the like. For example, IZO / Ni, AZO / Ag , IZO / Ag / Ni, AZO / Ag / Ni, or the like. The reflective electrode layer 130 may not be formed, but the reflective electrode layer 130 is not limited thereto.

Referring to FIG. 5, the substrate 101 is rotated so as to be disposed on the top side. At this time, a protective sheet or the like may be disposed under the chip to prevent damage to the electrodes or the semiconductor layer under the chip.

And may be lapped and / or polished with respect to the upper surface of the substrate 101. The thickness of the substrate 101 may be about 100 to 400 μm, but the thickness is not limited thereto.

The phosphor layer 150 may be formed on the upper surface of the substrate 101. For example, the phosphor layer 150 may be formed by a screen printing method. The phosphor layer 150 may be formed on the upper surface of the substrate 101 to have a uniform thickness.

The phosphor layer 150 may include phosphors of at least one of the phosphor types such as a yellow phosphor, a green phosphor, and a red phosphor.

The first light emitted from the active layer 114 may emit light with a spectrum of blue wavelength, UV wavelength, red wavelength, green wavelength, etc., and the second light emitted from the phosphor layer 150 may emit the first light And the first light and the second light are mixed and can be realized as light of a target color. For example, if the first light is blue light and the second light is yellow light, the target light may be white light. The combination of the phosphor layer 150 and the light emitted from the active layer 112 can be variously changed within the technical scope of the embodiment.

Referring to FIG. 5 and FIG. 6, the chips are separated into individual chip sizes. The process of separating into the individual chip sizes may be performed using a dicing process or a braking process, and the separation process is not limited thereto.

Fig. 7 is a view showing a light emitting device package including Fig. 1 as a second embodiment.

Referring to FIG. 7, the light emitting device package 200 includes a cavity 215 having an open top in the body 210, and the light emitting device 100 is mounted in the cavity 215.

A plurality of lead terminals 201 and 203 are disposed in the cavity 215 and a plurality of lead terminals 201 and 203 are separated by a separating section 217 of the body 210. The bottom surfaces of the lead terminals 201 and 203 Plane.

1, a phosphor layer 150 is formed on a chip-top side of the light emitting device 100, and a first electrode 141 and a second electrode 143 protrude downward from the bottom of the chip . The first electrode 141 and the second electrode 143 are mounted on the lead terminals 201 and 203 using the conductive bumps 205. That is, the light emitting device 100 is mounted on the plurality of lead terminals 201 and 203 in a flip chip manner.

A resin layer 220 is formed on the cavity 215 and a material such as silicon or epoxy may be used for the resin layer 220. A phosphor may be added to the resin layer 220. The phosphor may have a complementary relationship with the phosphor layer 150 or may have a complementary relationship with light emitted from the active layer, but the present invention is not limited thereto.

The phosphor layer 150 is formed on the top side of the light emitting device 100, and the light emitted to the top of the chip may be mixed with each other. In addition, since the phosphor layer 150 is formed on the entire top side of the chip with uniform thickness, it is possible to reduce scattering in the color coordinate area when measuring the color coordinates of each light emitting device package, have.

8 is a view illustrating a light emitting device according to the third embodiment. In describing the third embodiment, the same parts as those of the first embodiment will be referred to in the first embodiment, and redundant description will be omitted.

Referring to FIG. 8, the light emitting device 100A is attached with a phosphor layer 150A on a substrate 101. FIG.

The phosphor layer 150A includes a transparent adhesive layer 153, a phosphor layer 152, and an insulating layer 154. The adhesive layer 153 may be a double-sided tape as a transparent adhesive such as silicone or epoxy. The adhesive layer 153 is adhered on the substrate 101. The phosphor layer 152 is adhered on the adhesive layer 153 and the insulating layer 154 is formed on the phosphor layer 152. The phosphor layer 152 may include a sheet to which a phosphor is added, for example, a photo-luminescent film (PLF).

The insulating layer 154 may be formed of SiO ₂ , SiO _x , SiO _x N _y , Al ₂ O ₃ , TiO _2, or the like as a protective layer.

9 is a cross-sectional view illustrating a light emitting device according to a fourth embodiment. In describing the fourth embodiment, reference will be made to the description given above.

9, the light emitting device 100B includes a transparent electrode layer 120 formed on the second conductive semiconductor layer 116, and a phosphor layer 150B formed on the transparent electrode layer 120. Referring to FIG.

The transparent electrode layer 120 functions as a current diffusion layer. The current diffusion layer includes an oxide or nitride of a transparent material. For example, ITO (indium tin oxide), ITON nitride, IZO (indium zinc oxide), IZTO indium zinc oxide (IZO), indium gallium zinc oxide (IZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO) As shown in FIG. Such a current diffusion layer may not be formed, but the present invention is not limited thereto.

A phosphor layer 150B and a second electrode 143 are formed on the transparent electrode layer 120. The phosphor layer 150B may be formed by a screen printing method. The second electrode 143 may be formed before the phosphor layer 150 is formed. For example, the phosphor layer 150B is formed by screen printing after masking the second electrode 143 region.

In this embodiment, the phosphor layer 150B is formed on the opposite side of the substrate 101, that is, on the chip-top side, and the light emitted to the upper side of the chip can be converted into another light.

10 is a cross-sectional view showing a package including the light emitting element of Fig. 9 as a fifth embodiment.

Referring to FIG. 10, a light emitting device package 200A is mounted on a substrate 250. FIG. The light emitting device package 200A and the substrate 250 function as a light emitting module.

A cavity 215 is formed in the body 210 of the light emitting device package 200A and the light emitting device 100B shown in FIG. The light emitting device 100B has a structure in which a phosphor layer 150B is disposed on a chip-top side and a substrate is disposed under a chip.

The body 210 includes a plurality of lead terminals 201A and 201B and a heat radiating frame 207. The lead terminals 201A and 201B are disposed on both side surfaces of the cavity 215 and are connected to the electrodes of the light emitting device 100B by wires 209. [

The plurality of lead terminals 201A and 201B protrude through the outside of the body and can be bent in multiple stages.

A light emitting device 100B is attached on the heat dissipating frame 207 and a lower end of the light emitting device 100B is exposed on the lower surface of the body 210. [

The substrate 250 includes electrode terminals 251 and 253, a heat dissipation plate 255, an insulation layer 270 and a metal plate 260. The electrode terminals 251 and 253 correspond to the lead terminals 201A and 201B, respectively. The heat dissipating plate 255 is attached to the heat dissipating frame 207 and dissipates heat generated from the light emitting device 100B.

The electrode terminals 251 and 253 are separately disposed on the insulating layer 270 and supply power through a through hole structure or a circuit pattern.

The metal plate 260 dissipates the heat radiated from the plurality of light emitting device packages 200A, thereby stably operating the light emitting device 100B.

11 is a side cross-sectional view of the light emitting device according to the sixth embodiment. In describing the sixth embodiment, reference will be made to the description given above.

11, a first phosphor layer 150 is disposed under the substrate 101, and a second phosphor layer 150B is disposed over the transparent electrode layer 120 in the light emitting device 100C. The first and second phosphor layers 150 and 150B may include phosphors of the same type or phosphors of different types. The light emitting device 100C may be mounted in the manner shown in FIG. 7 or may be mounted in the same manner as in FIG.

The light emitting device according to the embodiment (s) may be packaged and used as a light source for an indicating device, a lighting device, a display device, and the like. The above-described embodiments are not limited to the embodiments, but can be selectively applied to other embodiments described above, and the present invention is not limited to these embodiments.

The features, structures, effects and the like described in the embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to one embodiment. Furthermore, the features, structures, effects and the like illustrated in the embodiments can be combined and modified by other persons skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

A first electrode formed on the first electrode and a second electrode formed on the first electrode and having a first electrode formed on the first electrode and a second electrode formed on the second electrode; Element package 201, 203: lead electrode 210: body

Claims (21)

Board;
A plurality of compound semiconductor layers including a first conductive semiconductor layer below the substrate, an active layer below the first conductive semiconductor layer, and a second conductive semiconductor layer below the active layer;
A first electrode electrically connected to the first conductive semiconductor layer;
A second electrode electrically connected to the second conductive semiconductor layer;
And a first phosphor layer disposed on the substrate,
Wherein the first phosphor layer comprises:
An adhesive layer disposed on the upper surface of the substrate;
A phosphor layer disposed on the adhesive layer; And
And an insulating layer disposed on the phosphor layer. The method according to claim 1,
The first phosphor layer
Wherein the light emitting element is formed on the upper surface of the substrate with a uniform thickness. The method according to claim 1,
The horizontal width of the first phosphor layer is
And a horizontal width of the upper surface of the substrate. The light emitting device according to claim 1, further comprising a reflective electrode layer disposed under the second conductive semiconductor layer,
And the second electrode is electrically connected to the reflective electrode layer. 5. The method of claim 4,
The reflective electrode layer
And the ohmic contact with the second conductivity type semiconductor layer. 5. The method of claim 4,
The reflective electrode layer
Layer or multi-layer using at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf and combinations thereof. The method according to claim 6,
The reflective electrode layer
Wherein at least one conductive oxide material selected from the group consisting of IZO, IZTO, IAZO, IGZO, IGTO, AZO, and ATO is selectively used to form a multilayer structure. The method according to claim 1,
A transparent electrode layer disposed on the second conductive semiconductor layer; And
And a third phosphor layer disposed on the first region of the transparent electrode layer,
And the second electrode is disposed in a second region of the transparent electrode layer. The method according to claim 1,
The phosphor layer
A light emitting device comprising a photo excitation film. The method according to claim 1,
The adhesive layer
A light-emitting device comprising a transparent double-sided adhesive. delete The method according to claim 1,
And a protrusion formed on or below the substrate. 13. The method of claim 12,
The protrusion
And a plurality of protrusions in a lens shape or a stripe shape. The method according to claim 1,
And a third semiconductor layer having a polarity opposite to the second conductivity type below the second conductive type semiconductor layer. Board;
A plurality of compound semiconductor layers including a first conductive semiconductor layer below the substrate, an active layer below the first conductive semiconductor layer, and a second conductive semiconductor layer below the active layer;
A first electrode electrically connected to the first conductive semiconductor layer;
A second electrode electrically connected to the second conductive semiconductor layer;
A first phosphor layer disposed on the substrate;
A transparent electrode layer disposed on the second conductive semiconductor layer; And
And a third phosphor layer disposed on the first region of the transparent electrode layer,
And the second electrode is disposed in a second region of the transparent electrode layer. 16. The method of claim 15,
The second electrode
And the third phosphor layer interposed between the first and second phosphor layers. A body having a plurality of lead terminals electrically connected to the first electrode and the second electrode of the light emitting device of any one of claims 1 to 10 and 12 to 16; And
And a molding part formed around the light emitting element. 18. The method of claim 17,
The light-
And the plurality of lead terminals are mounted in a flip chip manner. 18. The method of claim 17,
The body includes a cavity having an open top,
Wherein the plurality of lead terminals, the light emitting element, and the molding portion are disposed in the cavity. 18. The electronic device according to claim 17, wherein a cavity of the body includes a heat radiation frame disposed between the plurality of lead terminals,
Wherein the heat dissipation frame has the light emitting element attached on an upper surface and the lower surface exposed on a lower surface of the body. A lighting device comprising the light emitting device package according to claim 17.

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