KR101578693B1 - Liquid crystal display device - Google Patents

Abstract

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device in which a second power source input to a digital-analog converter of a data driver is simply generated using a first power source in a digital- It is not necessary to form a circuit for generating a second power source and a wiring for transmitting a second power source is not required to be formed on the data printed circuit board on which the data driver is formed so that the wiring of the data printed circuit board is minimized . The liquid crystal display according to the present invention includes: a liquid crystal panel in which pixels are defined by intersecting gate lines and data lines; A data driver for converting an input pixel signal into an analog voltage and supplying the analog voltage to a data line, the data driver including a digital-analog converter; A power supply for generating a first power supply; And a gamma reference voltage portion for generating a plurality of positive polarity gamma reference voltages and negative polarity gamma reference voltages; Wherein the digital-to-analog converter comprises: a first selector for selecting one of the plurality of positive gamma reference voltages corresponding to the pixel signal and outputting the same; A second selector for selecting one of the plurality of negative gamma reference voltages corresponding to the pixel signal and outputting the same; A second power generator for generating a second power source having a voltage level that is 1/2 of a voltage level of the first power source by receiving the first power source; A first amplifier to which the output of the first selector is applied to the input terminal and the first power and the second power are applied to the power terminal to buffer and output the output of the first selector; A second amplifier to which the output of the second selector is applied to the input terminal and the second power and the base voltage are applied to the power terminal to buffer and output the output of the second selector; And a mux for selecting one of the output of the first amplifier and the output of the second amplifier and outputting the selected one; .

A liquid crystal display, a data driver, a digital-analog converter

Description

[0001] LIQUID CRYSTAL DISPLAY DEVICE [0002]

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device in which a second power source input to a digital-analog converter of a data driver is simply generated using a first power source in a digital- It is not necessary to form a circuit for generating a second power source and a wiring for transmitting a second power source is not required to be formed on the data printed circuit board on which the data driver is formed so that the wiring of the data printed circuit board is minimized .

Generally, the liquid crystal display device has a tendency of widening its application range due to features such as light weight, thinness, and low power consumption driving. Accordingly, liquid crystal display devices are widely used as portable computers such as notebook PCs, office automation devices, and audio / video devices.

In general, a liquid crystal display device displays a desired image on a screen by controlling a light transmission amount according to an image signal applied to a plurality of switching elements for control arranged in a matrix form.

Such a liquid crystal display device includes a liquid crystal panel in which a color filter substrate as an upper substrate and a thin film transistor array substrate as a lower substrate face each other and a liquid crystal layer is filled between the two substrates; And a driving unit for operating the liquid crystal panel.

Hereinafter, a conventional liquid crystal display device according to the related art will be described with reference to the accompanying drawings.

As shown in FIG. 1, a conventional liquid crystal display device includes a thin film transistor array substrate 1 in which a plurality of pixels are defined by intersecting gate lines GL1 to GLn and data lines DL1 to DLm, And a driving unit which is a means for driving the liquid crystal panel.

The driving unit includes a timing control unit (not shown), a gate driving unit 2, a data driving unit 3, a power unit (not shown), and a gamma reference voltage unit (not shown).

The timing control unit generates a gate control signal and a data control signal for driving the pixels using externally input signals, and reorders and outputs pixel signals from the outside.

The gate driver 2 drives gate lines GL1 to GLn using a gate control signal supplied from a timing controller and the data driver 3 uses a data control signal supplied from a timing controller to generate a pixel signal Converted into analog pixel voltages, and then supplied to the data lines DL1 to DLm.

The power supply unit generates a plurality of power supplies required by the timing controller, the gate driver 2 and the data driver 3, and particularly includes a circuit for generating a first power source V _DD1 required by the data driver 3, 2 power source V _DD2 and the gamma reference voltage section includes a plurality of positive (+) gamma reference voltages V _GAMMA1 through V _GAMMA9 and a negative (-) gamma reference voltage V _GAMMA10 to generate a ~ _GAMMA18 V) is supplied to the data driver 3.

The configuration of the data driver 3 in the conventional liquid crystal display device having such a configuration will be described with reference to FIGS. 2 and 3. FIG.

2, the data driver 3 includes a shift register unit 13 for sequentially outputting a sampling signal in response to a gate control signal from the timing controller, A latch section 23 for sequentially latching and outputting the pixel signals of the latch section 23, a digital-to-analog converter section 33 for converting the digital pixel signals from the latch section 23 into analog pixel voltages, And an output buffer section 43 for buffering the pixel voltage from the conversion section 33 and outputting it to the data lines DL1 to DLn.

As shown in FIG. 3, the digital-to-analog converter 33 converts the plurality of positive polarity gamma reference voltages (V _GAMMA1 to V _GAMMA9 ) from the gamma reference voltage section to the pixel signals from the timing control section And a plurality of negative polarity gamma reference voltages (V _GAMMA10 to V _GAMMA18 ) from the gamma reference voltage section, one of which corresponds to the pixel signal from the timing control section A second selector 33b for outputting the first selection signal from the first selector 33a to the input terminal and a first power source V _DD1 from the power source unit is applied to the positive power source terminal, A first amplifier 33c to which a second power source V _DD2 is applied to a negative power terminal and a second amplifier 33b to which the output of the second selection unit 33b is applied to an input terminal and the second power source V _DD2 from the power source unit is a non- applying a source terminal and a ground voltage (V _SS) is A second amplifier 33d applied to the power supply terminal and a second amplifier 33d outputting one of the output of the first amplifier 33c and the output of the second amplifier 33d under the control of the polarity control signal POL from the timing controller. (33e, multiplexer; MUX); .

In the conventional liquid crystal display device having the above-described configuration, the data driver 3 includes a plurality of data drive ICs (integrated circuits) And is connected to the liquid crystal panel and the data printed circuit board via a carrier carrier tape (TCP). The data printed circuit board connected to the data driver integrated circuit through the tape carrier package is disposed on one side of the liquid crystal panel and connected to the main printed circuit board disposed on the back side of the liquid crystal panel.

2. Description of the Related Art In recent years, liquid crystal panels have become thinner due to the trend of slimming down liquid crystal display devices. Accordingly, in order to minimize the size of a data printed circuit board disposed on a side surface of a liquid crystal panel, The need is increasing.

However, in the conventional liquid crystal display device according to the related art as described above, the power source portion formed on the main printed circuit board includes both a circuit for generating the first power source _VDD1 and a circuit for generating the second power source _VDD2 and so must be the wiring formed for supplying the data printed circuit board has a first power generated by the power supply (V _DD1) and a second power supply (V _DD2) for the plurality of data drive ICs, the data printed circuit board, so It is in the actual situation that the size is minimized.

SUMMARY OF THE INVENTION Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and it is an object of the present invention to provide a digital- It is not necessary to form a circuit for generating a second power supply on the main printed circuit board on which the power supply unit is formed and the second power supply wiring is not formed on the data printed circuit board on which the data driver is formed, And to provide a minimized liquid crystal display device.

According to an aspect of the present invention, there is provided a liquid crystal display device including a liquid crystal panel, a data driver including a digital-to-analog converter, a power source for generating a first power source and a plurality of positive and negative gamma reference voltages And a gamma reference voltage portion for generating a gamma reference voltage.

The digital-to-analog converter of the data driver may include a first selector for selecting one of the plurality of positive gamma reference voltages corresponding to the pixel signal and outputting the same, and a second selector for selecting one of the plurality of negative gamma reference voltages A second power supply for receiving a first power supply and generating a second power supply having a voltage level equal to 1/2 of a voltage level of the first power supply, A first amplifier for applying an output of the first selector to the input terminal and a first power source and a second power source being applied to the power terminal to buffer and output the output of the first selector, And a second amplifier for amplifying the output of the second selector by applying a low voltage to the power terminal and outputting the amplified output; and a selector for selecting one of the output of the first amplifier and the output of the second amplifier And output muxes.

The liquid crystal display according to a preferred embodiment of the present invention having the above-described structure may be configured such that the second power generation unit for generating the second power supply is formed in the digital-analog conversion unit of the data driver, not the power supply unit of the main printed circuit board , The wiring for transferring the second power source to the data printed circuit board is not required to be formed on the data printed circuit board, and the wiring of the data printed circuit board can be minimized.

Accordingly, when the data printed circuit board is disposed on one side of the liquid crystal panel, the liquid crystal display device can be made slimmer.

In the liquid crystal display device according to the preferred embodiment of the present invention, since the wiring for transferring the second power source is not required to be formed on the data printed circuit board, the second power source is input to the data driver integrated circuit of the data driver It is not necessary to form an input pin for the data driver IC, so that the size of the data drive IC can be minimized.

Hereinafter, a liquid crystal display according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

4 and 5, the liquid crystal display according to an exemplary embodiment of the present invention includes a plurality of gate lines GL1 to GLn and a plurality of data lines A liquid crystal panel in which a plurality of pixels are defined by intersecting the plurality of pixels; A timing controller (102) for generating a plurality of gate control signals and a plurality of data control signals for driving the pixels and rearranging the pixel signals from the outside, and outputting the rearranged pixel signals; A gate driver (103) sequentially driving the gate lines (GL1 to GLn) one by one under the control of the gate control signal; The data driver 104 including the digital-analog converter 134 converts the pixel signals from the timing controller 102 into analog pixel voltages under the control of the data control signal and supplies the analog pixel voltages to the data lines DL1 to DLm, ; A power supply unit 105 generating at least a first power supply V _DD1 supplied to the data driver 104; And a plurality of positive (+) gamma reference voltages V _GAMMA1 to V _GAMMA9 and negative gamma reference voltages V _GAMMA10 to V _GAMMA18 to generate a digital-to-analog conversion unit A gamma reference voltage portion 106 for supplying the gamma reference voltage to the light emitting diodes; .

6, the digital-to-analog converter 134 converts one of the positive polarity gamma reference voltages V _GAMMA1 to V _GAMMA9 to one corresponding to the pixel signal input from the timing controller 102, And outputs the selected pixel voltage as a positive polarity pixel voltage; A second selector (134b) for selecting one of the plurality of negative gamma reference voltages (V _GAMMA10 to V _GAMMA18 ) corresponding to the pixel signal input from the timing controller (102) and outputting the selected one as a negative pixel voltage; The first power supply second power generating section (134c) for generating a second power supply (V _DD2) having a voltage level of one-half of the voltage level of the first power supply (V _DD1) for receiving the (V _DD1); The positive polarity pixel voltage from the first selector 134a is applied to the input terminal and the first power source V _DD1 is applied to the positive power source terminal and the second power source V _DD2 is applied to the negative power source terminal, A first amplifier 134d for buffering and outputting the positive polarity pixel voltage; The negative polarity pixel voltage from the second selection unit 134b is applied to the input terminal, the second power source V _DD2 is applied to the _positive power source terminal and the base low voltage V _SS is applied to the negative power terminal, A second amplifier 134e for buffering and outputting the negative polarity pixel voltage; A multiplexer (MUX) 134f for selecting one of the output of the first amplifier 134d and the output of the second amplifier 134e under the control of the data control signal of the timing controller 102; .

The components of the liquid crystal display according to a preferred embodiment of the present invention will now be described in detail.

The liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel including a first substrate 101 as a thin film transistor array substrate and a second substrate (not shown) as a color filter substrate, A liquid crystal layer (not shown) is formed between the first substrate 101 and the second substrate.

The first substrate 101 includes a plurality of pixels defined by intersecting a plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm.

A thin film transistor is formed in a region where the gate lines GL1 to GLn of each pixel intersect with the data lines DL1 to DLm, and a pixel electrode connected to the thin film transistor is formed.

Although not shown in the drawing, a common electrode to which a common voltage is supplied is formed on the second substrate (not shown). A common voltage supplied to the common electrode forms a vertical electric field together with a pixel signal supplied to the pixel electrode, . The common electrode is formed on the first substrate 101 so that a common voltage applied to the common electrode is applied to the pixel electrode. In this case, the common electrode is formed on the second substrate, The liquid crystal may be driven by forming a horizontal electric field together with the pixel signal.

4, a liquid crystal display according to a preferred embodiment of the present invention includes a timing controller 102, a gate driver 103, a data driver 104 ), A power supply unit 105, and a gamma reference voltage unit 106 are provided.

The timing control unit 102 generates a gate control signal for controlling the gate driving unit 103 using external signals, generates a data control signal for controlling the data driving unit 104, And supplies the pixel signals to the data driver 104 after rearranging the pixel signals.

The gate control signal includes a gate start pulse (GSP), a gate shift clock (GSC), a gate output enable (GOE) signal, (SSP), a source shift clock (SSC), a source output enable (SOE) signal, and a polarity control signal (POL).

The gate driver 103 shifts the gate start pulse GSP supplied from the timing controller 102 according to the gate shift clock GSC to sequentially supply a gate on signal to the gate lines GL1 to GLn To turn on the thin film transistors connected to the corresponding gate lines GL1 to DLn and to supply a gate off signal during a period in which the gate on signals are not supplied to the gate lines GL1 to GLn.

The data driver 104 generates a sampling signal by shifting the source start pulse SSP supplied from the timing controller 102 according to the source shift clock SSC and outputs the pixel signal in a predetermined unit And then latches the latched digital pixel signal of one horizontal pixel column into an analog positive pixel voltage or a negative pixel voltage and supplies the same to the data lines DL1 to DLm. Accordingly, the pixel voltage is supplied to the pixel electrode connected to the thin film transistor turned on by the gate-on signal. The data driver 104 includes a shift register unit 114, a latch unit 124, a digital-analog converter 134 and an output buffer unit 144. The data driver 104, A detailed description will be made later with reference to Figs. 5 and 6. Fig.

The power supply unit 105 generates at least a first power supply voltage V _DD1 and supplies the generated power to the data driver 104. The power supply unit 105 preferably includes a timing controller 102, a gate driver 103, a data driver 104, And generates a plurality of power supplies required by the power supply unit (106).

The gamma reference voltage section 106 generates a plurality of positive polarity gamma reference voltages V _GAMMA1 to V _GAMMA9 and negative gamma reference voltages V _GAMMA10 to V _GAMMA18 , And supplies it to the conversion section 134.

Hereinafter, the data driver 104 will be described in detail with reference to FIGS. 5 to 7. FIG.

The data driver 104 includes a plurality of data driver ICs for dividing and driving a plurality of data lines DL1 to DLm into a plurality of groups.

5, the data driver 104 including the plurality of data drive ICs shifts the source start pulse SSP supplied from the timing controller 102 according to the source shift clock SSC, A latch unit 124 for sequentially inputting and latching the pixel signals in units of a predetermined unit in response to a sampling signal input from the shift register unit 114, The pixel signal from the latch unit 124 and selecting one of the plurality of gamma reference voltages V _GAMMA1 to V _GAMMA18 from the gamma reference voltage unit 106 corresponding to the corresponding pixel signal, Analog converter 134 for buffering the pixel voltage from the digital-analog converter 134 and outputting the data voltage to the data line DL 1 to DLm.

6, the digital-to-analog converter 134 includes a first selector 134a, a second selector 134b, a second power generator 134c, a first amplifier 134d, A second amplifier 134e, and a mux 134f.

6 shows only a portion corresponding to one data line DL1 to DLm in the digital-analog converter 134. This is for convenience of description, and the liquid crystal display according to the preferred embodiment of the present invention The digital-to-analog converter 134 provided in the data driver 104 of the data driver unit 104 includes m circuits such that the circuit unit shown in FIG. 6 corresponds to each of the m data lines DL1 to DLm.

The first selector 134a selects one of the plurality of positive polarity gamma reference voltages V _GAMMA1 to V _GAMMA9 from the gamma reference voltage unit 106 corresponding to the pixel signal from the latch unit 124, Converts the digital pixel signal into an analog positive pixel voltage and outputs it.

The second selector 134b selects one of the negative polarity gamma reference voltages V _GAMMA10 to V _GAMMA18 from the gamma reference voltage unit 106 corresponding to the pixel signal from the latch unit 124, Converts the digital pixel signal into an analog negative polarity pixel voltage and outputs it.

6, there are nine positive polarity gamma reference voltages V _GAMMA1 to V _GAMMA9 to be supplied to the first selector 134a by the gamma reference voltage _{generator 106} , and nine negative gamma reference voltages V _GAMMA1 to V _GAMMA9 supplied to the second selector 134b The number of the gamma reference voltages outputted from the gamma reference voltage unit 106 is not limited to the number of the negative gamma reference voltages (V _GAMMA9 to V _GAMMA18 ) It will be understood that the invention may be varied within the scope not departing from the gist of the invention.

The second power generating section (134c) has a second power supply (V _DD2) having a voltage level that receives the first power supply (V _DD1) for the half of the voltage level of the first power supply (V _DD1) . For example, the first power source V _DD1 may be 15 [V] and the second power source V _DD2 may be 7.5 [V].

The second power source generation unit 134c may have various circuit configurations for generating the second power source V _DD2 using the first power source V _DD1 . However, for example, as shown in FIG. 7, And the voltage value of the second power source V _DD2 is set by voltage division by the resistance value of the second resistor R2.

That is, one example of the second power generating section (134c), as shown in FIG. 7, a power supply from the first power supply (V _DD1), the first power input (V _DD1) input terminal and the first 105 A first resistor R1 connected between the first node n1 and the first node n1 and a second resistor R2 connected between the first node n1 and the ground voltage V _SS ; It is is configured by a second power supply (V _DD2) and a second power supply (V _DD2) output terminals which output.

The first amplifier 134d receives the positive polarity pixel voltage input from the first selector 134a and applies the first power V _DD1 input from the power source unit 105 to the positive power source terminal And the second power source V _DD2 input from the second power source generation unit 134b is applied to the negative power terminal, thereby buffering the positive pixel voltage and outputting it as a mux 134f.

The second amplifier 134e receives the negative polarity pixel voltage input from the second selector 134b and the second power source V _DD2 input from the second power source generator 134c, And the base voltage V _SS is applied to the negative power terminal, thereby buffering the negative voltage and outputting it as a mux 134f.

The mux 134f selects one of the output of the first amplifier 134d and the output of the second amplifier 134e in response to the polarity control signal POL input from the timing controller 102, .

In the liquid crystal display device according to the preferred embodiment of the present invention, the data driver 104 includes a plurality of data driver ICs, and the plurality of data driver ICs includes a data tape carrier Is connected to a liquid crystal panel and a data printed circuit board (not shown) through a package (not shown), and the data printed circuit board is connected to a main printed circuit board (not shown) through a flexible printed circuit board . Here, the data printed circuit board is provided with wirings through which the pixel signals and the data control signals from the timing controller 102 are transferred and wirings through which the first power supply V _DD1 from the power supply unit 105 is transferred, At least the power supply unit 105 and the timing control unit 102 are formed on the printed circuit board.

Although it is possible to arrange the respective components at various positions when manufacturing / assembling the liquid crystal display device according to the preferred embodiment of the present invention, the data printed circuit board is often arranged in a form standing on one side of the liquid crystal panel, The main printed circuit board is disposed on the back surface of the liquid crystal panel in parallel with the back surface of the liquid crystal panel. Of course, the arrangement of the data printed circuit board and the main printed circuit board may be various examples including the above-mentioned examples.

The liquid crystal display according to the preferred embodiment of the present invention may be configured such that the second power generation unit 134c for generating the second power source V _{DD2 is} connected to the power supply unit 105 of the main printed circuit board, Analog conversion unit 134, it is unnecessary to form a wiring for transferring the second power supply V _DD2 to the data PCB, so that the wiring of the data PCB can be minimized, It is possible to reduce the thickness of the liquid crystal display device when the liquid crystal display device is disposed on one side of the panel.

In the liquid crystal display device according to the preferred embodiment of the present invention, since the wiring for transferring the second power source (V _DD2 ) is not required to be formed on the data printed circuit board, the data driver integrated circuit There is no need to form an input pin for inputting the second power supply V _DD2 to the data driver IC, and the size of the data drive IC can be minimized.

1 is a block diagram showing a conventional general liquid crystal display device.

2 is a block diagram showing the data driver of FIG.

FIG. 3 is a block diagram showing the digital-analog converter of FIG. 2. FIG.

4 is a block diagram illustrating a liquid crystal display according to a preferred embodiment of the present invention.

5 is a block diagram showing the data driver of FIG.

FIG. 6 is a block diagram showing the digital-analog converter of FIG. 5;

FIG. 7 is a circuit diagram showing an example of the second voltage generator of FIG. 6;

DESCRIPTION OF REFERENCE NUMERALS

101: first substrate 102: timing controller

103: Gate driver 104: Data driver

105: power supply unit 106: gamma reference voltage unit

114: shift register unit 124: latch unit

134: digital-analog converter 144: output buffer unit

134a: first selection unit 134b: second selection unit

134c: second power generating unit 134d: first amplifier

134e: Second amplifier 134f: Mux

R1: first resistance R2: second resistance

Claims (7)

A liquid crystal panel in which pixels are defined by intersecting gate lines and data lines; A data driver for converting an input pixel signal into an analog voltage and supplying the analog voltage to the data line, the data driver including a digital-analog converter; A power supply for generating a first power supply; And A gamma reference voltage portion for generating a plurality of positive gamma reference voltages and a negative gamma reference voltage, The digital-to- A first selector for selecting one of the plurality of positive polarity gamma reference voltages corresponding to the pixel signal to output; A second selector for selecting one of the plurality of negative gamma reference voltages corresponding to the pixel signal to output; A second power generating unit receiving the first power and generating a second power having a voltage level equal to 1/2 of a voltage level of the first power; A first amplifier to which the output of the first selector is applied to the input terminal and the first power and the second power are applied to the power terminal to buffer and output the output of the first selector; A second amplifier to which the output of the second selector is applied to the input terminal and the second power and the base voltage are applied to the power terminal to buffer and output the output of the second selector; And And a mux for selecting and outputting one of an output of the first amplifier and an output of the second amplifier. The method according to claim 1, The data driver may include: A shift register unit for sequentially outputting sampling signals; A latch unit sequentially latching the pixel signals in response to the sampling signal and simultaneously outputting the latched pixel signals to the digital-analog converter; And And an output buffer unit for buffering the output of the digital-analog converter and supplying the buffered data to the data line. The method according to claim 1, Further comprising a timing control unit for generating a plurality of control signals for driving the pixels and rearranging the pixel signals from the outside, Wherein the multiplexer receives the polarity control signal POL output from the timing controller and selects one of the output of the first amplifier and the output of the second amplifier. The method according to claim 1, The second power generation unit may include: A first resistor connected between a first power input terminal to which the first power is inputted and a first node; A second resistor coupled between the first node and a ground voltage; And And a second power output terminal connected to the first node. 5. The method of claim 4, Wherein a voltage level of the second power source is set by a voltage division by a resistance value of the first resistor and a resistance value of the second resistor. The method according to claim 1, Wherein the power supply terminal of the first amplifier includes a positive power supply terminal and a negative power supply terminal, Wherein the first power source is applied to the positive power source terminal and the second power source is applied to the negative power source terminal. The method according to claim 1, Wherein the power supply terminal of the second amplifier includes a positive power supply terminal and a negative power supply terminal, Wherein the second power source is applied to the positive power source terminal and the base low voltage is applied to the negative power source terminal.

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