KR101393366B1 - Liquid crystal display device and manufacturing method of the same - Google Patents

Abstract

The present invention relates to a liquid crystal display device and a method of manufacturing the liquid crystal display device. A liquid crystal display device according to the present invention includes: a first substrate; A second substrate facing the first substrate; And a liquid crystal layer interposed between the first substrate and the second substrate, wherein the first substrate comprises: an insulating substrate; A gate line positioned on the insulating substrate; A data line including a first data line and a second data line insulated from the gate line, a first drain electrode electrically connected to the first data line, and a second drain electrode electrically connected to the second data line, and; A first sub-pixel electrode electrically connected to the first drain electrode and the second drain electrode, and a second sub-pixel electrode electrically connected to the first drain electrode and the second drain electrode, A pixel electrode including a second sub-pixel electrode electrically connected to the pixel electrode; A semiconductor layer positioned between the data line and the insulating substrate; An ohmic contact layer located between the semiconductor layer and the data line and in direct contact with the semiconductor layer and the data line; And a light blocking film located between at least a part of the data line and the insulating substrate. Thereby, a liquid crystal display device and a method of manufacturing a liquid crystal display device that can minimize the supply of light to the semiconductor layer located under the data line are provided.

Description

TECHNICAL FIELD [0001] The present invention relates to a liquid crystal display (LCD)

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method of manufacturing a liquid crystal display device, and more particularly, to a liquid crystal display device having a semiconductor layer corresponding to a data line and a method of manufacturing the liquid crystal display device.

The liquid crystal display device includes a liquid crystal panel and a light source for supplying light to the liquid crystal panel from behind the liquid crystal panel. The liquid crystal panel includes a first substrate on which the pixel electrode is located, a second substrate facing the first substrate, and a liquid crystal layer interposed between the first substrate and the second substrate. The liquid crystal molecules located in the liquid crystal layer adjust the transmittance of light supplied from the light source according to the data voltage applied to the pixel electrode to display an image. The first substrate includes a data line for supplying power to the pixel electrode, and a thin film transistor including a semiconductor layer for switching a power source supplied to the pixel.

Recently, a method of forming such a semiconductor layer and a data wiring by using a single mask has been developed. In this case, the semiconductor layer is located under the data line.

When light is supplied to the semiconductor layer located under the data line from the light source, the dielectric constant of the semiconductor layer is increased. At this time, the electric capacity increases between the data line and the pixel electrode located above the semiconductor layer, and the voltage supplied to the pixel electrode through the data line is lowered.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a liquid crystal display device and a method of manufacturing a liquid crystal display device that can minimize the supply of light to a semiconductor layer located under a data line.

The above object of the present invention can be achieved by a plasma display panel comprising: a first substrate; A second substrate facing the first substrate; And a liquid crystal layer interposed between the first substrate and the second substrate, wherein the first substrate comprises: an insulating substrate; A gate line positioned on the insulating substrate; A data line including a first data line and a second data line insulated from the gate line, a first drain electrode electrically connected to the first data line, and a second drain electrode electrically connected to the second data line, and; A first sub-pixel electrode electrically connected to the first drain electrode and the second drain electrode, and a second sub-pixel electrode electrically connected to the first drain electrode and the second drain electrode, A pixel electrode including a second sub-pixel electrode electrically connected to the pixel electrode; A semiconductor layer positioned between the data line and the insulating substrate; And a light shielding film which is located between the semiconductor layer and the data wiring and is located between at least a part of the data wiring and the insulating substrate, the resistance contact layer being in direct contact with the semiconductor layer and the data wiring, ≪ / RTI >

The light shielding film is preferably located between the semiconductor layer and the insulating substrate.

The width of the region of the light shielding film overlapping the region of the semiconductor layer is preferably wider than the width of the region of the semiconductor layer.

It is preferable that the light blocking film is located in the same layer as the gate line.

The light blocking film is preferably in a floating state.

The first substrate further includes a thin film transistor having a first sub thin film transistor connected to the gate line and the first data line and a second sub thin film transistor connected to the gate line and the second data line, The first sub-thin film transistor includes the first drain electrode, and the second sub-thin film transistor includes the second drain electrode.

The first sub-pixel electrode and the second sub-pixel electrode are preferably bent at least once along the extending direction of the first data line or the second data line.

The liquid crystal display device is preferably driven at 120 Hz.

Preferably, the first drain electrode and the second drain electrode apply a voltage to the pixel electrode, and polarities of voltages applied to the first sub-pixel electrode and the second sub-pixel electrode are opposite to each other.

The first drain electrode and the second drain electrode may apply a voltage to the pixel electrode and a voltage applied to the first sub pixel electrode may be greater than a voltage applied to the second sub pixel electrode.

The first drain electrode is in contact with the first sub-pixel electrode, the second sub-pixel electrode surrounds the first sub-pixel electrode, and the light- And it is preferably located at the bottom of the electrode.

The second sub-pixel electrode surrounds the first sub-pixel electrode, the first data line is located to the left of the pixel electrode, the second data line is located to the right of the pixel electrode, The second data line is electrically connected to the second sub-pixel electrode, and the other data line is electrically connected to the second sub-pixel electrode in any one of the pair of pixel electrodes adjacent in the direction .

And the light blocking film is preferably positioned corresponding to the first data line, the second data line, the first drain electrode, and the second drain electrode.

And the light shielding film is located in at least one of the space between the insulating substrate and the first drain electrode and the space between the insulating substrate and the second drain electrode.

And the light blocking film is not disposed between the second drain electrode and the insulating substrate.

Wherein the first drain electrode and the second drain electrode each include a first branched electrode extended for contact with the pixel electrode and a second branched electrode extended from a contact portion between the first branched electrode and the pixel electrode, It is preferable that the light blocking film is not disposed between the second branched electrode of the first drain electrode and the insulating substrate.

Preferably, the second substrate includes a common electrode, the pixel electrode includes a pixel electrode cutout pattern, the common electrode includes a common electrode cutout pattern, and the liquid crystal layer is a vertical alignment mode .

The first substrate may further include a shield electrode which is located between the adjacent pixel electrodes and is located along a longitudinal direction of the first data line or the second data line desirable.

It is preferable that the light blocking film is located along the shield electrode, and the light blocking film is positioned corresponding to each of the first data line and the second data line.

It is preferable that the shield electrode is the same layer as the pixel electrode.

Another object of the present invention is to provide a method of manufacturing a semiconductor device, Forming a gate metal layer on the insulating substrate; Patterning the gate metal layer to form a gate wiring including a gate line and a light blocking film; Forming an insulating layer on the gate wiring; Forming a silicon layer on the insulating layer; Forming a resistive contact silicon layer on the silicon layer; Forming a data metal layer on the ohmic contact silicon layer; Patterning the data metal layer, the ohmic contact silicon layer, and the silicon layer through a single mask to form a first data line and a second data line, respectively, which are insulated from and intersected with the gate line, a first data line electrically connected to the first data line, Forming a data line, an ohmic contact layer, and a semiconductor layer having a drain electrode, a second drain electrode electrically connected to the second data line, and at least a portion overlapping the light shielding film; Forming an organic layer on the semiconductor layer, the ohmic contact layer, and the data line; Forming a transparent metal layer on the organic layer; A first sub pixel electrode electrically connected to one of the first drain electrode and the second drain electrode by patterning the transparent metal layer and a second sub pixel electrode electrically connected to the first drain electrode and the second drain electrode, And forming a pixel electrode including a second sub-pixel electrode electrically connected to the other of the second drain electrodes. [7] The method of manufacturing a liquid crystal display device according to claim 7,

According to the present invention, there is provided a liquid crystal display device and a method of manufacturing a liquid crystal display device that can minimize the supply of light to a semiconductor layer located under a data line.

BRIEF DESCRIPTION OF THE DRAWINGS The invention will now be described in more detail with reference to the accompanying drawings, in which: FIG. Hereinafter, the fact that a certain film (layer) is positioned (formed) on another film (layer) means that not only when the two layers (film) are in contact but also when another layer And the case where it exists.

1 is an equivalent circuit diagram of a liquid crystal display device according to the present invention and shows two pixels P1 and P2 adjacent to each other in the extending direction of the data lines DL1 and DL2. Each pixel P1 and P2 is connected to one gate line GL and two data lines DL1 and DL2 and has two thin film transistors T1 and T2.

1, the first thin film transistor T1 of the first pixel P1 is connected to the first data line DL1 and the gate line GL, and the second thin film transistor T2 is connected to the first data line DL1 and the gate line GL. 2 data line DL2 and the gate line GL.

The thin film transistors T1 and T2 are connected to the same gate line GL and are simultaneously driven and connected to different data lines DL1 and DL2 so that they can output different signals.

The liquid crystal capacitances C _LC1 and C _LC2 and the storage capacitors Cst1 and Cst2 are connected to the thin film transistors T1 and T2. The liquid crystal capacitors C _LC1 and C _LC2 are formed between the pixel electrodes PE1 and PE2 and the common electrode CE and the holding capacitors Cst1 and Cst2 are formed between the pixel electrodes PE1 and PE2 and the holding electrode lines SL As shown in FIG.

Here, the first sub-pixel electrode PE1 and the second sub-pixel electrode PE2 are separated from each other.

The second pixel P2 has a structure similar to that of the first pixel P1. The first thin film transistor T1 connected to the first data line DL1 is connected to the second sub pixel electrode PE2 and the second thin film transistor T2 connected to the second data line DL2 is connected to the second data line DL2. 1 sub-pixel electrode PE1.

That is, the data lines DL1 and DL2 for applying the data voltage to the first sub-pixel electrode PE1 are alternately changed along the extending direction of the data lines DL1 and DL2.

In the liquid crystal display device according to the present invention, the visibility is improved. Hereinafter, the first pixel P1 will be described with reference to FIG.

A first data voltage is applied to the first pixel electrode PE1 through the first thin film transistor T1 and a second data voltage is applied to the second pixel electrode PE2 through the second thin film transistor T2. 2 data voltage is applied. That is, two domains in which different data voltages are applied to one pixel are formed.

Thus, as shown in FIG. 2, a first domain corresponding to the first sub-pixel electrode PE1 and a second domain having a lower luminance corresponding to the second sub-pixel electrode PE2 are formed.

As described above, a plurality of domains having different gamma curves exist in one pixel. As a result, the luminance and the color of the front surface and the side surface are compensated each other, thereby improving lateral visibility.

Hereinafter, a liquid crystal display according to a first embodiment of the present invention will be described with reference to FIGS. 3 to 5. FIG.

3 to 5, a liquid crystal display device 1 according to a first embodiment of the present invention includes a first substrate 100, a second substrate 200 facing the first substrate 100, A liquid crystal layer 300 interposed between the first substrate 100 and the second substrate 200, and a light source 400.

FIG. 3 is a cross-sectional view of FIG. 3, and FIG. 5 is a cross-sectional view of the liquid crystal display 1 shown in FIG. 3 for convenience of explanation. 2 substrate 200 and a liquid crystal layer 300 are shown.

First, the first substrate 100 will be described with reference to FIGS. 3 to 5. FIG.

As shown in FIGS. 3 and 4, the gate wiring 120 is located on the first insulating substrate 110. The gate wiring 120 may be a single metal layer or a multiple layer. The gate line 120 is connected in parallel with the gate line 121 extending in the horizontal direction and the first gate electrode 122 and the second gate electrode 123 connected to the gate line 121, A sustain electrode line 124 passing through the pixel, and a light shielding film 125. The light shielding film 125 will be described later in detail.

On the first insulating substrate 110, a gate insulating film 131 made of silicon nitride (SiNx) or the like covers the gate wiring 120.

A semiconductor layer 141 made of a semiconductor such as amorphous silicon is disposed on the gate insulating film 131. A resistance made of a material such as n + hydrogenated amorphous silicon in which a silicide or an n-type impurity is heavily doped is formed on the semiconductor layer 141 The contact layer 142 is located. In the channel portion A between the first source electrode 153 and the first drain electrode 154 and between the second source electrode 155 and the second drain electrode 156 to be described later, the ohmic contact layer 142 is removed .

A data line 150 is disposed on the semiconductor layer 141, the ohmic contact layer 142, and the gate insulating layer 131. [ The data lines 150 may also be a single layer or multiple layers of metal.

The data line 150 and the semiconductor layer 141 are in direct contact with the ohmic contact layer 142 located between the semiconductor layer 141 and the data line 150.

The data line 150 is a branch of the first data line 151 and the second data line 152 which are pixels intersecting with the gate line 121 and the first data line 151, A first drain electrode 154 and a second data line 152 separated from the channel A by a first source electrode 153 and a first source electrode 153, A second source electrode 155 and a second drain electrode 156 separated from the channel portion A. The second source electrode 155 and the second source electrode 155 extend to the channel region A, The first drain electrode 154 and the first data line 151 are electrically connected to each other and the second drain electrode 156 and the second data line 152 are electrically connected to each other.

The first gate electrode 122, the first source electrode 153 and the first drain electrode 154 form a first thin film transistor T 1, and a second gate electrode 123 and a second source electrode 155, The second drain electrode 156 forms a second thin film transistor T 2.

The first thin film transistor T 1 is connected to the first data line 151 passing the left side of the pixel and the second thin film transistor T 2 is connected to the second data line 152 passing the right side of the pixel.

A protective film 161 made of silicon nitride or the like is formed on the data line 150 and the semiconductor layer 141 not covered with the data line 150.

An organic layer 165 is formed on the protective film 161. The organic layer 165 is thicker than the gate insulating layer 131 and the passivation layer 161 and may be formed by a method such as spin coating, slit coating, screen printing or the like. The organic layer 165 may be any one of BCB (benzocyclobutene) series, olefin series, acrylic resin series, polyimide series, and fluorine resin

The organic layer 165 is provided with a first contact hole 162 and a second contact hole 163 for exposing the first drain electrode 154 and the second drain electrode 156, (See FIG. 5) for exposing the opening 161 is formed. The protective film 161 is also removed from the first contact hole 162 and the second contact hole 163.

Each of the drain electrodes 154 and 156 is elongated in a branch shape. Each of the drain electrodes 154 and 156 has a portion extending outward from each of the thin film transistors T 1 and T 2 in the contact holes 162 and 163.

5, a pixel electrode 170, which will be described later, is positioned close to the storage electrode line 124 through the opening 164, and an organic layer 165 is formed between the pixel electrode 170 and the storage electrode line 124 does not exist. A storage capacitor Cst is formed between the pixel electrode 170 to which the pixel voltage is transmitted and the storage electrode line 124 to which the common voltage is applied.

The reason for providing the openings 164 on the sustain electrode lines 124 is that it is difficult to form the storage capacitors between the pixel electrodes 170 and the sustain electrode lines 124 because the organic layer 165 has a large thickness and a small dielectric constant.

3 and 4, the pixel electrode 170 and the shield electrode 179 are located on the organic layer 165. [

The pixel electrode 170 is typically made of a transparent conductive material such as ITO (indium tin oxide) or IZO (indium zinc oxide). The pixel electrode 170 is generally rectangular and vertically symmetrical.

The pixel electrode 170 includes a first sub pixel electrode 171 and a second sub pixel electrode 172 which are separated from each other by a pixel electrode isolation pattern 173. The first sub-pixel electrode 171 has a square shape and is located at the center of the pixel. The second sub-pixel electrode 172 surrounds the first sub-pixel electrode 171.

The second sub-pixel electrode 172 has a larger area than the first sub-pixel electrode 171. The sustain electrode line 124 overlaps the second sub-pixel electrode 172 more widely than the first sub-pixel electrode 171. This is because the domain corresponding to the second sub-pixel electrode 172 having a large area requires a larger holding capacitance Cst.

A pixel electrode cutout pattern 174 is formed on the first sub-pixel electrode 171 and the second sub-pixel electrode 172 in parallel with the pixel electrode separation pattern 173, respectively.

The first sub-pixel electrode 171 of the left pixel is electrically connected to the first drain electrode 154 of the first thin film transistor T 1 through the first contact hole 162, The second contact hole 172 is electrically connected to the second drain electrode 156 of the second thin film transistor T 2 through the second contact hole 163.

The first sub pixel electrode 171 of the neighboring right pixel is electrically connected to the second drain electrode 156 of the second thin film transistor T 2 through the first contact hole 162, The first contact hole 172 is electrically connected to the first drain electrode 154 of the first thin film transistor T 1 through the second contact hole 163.

The pixel electrode 170 receives a voltage through the first drain electrode 154 and the second drain electrode 156 and the polarities of the voltages applied to the first sub pixel electrode 171 and the second sub pixel electrode are different from each other It can be the opposite.

In addition, the voltage applied to the first sub-pixel electrode 171 is greater than the voltage applied to the second sub-pixel electrode 172. As a result, the lateral visibility of the liquid crystal display device 1 is improved.

Here, 'the voltage is large (small)' means that the difference between the data voltage and the common voltage is large. On the contrary, the 'data voltage is small (low)' means that the difference between the data voltage and the common voltage is small.

The pixel electrode separation pattern 173 and the pixel electrode cutout pattern 174 divide the liquid crystal layer 300 into a plurality of subdomains together with a common electrode cutout pattern 251 to be described later. The subdomains in the present invention extend in an oblique direction to an area surrounded by the patterns 173, 174, and 251.

A shield electrode 179, which is the same layer as the pixel electrode 170, is located between neighboring pixel electrodes, that is, at the boundary of each pixel.

The shield electrode 179 is located along the longitudinal direction of the first data line 151 and the second data line 152 and connected to each other along the longitudinal direction of the gate line 121.

The shield electrode 179 covers the first data line 151 and the second data line 152. The pixel electrode 170 is not formed in the boundary region where the shield electrode 179 is located, and the liquid crystal layer 300 is not controlled.

A common voltage is applied to the shield electrode 179 so that no electric field is formed between the shield electrode 179 and the common electrode 250.

The liquid crystal layer 300 located on the data lines 151 and 152 is different from the liquid crystal layer 300 located on the pixel electrode 170 due to the electric field by the data lines 151 and 152. In other words, the liquid crystal layer 300 located on the data lines 151 and 152 is difficult to control and causes defects such as light leakage.

An electric field is not formed between the shield electrode 179 and the common electrode 250, so that the liquid crystal layer 300 maintains the initial state. Therefore, in the normally-black mode, the liquid crystal layer 300 between the shield electrode 179 and the common electrode 250 always displays a black state, and no light leakage occurs.

Next, the second substrate 200 will be described with reference to FIG.

As shown in FIG. 4, a black matrix 221 is disposed on a second insulating substrate 210. The black matrix 221 is usually made of a photosensitive organic material to which a black pigment is added. As the black pigment, carbon black, titanium oxide, or the like is used.

The black matrix 221 is disposed on the thin film transistors T 1 and T 2 and the shield electrode 179.

A color filter 231 is disposed on the black matrix 221 and the second insulating substrate 210. The color filter 231 may include sub-layers of different colors, e.g., red, green, and blue.

An overcoat film 241 is placed on the color filter 231. The overcoat film 241 provides a planarized surface.

A common electrode 250 is disposed on the overcoat film 241. The common electrode 250 is made of a transparent conductive material such as ITO (indium tin oxide) or IZO (indium zinc oxide). The common electrode 250 applies a voltage directly to the liquid crystal layer 300 together with the pixel electrode 170 of the first substrate 100.

A common electrode cutout pattern 251 is formed on the common electrode 250. Some of the common electrode cutout patterns 251 form a plurality of subdomains together with the pixel electrode cutout pattern 173 and the pixel electrode cutout pattern 174. [

The patterns 173, 174, and 251 are not limited to the embodiments and may be formed in various shapes.

Next, the liquid crystal layer 300 will be described with reference to FIG.

As shown in FIG. 4, the liquid crystal layer 300 is interposed between the first substrate 100 and the second substrate 200. The liquid crystal layer 300 is vertically aligned mode, and the longitudinal direction of the liquid crystal molecules is vertical when no voltage is applied.

When the voltage is applied, the liquid crystal molecules lie in the vertical direction with respect to the electric field because the dielectric anisotropy is negative.

If the patterns 173, 174, and 251 of the liquid crystal display device 1 according to the first embodiment of the present invention are not formed, the liquid crystal molecules are not aligned in the lying direction, and are randomly arranged in various directions, There is a disclination line at the other boundary lying down.

When a voltage is applied to the liquid crystal layer 300 due to the above patterns 173, 174, and 251, a fringe field is generated to determine the direction in which the liquid crystal lies.

Hereinafter, the light blocking film 125 of the liquid crystal display according to the first embodiment of the present invention will be described in detail with reference to FIGS. 3 and 4. FIG.

The light shielding film 125 is formed on the same layer as the gate line 121, the first gate electrode 122, the second gate electrode 123 and the sustain electrode line 124 on the first insulating substrate 110, .

The light blocking film 125 is located between the first insulating substrate 110 and the data line 150 and the corresponding semiconductor layer 141.

The light blocking film 125 is in a floating state, i.e., not connected to another power source. The light blocking film 125 is in the shape of an island and does not contact the gate line 121, the first gate electrode 122, the second gate electrode 123, and the sustain electrode line 124.

The width W 1 of the region of the light shielding film 125 overlapping the region of the semiconductor layer 141 is wider than the width W 2 of the region of the semiconductor layer 141. The light blocking film 125 blocks light supplied from the light source 400 to the semiconductor layer 141 overlapping the light blocking film 125.

The light shielding film 125 is positioned corresponding to the first data line 151 and the second data line 152 covered by the shield electrode 179 in correspondence with the shield electrode 179.

The light blocking film 125 is located below the first drain electrode 154 overlapping the second sub pixel electrode 172 and the light blocking film 125 is located below the second sub pixel electrode 172 And is located below the second drain electrode 156 overlapping each other.

The light blocking film 125 is not located between the second drain electrode 156 and the first insulating substrate 110 in the left pixel and the light blocking film 125 is not formed between the first drain electrode 154 and the first insulating substrate 110, And is not located between the substrates 110.

Hereinafter, the effect of the light shielding film 125 in the liquid crystal display device according to the first embodiment of the present invention will be described with reference to FIG.

When the semiconductor layer 141 receives light, the dielectric constant of the semiconductor layer 141 increases.

When the dielectric constant of the semiconductor layer 141 is increased, the electric capacity between the pixel electrode 170 and the data line 150 corresponding to the semiconductor layer 141 increases and the voltage flowing through the data line 150 is lowered Occurs.

If the voltage flowing through the data line 150 is lowered, a problem occurs in that a signal applied to the pixel electrode 170 is defective and the display quality is lowered.

Particularly, in the left pixel of the liquid crystal display according to the first embodiment of the present invention, the first drain electrode 154 electrically connected to the first sub pixel electrode 171 overlaps with the second sub pixel electrode 172 Therefore, when light is supplied to the semiconductor layer 141 corresponding to the first drain electrode 154, there is a high probability that the voltage flowing through the first drain electrode 154 is lowered.

Since the second drain electrode 156 electrically connected to the first sub pixel electrode 171 overlaps the second sub pixel electrode 172 in the right pixel like the left pixel, There is a high probability that the voltage flowing through the second drain electrode 156 is lowered.

However, since the light shielding film 125 of the liquid crystal display according to the first embodiment of the present invention has the semiconductor layer 141 corresponding to the first data line 151 and the second data line 152, The semiconductor layer 141 corresponding to the first data line 151 and the second data line 152 is minimized by minimizing the supply of light to the first data line 151 and the second data line 152, Thereby minimizing the voltage drop through the resistor 152.

In the left pixel, the light shielding film 125 overlaps the second sub-pixel electrode 172 and the first drain electrode 154 and the second sub-pixel electrode 172, which are connected to the first sub-pixel electrode 171, Pixel electrode 171 of the left pixel is minimized by being positioned between the semiconductor layer 141 and the first insulating substrate 110 which overlap each other, Is not located between the second drain electrode 156 and the first insulating substrate 110, which are less likely to lower the voltage than the first insulating substrate 154, thereby minimizing the reduction of the aperture ratio of the left pixel due to the light shielding film 125.

In the right pixel, the light blocking film 125 overlaps the second sub-pixel electrode 172 to form the second drain electrode 156 and the second sub-pixel electrode 172, which are connected to the first sub- Pixel electrode 171 of the right pixel is minimized by being positioned between the semiconductor layer 141 and the first insulating substrate 110 which overlap each other, Is not positioned between the first drain electrode (154) and the first insulating substrate (110), which are less likely to be lowered in voltage than the first drain electrode (154), minimizing the aperture ratio of the right pixel due to the light blocking film (125).

Meanwhile, the liquid crystal display according to the first embodiment of the present invention can be driven at a frequency of 120 Hz or higher.

As the frequency increases, the quality of the moving picture is improved, but the electrical interference between the pixel electrode 170 and the data line 150 may increase.

However, according to the first embodiment of the present invention, since the electrical interference between the pixel electrode 170 and the data line 150 is minimized by the light shielding film 125, the deterioration of the display quality is minimized even if the frequency of the liquid crystal display device is increased do.

Hereinafter, a method of manufacturing a liquid crystal display device according to a first embodiment of the present invention will be described with reference to FIGS. 3, 4, and 6 to 10. FIG.

As shown in FIG. 6, a method of manufacturing a liquid crystal display device according to a first embodiment of the present invention includes a step S100 of forming an insulating substrate, a step S200 of forming a gate metal layer, Forming an ohmic contact layer and a data line (S600); forming an ohmic contact layer (S600) on the semiconductor layer; (S700), forming a transparent metal layer (S800), and forming a pixel electrode (S900).

Hereinafter, a method of manufacturing the first substrate 100 will be described.

First, a first insulating substrate 110 is formed as shown in FIG. 7A (S100).

The first insulating substrate 110 may be made of amorphous glass or polymer, and is preferably made of a heat-resistant material capable of withstanding a process at a high temperature.

Next, a gate metal layer 1201 is formed on the first insulating substrate 110 (S200).

The gate metal layer 1201 may be a metal single layer or a multilayer and is deposited on the first insulating substrate 110 through a deposition method such as sputtering.

7B and 7C, a gate wiring 120 is formed by patterning the gate metal layer 1201 (S300).

The gate metal layer 1201 is patterned through a photolithography method or the like to form the gate line 121, the first gate electrode 122 and the second gate electrode 123, the sustain electrode line 124, and the light shielding film 125 The gate wiring 120 is formed.

At this time, the light blocking film 125 is formed on the first data line 151, the second data line 152, the first drain electrode 154 of the left pixel, and the second drain electrode 156 of the right pixel, Respectively.

8A, a gate insulating layer 131 is formed on the gate line 120 and the first insulating substrate 110 (S400).

The gate insulating film 131 is made of silicon nitride (SiNx).

Next, as shown in FIG. 8A, a silicon layer 1401, a resistance-contacting silicon layer 1402, and a data metal layer 1501 are formed on the gate insulating layer 131 (S500).

The silicon layer 1401, the ohmic contact silicon layer 1402, and the data metal layer 1501 are deposited through a deposition method such as sputtering, such as the gate metal layer 1201.

Next, as shown in FIGS. 8A to 8D, the silicon layer 1401, the ohmic contact silicon layer 1402, and the data metal layer 1501 are patterned using the semiconductor layer 141, the ohmic contact layer 142, the data line 150 (S600). This will be described in detail below.

8A, a photosensitive layer 1000 is coated on a data metal layer 1501, and then the photosensitive layer 1000 is irradiated with light through a single mask 10 and then developed. As shown in FIG. 8B, Similarly, the photosensitive layer patterns 1001, 1002, and 1003 including the first sub-photosensitive layer pattern 1001, the second sub-photosensitive layer pattern 1002, and the third sub-photosensitive layer pattern 1003 are formed.

The single mask 10 used for forming the photosensitive layer patterns 1001, 1002 and 1003 includes the light shielding portion 11, the light projecting portion 12, and the channel forming portion 13.

The photosensitive layer 1000 corresponding to the light-shielding portion 11 remains in exposure / development and is formed of the first sub-photosensitive layer pattern 1001 and the second sub-photosensitive layer pattern 1002, The photosensitive layer 1000 is removed during exposure / development, and the photosensitive layer 1000 corresponding to the channel forming portion 13 remains during exposure / development to form a third sub-photosensitive layer pattern 1003. The third sub-photosensitive layer pattern 1003 is formed to be thinner than the first sub-photosensitive layer pattern 1001 and the second sub-photosensitive layer pattern 1002.

The data metal layer 1501 on which the photosensitive layer patterns 1001, 1002 and 1003 and the photosensitive layer patterns 1001, 1002 and 1003 are not present is etched as shown in FIG. 8B, The semiconductor layer 141, the ohmic contact layer 142, and the data line 150 are formed.

8B to 8D, the first sub-photosensitive layer pattern 1001 corresponds to the first data line 151 and the second data line 152, and the second sub-photosensitive layer pattern 1002 corresponds to the first sub- And the third sub-photosensitive layer pattern 1003 corresponds to the channel portion A of the first thin film transistor T 1.

As described above, the semiconductor layer 141, the ohmic contact layer 142, and the data line 150 are formed by using one mask 10. The semiconductor layer 141 is located under the data line 150 in correspondence with the data line 150. In this case, On the other hand, in the channel portion A, the data line 150 is not located on the semiconductor layer 141.

The slit mask is used as the single mask 10 used in the liquid crystal display device according to the first embodiment of the present invention, but in other embodiments, a translucent mask or the like may be used.

Next, as shown in FIG. 9, a protective film 161 and an organic layer 165 are sequentially formed (S700).

The first contact hole 162 is formed through a photolithography method or the like. Although not shown in FIG. 9, the second contact 163 and the opening 164 shown in FIG. 3 are formed when the first contactor 162 is formed. The organic layer 165 and the protective layer 161 are removed from the first contact hole 162 and the second contact hole 163 to expose the first drain electrode 154 and the second drain electrode 156, Only the organic layer 165 is removed and the protective film 161 is exposed.

Next, as shown in FIG. 10, a transparent metal layer 1701 is formed (S800).

A transparent metal layer 1701 is formed by a deposition method or the like. The transparent metal layer 1701 is typically made of a transparent conductive material such as ITO (indium tin oxide) or IZO (indium zinc oxide).

3, 4, and 10, the transparent electrode layer 1701 is patterned to form the pixel electrode 170 (S900).

The pixel electrode 170 shown in FIGS. 3 and 4 is formed by removing the removing portion 1701a of the transparent metal layer 1701 shown in FIG. 10 through a photolithography method or the like.

A shield electrode 179 is also formed when the pixel electrode 170 is formed.

Hereinafter, the liquid crystal display according to the second to fourth embodiments of the present invention will be described with reference to Figs. 11 to 13, respectively.

Hereinafter, only the characteristic portions different from the first embodiment will be described with reference to the excerpts, and the portions where the description is omitted are in accordance with the first embodiment and the known technology. In the second to fourth embodiments of the present invention, the same constituent elements are denoted by the same reference numerals for convenience of explanation.

A liquid crystal display according to a second embodiment of the present invention will be described with reference to FIG.

11, in each pixel of the liquid crystal display device according to the second embodiment of the present invention, the light shielding film 125 includes a first data line 151, a second data line 152, And between the semiconductor layer 141 corresponding to the first drain electrode 154 and the second drain electrode 156 and the first insulating substrate 110.

The light blocking film 125 corresponds to the first drain electrode 154 and the second drain electrode 156 connected to the first sub-pixel electrode 171 or the second sub-pixel electrode 172, The voltage applied to the first sub-pixel electrode 171 and the second sub-pixel electrode of each pixel is minimized through the first drain electrode 154 and the second drain electrode 156, respectively.

A liquid crystal display according to a third embodiment of the present invention will be described with reference to FIG.

12, the pixel electrode 170 of the liquid crystal display device according to the third embodiment of the present invention is elongated along the extending direction of the first data line 151 and the second data line 152, And is bent three times. The pixel electrode 170 is vertically symmetrical in its entirety.

The first data line 151 and the second data line 152 are formed so as to overlap with the pixel electrode 170 without being located outside the pixel electrode 170. [ More specifically, the first data line 151 and the second data line 152 are formed so as to overlap with the second sub-pixel electrode 172 of the pixel electrode 170.

The light blocking film 125 is located between the semiconductor layer 141 and the first insulating substrate 110 corresponding to the first data line 151 and the second data line 152 in each pixel.

The light blocking film 125 in the left pixel has the semiconductor layer 141 corresponding to the first drain electrode 154, the first data line 151 and the second data line 152 overlapping with the second sub-pixel electrode 172, And the first insulating substrate 110, as shown in FIG.

The light shielding film 125 in the right pixel has the semiconductor layer 141 corresponding to the second drain electrode 156, the first data line 151 and the second data line 152 overlapping the second sub-pixel electrode 172, And the first insulating substrate 110, as shown in FIG.

According to the present invention, since the first data line 151 and the second data line 152 are located in the pixel electrode 170, it is not necessary to form a separate shield electrode 179, Are located corresponding to the first data line 151 and the second data line 152 located within the pixel electrode 170, the aperture ratio is improved.

A liquid crystal display according to a fourth embodiment of the present invention will be described with reference to FIG.

13, in the liquid crystal display according to the fourth embodiment of the present invention, the pixel electrode 170 is elongated along the extending direction of the first data line 151 and the second data line 152 , And a square shape that is bent once.

The first sub-pixel electrode 171 is also elongated along the extending direction of the first data line 151 and the second data line 152 and has a square shape bent once. The second sub-pixel electrode 172 surrounds the first sub-pixel electrode 171.

The first data line 151 and the second data line 152 pass through the second sub-pixel electrode 172.

In other embodiments, the pixel electrode 170 may be bent twice or more than three times.

In another embodiment, the first data line 151 and the second data line 152 may extend along the outer periphery of the pixel electrode 170, which is bent at least once.

Although some embodiments of the present invention have been shown and described, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope or spirit of this invention. The scope of the present invention shall be determined by the appended claims and their equivalents.

1 is an equivalent circuit diagram of a liquid crystal display device according to the present invention,

2 is a graph showing the principle of improving the visibility of the liquid crystal display device according to the present invention,

3 is a layout diagram of pixels of a liquid crystal display device according to the first embodiment of the present invention,

4 is a sectional view taken along the line IV-IV in Fig. 3,

5 is a sectional view taken along line V-V in Fig. 3,

6 is a flowchart illustrating a method of manufacturing a liquid crystal display device according to a first embodiment of the present invention,

7A through 10 illustrate a method of manufacturing a liquid crystal display device according to a first embodiment of the present invention,

11 is a layout diagram of pixels of a liquid crystal display device according to a second embodiment of the present invention,

12 is a layout diagram of pixels of a liquid crystal display device according to the third embodiment of the present invention,

13 is a layout diagram of pixels of a liquid crystal display device according to a fourth embodiment of the present invention.

Description of the Related Art [0002]

100: first substrate 110: first insulating substrate

120: gate wiring 121: gate line

122: first gate electrode 123: second gate electrode

124: sustain electrode line 125:

131: gate insulating film 141: semiconductor layer

142: resistance contact layer 150: data wiring

151: first data line 152: second data line

153: first source electrode 154: first drain electrode

155: second source electrode 156: second drain electrode

161: protective film 165: organic layer

170: pixel electrode 171: first sub pixel electrode

172: second sub-pixel electrode 173: pixel electrode separation pattern

174: pixel electrode cut-off pattern 179: shield electrode

200: second substrate 210: second insulating substrate

221: Black Matrix 231: Color filter

241: overcoat layer 250: common electrode

251: common electrode cutting pattern 300: liquid crystal layer

Claims (21)

A first substrate; A second substrate facing the first substrate; And a liquid crystal layer interposed between the first substrate and the second substrate, Wherein the first substrate comprises: An insulating substrate; A gate line positioned on the insulating substrate; A data line including a first data line and a second data line insulated from the gate line, a first drain electrode electrically connected to the first data line, and a second drain electrode electrically connected to the second data line, and; A first sub-pixel electrode electrically connected to the first drain electrode and the second drain electrode, and a second sub-pixel electrode electrically connected to the first drain electrode and the second drain electrode, A pixel electrode including a second sub-pixel electrode electrically connected to the pixel electrode; A semiconductor layer positioned between the data line and the insulating substrate; An ohmic contact layer located between the semiconductor layer and the data line and in direct contact with the semiconductor layer and the data line; And a light blocking film positioned between at least a part of the data line and the insulating substrate, Wherein the light blocking film is positioned between at least one of the first drain electrode and the second drain electrode and the insulating substrate. The method according to claim 1, And the light blocking film is positioned between the semiconductor layer and the insulating substrate. 3. The method of claim 2, Wherein a width of a region of the light blocking film overlapping the region of the semiconductor layer is wider than a width of the region of the semiconductor layer. The method according to claim 1, Wherein the light blocking film is located in the same layer as the gate line. The method according to claim 1, Wherein the light blocking film is in a floating state. The method according to claim 1, Wherein the first substrate comprises: A thin film transistor having a first sub thin film transistor connected to the gate line and the first data line and a second sub thin film transistor connected to the gate line and the second data line, Wherein the first sub-thin film transistor includes the first drain electrode, and the second sub-thin film transistor includes the second drain electrode. The method according to claim 1, Wherein the first sub-pixel electrode and the second sub-pixel electrode are bent at least once along the extending direction of the first data line or the second data line. The method according to claim 1, Wherein the liquid crystal display device is driven at 120 Hz. The method according to claim 1, Wherein the first drain electrode and the second drain electrode apply a voltage to the pixel electrode, And the polarities of voltages applied to the first sub-pixel electrode and the second sub-pixel electrode are opposite to each other. The method according to claim 1, Wherein the first drain electrode and the second drain electrode apply a voltage to the pixel electrode, And a voltage applied to the first sub-pixel electrode is greater than a voltage applied to the second sub-pixel electrode. 11. The method according to any one of claims 1 to 10, The first drain electrode is in contact with the first sub pixel electrode, the second sub pixel electrode surrounds the first sub pixel electrode, Wherein the light blocking film is positioned below the first drain electrode overlapping with the second sub-pixel electrode. 11. The method according to any one of claims 1 to 10, The second sub-pixel electrode surrounds the first sub-pixel electrode, The first data line is located on the left side of the pixel electrode, The second data line is located on the right side of the pixel electrode, The second data line is electrically connected to the second sub-pixel electrode in any one of the pair of pixel electrodes adjacent in the gate line direction, and the first data line is electrically connected to the second sub- And the liquid crystal display device is connected to the liquid crystal display device. 11. The method according to any one of claims 1 to 10, Wherein the light blocking film is positioned corresponding to the first data line, the second data line, the first drain electrode, and the second drain electrode. 11. The method according to any one of claims 1 to 10, Wherein the light shielding film is located between at least one of the insulating substrate and the first drain electrode and between the insulating substrate and the second drain electrode. 12. The method of claim 11, And the light blocking film is not disposed between the second drain electrode and the insulating substrate. 16. The method of claim 15, The first drain electrode and the second drain electrode each include a first branched electrode extended for contact with the pixel electrode and a second branched electrode extended from a contact portion between the pixel electrode and the first branched electrode, And the light blocking film is not disposed between the second branched electrode of the first drain electrode and the insulating substrate. 12. The method of claim 11, Wherein the second substrate comprises a common electrode, Wherein the pixel electrode includes a pixel electrode cutout pattern, Wherein the common electrode comprises a common electrode dissection pattern, Wherein the liquid crystal layer is in a vertical alignment mode. 12. The method of claim 11, A plurality of pixel electrodes are provided, Wherein the first substrate further comprises a shield electrode positioned between the adjacent pixel electrodes and positioned along a longitudinal direction of the first data line or the second data line. 19. The method of claim 18, The light shielding film is located along the shield electrode, And the light blocking film is positioned corresponding to each of the first data line and the second data line. 20. The method of claim 19, Wherein the shield electrode is the same layer as the pixel electrode. Providing an insulating substrate; Forming a gate metal layer on the insulating substrate; Patterning the gate metal layer to form a gate wiring including a gate line and a light blocking film; Forming an insulating layer on the gate wiring; Forming a silicon layer on the insulating layer; Forming a resistive contact silicon layer on the silicon layer; Forming a data metal layer on the ohmic contact silicon layer; Patterning the data metal layer, the ohmic contact silicon layer, and the silicon layer through a single mask to form a first data line and a second data line, respectively, which are insulated from and intersected with the gate line, a first data line electrically connected to the first data line, Forming a data line, an ohmic contact layer, and a semiconductor layer having a drain electrode, a second drain electrode electrically connected to the second data line, and at least a portion overlapping the light shielding film; Forming an organic layer on the semiconductor layer, the ohmic contact layer, and the data line; Forming a transparent metal layer on the organic layer; A first sub pixel electrode electrically connected to one of the first drain electrode and the second drain electrode by patterning the transparent metal layer and a second sub pixel electrode electrically connected to the first drain electrode and the second drain electrode, And forming a pixel electrode including a second sub-pixel electrode electrically connected to the other of the second drain electrodes, Wherein the light shielding film is located between at least one of the first drain electrode and the second drain electrode and the insulating substrate.

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