KR101350923B1 - Semiconductor light emitting device and method of manufacturing the same - Google Patents

Abstract

The present invention provides a semiconductor light emitting device capable of preventing a leakage current phenomenon by forming a surface modification layer on the exposed surface of the p-type semiconductor layer, the active layer and the n-type semiconductor layer by ion implantation or plasma doping method and a method of manufacturing the same. It is about.

Description

Semiconductor light emitting device and method of manufacturing the same {Semiconductor light emitting device and method of manufacturing the same}

The present invention relates to a semiconductor light emitting device and a method of manufacturing the same, and more particularly, to a semiconductor light emitting device and a method of manufacturing the same that can improve the luminous efficiency of the device by reducing the leakage current of the semiconductor light emitting device as much as possible.

A light emitting diode (LED) is a semiconductor light emitting device that converts electrical energy into light energy, and emits light by flowing current through a compound semiconductor terminal and combining light with electrons and holes in a p-n junction or in an active layer.

The light emitting diode can realize various colors by adjusting the composition ratio of the compound semiconductor, and has high light conversion efficiency, low power consumption, lifetime of 10,000 to 50,000 hours, and fast response time when turned on and off. In addition, it can be integrated in various forms as a point light source, and can be made in a small size, so that it is possible to design sophisticated and environmentally friendly. Currently, light emitting diodes are expanding their application range to large outdoor billboards and backlights of liquid crystal displays.

The light emitting diodes are mainly made of III-V compound semiconductors. Since gallium nitride compound semiconductors (GaN) have high enthusiasm stability and a wide band gap, they have attracted much attention in the development of semiconductor light emitting devices and high output electronic components including light emitting diodes.

1 shows a general structure of a conventional semiconductor light emitting device.

Referring to FIG. 1, in the conventional semiconductor light emitting device, an n-type semiconductor layer 110, an active layer 120, and a p-type semiconductor layer 130 are sequentially stacked on a metal or silicon substrate 100. The p-type electrode 140 and the n-type electrode 150 are in electrical contact with the surfaces of the type semiconductor layer 130 and the n-type semiconductor layer 110, respectively. ITO is a transparent electrode layer.

In the conventional process, an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are sequentially stacked, and a process of exposing a portion of the n-type semiconductor layer by etching the stacked semiconductor layers using a photolithography process is proposed. However, according to the conventional technique, during the etching process by the photolithography process, dry etching is performed by about 1 μm from the p-type semiconductor layer to the n-type semiconductor layer, wherein the Ga generated in the semiconductor light emitting device _x Cl _{1 -x} will stick to the etch surface. As such, when Ga _x Cl _1-x generated during the etching process adheres to the p-type semiconductor layer and the active layer, a significant leakage current is generated during the current injection for the operation of the light emitting diode. There is a lot of difficulty in manufacturing a high quality light emitting diode due to shortening the lifespan and deterioration of optical and electrical properties.

The leakage current flows through the surface and the interface of the device when a voltage is applied to the electrode terminal, which significantly affects the performance of the device and may cause the device to be destroyed in some cases, thereby reducing the optical and electrical characteristics of the device. In order to improve the research to reduce the leakage current is absolutely necessary.

Therefore, in the related art, in order to efficiently suppress the leakage current of the light emitting diode, a leakage current of the light emitting diode may be reduced by using a method of forming a passivation layer on the semiconductor surface as in Korean Patent No. 10-0988194. It is presenting a way.

On the other hand, the technology of forming a passivation layer such as Si02, Si3N4 on the surface of the semiconductor, such as Korea Patent Registration No. 10-0988194, because the damage caused by the plasma due to the process characteristics still prevents the leakage current reduction phenomenon of the light emitting device Is difficult.

Therefore, in the art, unlike the technique of forming a protective film such as Si02 and Si3N4 on the surface of the semiconductor as described above, a novel method that can prevent the leakage current flowing through the surface and interface of the device through the surface treatment of the semiconductor device This is required.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor light emitting device in which a surface modification layer is formed by an ion implantation or plasma doping method on a surface of a gallium nitride based semiconductor stacked structure, and a method of manufacturing the same.

In addition, the present invention is a semiconductor in which a resistance increasing layer having an insulating role is formed on a surface of a p-type semiconductor layer and an active layer of a gallium nitride based semiconductor stacked structure, and a resistance reducing layer having a ohmic contact role is formed on a surface of an n-type semiconductor layer. Another object is to provide a light emitting device and a method of manufacturing the same.

The present invention provides a gallium nitride based semiconductor stacked structure in which an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are stacked; A p-type electrode and an n-type electrode connected to the p-type semiconductor layer and the n-type semiconductor layer, respectively; And a surface modification layer formed on the exposed surface of the gallium nitride based semiconductor stacked structure, wherein the surface modification layer comprises a resistance increase layer and a resistance decrease layer.

The resistance increasing layer is formed on the exposed surface of the active layer and the p-type semiconductor layer, the resistance reducing layer is formed on the exposed surface of the n-type semiconductor layer,

The resistance increasing layer and the resistance reducing layer are formed at the same time,

The surface modification layer is formed by surface treatment by ion implantation or plasma doping method,

The surface modification layer is Si, C, Ge, Sn, Pb, O, S, Se, Te, N, P, As, Sb, Bi, Zn, Ca, Ar, Be, Ti, H, He, Al, In And it is formed by surface treatment with ions containing any one selected from B.

In addition, the present invention comprises the steps of forming a gallium nitride-based semiconductor laminated structure consisting of a stack of n-type semiconductor layer, active layer and p-type semiconductor layer; Forming a p-type electrode and an n-type electrode in contact with the p-type semiconductor layer and the n-type semiconductor layer, respectively, of the semiconductor stacked structure; And forming a surface modification layer including a resistance increase layer and a resistance decrease layer on the exposed surface of the gallium nitride based semiconductor stacked structure.

The resistance increasing layer is formed on the exposed surface of the active layer and the p-type semiconductor layer, the resistance reducing layer is formed on the exposed surface of the n-type semiconductor layer,

The resistance increasing layer and the resistance reducing layer are formed at the same time,

The surface modification layer is formed by surface treatment of the gallium nitride based semiconductor stacked structure by ion implantation or plasma doping method,

The surface modification layer is Si, C, Ge, Sn, Pb, O, S, Se, Te, N, P, As, Sb, Bi, Zn, Ca, Ar, Be, Ti, H, He, Al, In And it is formed by surface treatment with ions containing any one selected from B.

The present invention forms a resistance increasing layer having an insulating property on a surface of a p-type semiconductor layer and an active layer as a surface modification layer, thereby preventing a leakage current path on the surface of the gallium nitride based semiconductor laminated structure by the resistance increasing layer to prevent surface leakage. Since the current can be reduced, the luminous efficiency of the device can be improved.

In addition, the present invention forms a resistance reducing layer on the surface of the n-type semiconductor layer to further improve the ohmic contact characteristics and current diffusion characteristics as a surface modification layer, thereby reducing the resistance of the n-type semiconductor layer by the resistance reduction layer This is made to have an effect that can increase the electrical properties of the n-type semiconductor layer.

1 is a view showing a conventional semiconductor light emitting device.
2 is a view showing a semiconductor light emitting device according to an embodiment of the present invention.
3A to 3D are views for explaining a method of manufacturing a semiconductor light emitting device according to an embodiment of the present invention.
Figure 4 is a graph showing the electrical and insulating properties of the p-type semiconductor layer and the n-type semiconductor layer during the surface treatment by ion implantation of the semiconductor light emitting device according to the embodiment of the present invention.

Hereinafter, exemplary embodiments of a semiconductor light emitting device and a method of manufacturing the same will be described in detail with reference to the accompanying drawings.

The present invention relates to a semiconductor light emitting device in which a surface modification layer including a resistance increase layer and a resistance decrease layer is formed on an exposed surface of a gallium nitride based semiconductor stacked structure in which an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are stacked.

2 is a view showing a semiconductor light emitting device having a horizontal structure according to an embodiment of the present invention.

2, in a semiconductor light emitting device having a horizontal structure according to an exemplary embodiment of the present invention, an n-type semiconductor layer 210, an active layer 220, and a p-type semiconductor layer 230 are stacked on a substrate 200. A gallium nitride based semiconductor stacked structure 230S is formed, and a p-type electrode 240 and an n-type electrode 250 connected to the p-type semiconductor layer 230 and the n-type semiconductor layer 210 are formed, respectively. The surface modification layer 260 including the resistance increase layer 261 and the resistance decrease layer 262 is formed on the exposed surface of the gallium nitride based semiconductor stacked structure 230S.

The substrate 200 is formed of a substrate suitable for growing a nitride semiconductor single crystal, preferably, using a transparent material including sapphire or zinc oxide (ZnO), gallium nitride (GaN), It may be formed using any one of silicon carbide (SiC) and aluminum nitride (AlN). On the other hand, as a layer for improving the lattice matching with the substrate formed of a material such as sapphire on the substrate, generally a buffer layer consisting of an AlN / GaN layer or GaN layer can be formed, in the embodiment of the present invention Will be omitted.

The n-type semiconductor layer 210, the active layer 220, and the p-type semiconductor layer 230 may have an In _x Al _y Ga _{1 -x- y} N composition formula doped with each conductive dopant (where 0 _{≦ x ≦} 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). The n-type semiconductor layer 210 may be formed of a GaN layer or a GaN / AlGaN layer doped with n-type conductive impurities. For example, Si, Ge, Sn, or the like may be used as the n-type conductive impurities. And preferably Si is mainly used.

The active layer 220 may be formed of one quantum well layer, a double heterostructure, or a multi-quantum well layer composed of an InGaN / GaN layer.

The p-type semiconductor layer 230 may be formed of a GaN layer or a GaN / AlGaN layer doped with a p-type conductive impurity, and the p-type conductive impurity doping may include, for example, Mg, Zn, Be, or the like. It is used, Preferably Mg is mainly used. A portion of the p-type semiconductor layer and the active layer is removed by mesa etching to expose a portion of the n-type semiconductor layer on the bottom.

The p-type electrode 240 may be formed in a stacked structure of the transparent electrode 241 and the bonding electrode 242. The transparent electrode 241 of the p-type electrode 240 is preferably made of a mixture formed by adding one or more elements selected from the group consisting of Sn, Zn, Mg, Cu, Ag, and Al to indium oxide. The element is preferably added in an amount of 1 to 30% by weight based on the weight of the entire mixture. The bonding electrode 242 is an electrode for gold wire bonding, and may be additionally provided to increase electrical conductivity of the p-type electrode 240.

The surface modification layer 260 uses an ion implantation or plasma doping method, Si, C, Ge, Sn, Pb, O, S, Se, Te, N, P, As, Sb, Bi, Zn, Ca, It is formed by a method of surface treatment using any one of Ar, Be, Ti, H, He, Al, In and B ions, preferably ion implantation of ions such as H (Hydrogen) to the semiconductor layer It can be formed by the method of surface treatment. However, it is not specifically limited to the kind of ion implanted.

The surface modification layer 260 may have different characteristics depending on the material of the semiconductor layer. Preferably, the surface modification layer 260 is disposed on the exposed surfaces of the active layer 220 and the p-type semiconductor layer 230. The surface modification layer to be formed is made of an increase resistance layer 261 of insulating properties, the surface modification layer 260 formed on the exposed surface of the n-type semiconductor layer further improves ohmic contact characteristics and current diffusion characteristics The resistive reduction layer 262 is made.

Here, an important feature of the semiconductor light emitting device having a horizontal structure according to an embodiment of the present invention is that the surface modification layer (I) by surface implantation by ion implantation or plasma doping method on the exposed surface of the gallium nitride-based semiconductor stacked structure 230S 260 is formed, and preferably, on the exposed surfaces of the p-type semiconductor layer 230 and the active layer 220, a resistance increasing layer 261 is formed as a surface modification layer, and simultaneously On the exposed surface of the n-type semiconductor layer 210, a resistance reduction layer 262 is formed as a surface modification layer.

As such, the present invention forms the surface modification layer 260 including the resistance increase layer 261 and the resistance decrease layer 262 by ion implantation or plasma doping on the surface of the gallium nitride based semiconductor stacked structure 230S. As a result, leakage current generated in the gallium nitride based semiconductor stacked structure 230S can be prevented, and ion implantation is performed in the n-type semiconductor layer 210 due to the formation of the resistance reduction layer 262. The electrical properties are further improved as compared to before.

Specifically, when the surface modification layer 260 is formed on the surface of the gallium nitride-based semiconductor stacked structure by ion implantation or plasma doping, the surface portion of the p-type semiconductor layer 230 or the active layer 220 In the electron and hole deep-level trap, the resistance increasing layer 261, which is an insulating region of a very high resistance component, is formed, whereas the n-type semiconductor layer 210 In the surface portion, the concentration of free electrons is increased to form a resistance reduction layer 262 which is an ohmic contact region in which electrical conductivity is improved.

In the conventional semiconductor light emitting device, during the photolithography process for etching the p-type semiconductor layer and the active layer, a phenomenon in which Ga _x Cl _{1 -x} generated in the semiconductor light emitting device adheres to the surface of an etched surface appears. in particular, a phenomenon that when the p-type semiconductor layer and generated during the etching process on the surface of the active layer is Ga _x Cl _{1 -x} adhere substantial leakage current in the current injection for the operation of the light emitting diodes for this reason has occurred is displayed.

However, as in the present invention, when the resistance increasing layer 261 is formed as a surface modification layer on the surfaces of the p-type semiconductor layer 230 and the active layer 220, the resistance is high so that current does not flow well. Accordingly, the surface leakage current can be reduced by blocking the leakage current path on the surface of the gallium nitride based semiconductor laminate. In fact, the leakage current flows further to the surface and the side than the bulk region of the light emitting device, which has a significant effect on the performance of the device. Accordingly, in the present invention, a surface modification layer including a resistance increasing layer 261 is formed on the exposed surfaces of the p-type semiconductor layer 230 and the active layer 220 to block leakage current flowing to the surface and side surfaces.

In addition, according to the present invention, the resistance reduction layer 262 is formed on the surface of the n-type semiconductor layer 210, thereby reducing the resistance of the n-type semiconductor layer 210 due to the resistance reduction layer 262. As a result, the electrical characteristics of the n-type semiconductor layer can be effectively increased.

A method of manufacturing a semiconductor light emitting device having a horizontal structure according to an embodiment of the present invention will be described with reference to FIGS. 3A to 3D.

Referring to FIG. 3A, after the n-type semiconductor layer 210, the active layer 220, and the p-type semiconductor layer 230 are formed on the substrate 200, a gallium nitride based semiconductor stacked structure 230S is formed. The transparent electrode 241 is formed as a p-type electrode on the p-type semiconductor layer 230 of the gallium nitride based semiconductor stacked structure 230S.

Here, as a layer for improving lattice matching with a substrate formed of a sapphire-like material on the substrate 200, a buffer layer generally made of an AlN / GaN layer or a GaN layer may be further formed.

The substrate 200 may be formed of a substrate suitable for growing a nitride semiconductor single crystal. Preferably, the substrate 200 may be formed using a transparent material including sapphire, or may be formed of any one selected from ZnO, GaN, SiC, and AlN.

The n-type semiconductor layer 210, the active layer 220, and the p-type semiconductor layer 230 may have an In _x Al _y Ga _{1 -x- y} N composition formula doped with each conductive dopant (where 0 _{≦ x ≦} 1, It can be formed from a semiconductor material having 0 ≦ y ≦ 1 and 0 ≦ x + y ≦ 1). Preferably, the n-type semiconductor layer 210 may be formed of a GaN layer or a GaN / AlGaN layer doped with n-type conductive impurities, for example, Si, Ge, Sn Etc. can be used, Preferably Si is mainly used.

The active layer 220 may be formed of one quantum well layer, a double heterostructure, or a multi-quantum well layer composed of an InGaN / GaN layer.

The p-type semiconductor layer 230 may be formed of a GaN layer or a GaN / AlGaN layer doped with a p-type conductive impurity, and the p-type conductive impurity doping may include, for example, Mg, Zn, Be, or the like. It is used, Preferably Mg is mainly used.

The transparent electrode 241 is formed of a mixture formed by adding one or more elements selected from the group consisting of Sn, Zn, Mg, Cu, Ag, and Al to indium oxide (In ₂ O ₃ ).

Referring to FIG. 3B, a portion of the transparent electrode 241, the p-type semiconductor layer 230, and the active layer 220 are etched to expose a portion of the n-type semiconductor layer 210.

Referring to FIG. 3C, a bonding electrode and a patterning process are performed on the gallium nitride-based semiconductor stacked structure 230S and the transparent electrode 241 partially exposed by the etching process, thereby bonding a bonding electrode on the transparent electrode 241. 242 to form a p-type electrode 240 including the transparent electrode 241 and the bonding electrode 242, and then n-type semiconductor layer 210 exposed by the etching process. An n-type electrode 250 is formed on the substrate.

The bonding electrode 242 constituting the p-type electrode is a pad for electrical connection with a subsequent circuit board or lead frame. The n-type electrode 250 formed on the n-type semiconductor layer 210 is a pad for electrical connection to a subsequent circuit board or lead frame, and is preferably formed using a metal such as Cr or Cu. Do.

Referring to FIG. 3D, the exposed p-type semiconductor layer 230, the active layer 220, and the surface-treated gallium nitride based semiconductor stacked structure 230S by the ion implantation or plasma doping method are exposed. The surface modification layer 260 is formed on the surface of the n-type semiconductor layer 210.

The surface modification layer 260 may be Si, C, Ge, Sn, Pb, O, S, Se, Te, N, P, As, Sb, Bi, Zn, Using any one of Ca, Ar, Be, Ti, H, He, Al, In and B ions can be formed by a surface treatment on the exposed portion of the gallium nitride-based laminate (230S). Preferably, it may be formed by ion implantation of ions such as H (hydrogen) on at least part of the surface of the gallium nitride based semiconductor laminate. However, it is not specifically limited to the kind of ion implanted.

Herein, the surface modification layer 260 formed by the surface treatment through ion implantation may have different characteristics depending on each layer of the gallium nitride based semiconductor stacked structure. First, an active layer grown as an InGaN / GaN layer ( In the case of 220, the resistive increase layer 261 having an insulating property is formed on the exposed surface. Similarly, the p-type semiconductor layer 230 is also formed as the resistive increase layer 261 of the insulating region on the exposed surface. To form. On the other hand, the n-type semiconductor layer 210 is formed as a resistance reduction layer 262 that can further improve ohmic contact characteristics and current diffusion characteristics on the exposed surface.

According to a general mechanism, when the surface modification layer 260 is formed on the surface of the gallium nitride based semiconductor stacked structure by ion implantation or plasma doping, a small amount of ions is formed on the surface portion of the p-type semiconductor layer 230. The injection and electron hole and hole deep-level traps also produce a very high resistance region, which in turn generates high resistance components. Similarly, the surface of the active layer 220 has a high resistance component. Is characterized in that an insulating region of is produced.

In the process of forming the p-type semiconductor layer 230, the bonding of Mg and H is cut off by an activation method in the heat treatment process, in which a hole is formed in the p-type semiconductor layer and a p-type semiconductor layer is formed. Done. When ion implantation is performed to the p-type semiconductor layer in which such a hole is formed in the same manner as described above, ions are implanted into the holes formed in the p-type semiconductor layer, thereby increasing the resistance component on the surface of the p-type semiconductor layer. Will appear. In addition, the phenomenon that the resistance component increases by the same principle also appears in the active layer.

On the other hand, in the case of the n-type semiconductor layer 210, free electrons are formed by doping Si, which is an impurity, in the formation process of the n-type semiconductor layer. When ion implantation is performed by the method, high doping of free electrons is performed, and a resistance decreases on the surface of the n-type semiconductor layer.

As such, the present invention is a surface treatment by performing an ion implantation method for the gallium nitride-based semiconductor stacked structure, the resistance increasing layer as a surface modification layer on the exposed surface of the p-type semiconductor layer 230 and the active layer 220 By forming a resistance reduction layer 262 on the exposed surface of the n-type semiconductor layer 210 in a single surface treatment process by using a surface modification layer. The leakage current path at the surface of the gallium nitride based semiconductor stacked structure may be blocked to reduce surface leakage current, and before the ion implantation is performed in the n-type semiconductor layer part by the resistance reduction layer 262. Compared with this, the electrical characteristics are further improved. As a result, the present invention can be expected to improve the external quantum efficiency of the device.

In fact, the leakage current flows further to the surface and the side than the bulk region of the light emitting device, which has a significant effect on the performance of the device. Accordingly, the present invention provides a method of forming a surface modification layer consisting of a resistance increasing layer on the surface of the p-type semiconductor layer and the active layer exposed by the etching process, so as to block the leakage current flowing to the surface and the side surface of the device It was expected to improve performance.

4 is a graph showing electrical and insulating properties of the p-type semiconductor layer 230 and the n-type semiconductor layer 210 during surface treatment by ion implantation of the semiconductor light emitting device according to the embodiment of the present invention.

Referring to FIG. 4, first, in the p-type semiconductor layer subjected to ion implantation according to the present invention, it can be seen that the insulating property is superior to that of the p-type semiconductor layer not undergoing ion implantation, and then, the n-type semiconductor layer Looking at the part, it can be seen that the n-type semiconductor layer in which the ion implantation is performed according to the present invention is superior to the n-type semiconductor layer in which the ion implantation is not advanced. Through this, it can be seen that the leakage current characteristics of the semiconductor light emitting device according to the present invention are improved and the electrical characteristics are improved.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but many variations and modifications may be made without departing from the spirit and scope of the invention. The scope of which is set forth in the appended claims.

200: substrate 210: n-type semiconductor layer
220: active layer 230: p-type semiconductor layer
230S: gallium nitride based semiconductor laminated structure
240: p-type electrode 241: transparent electrode
242: bonding electrode 250: n-type electrode
260: surface modification layer 261: resistance increasing layer
262: resistance reduction layer

Claims (10)

delete delete delete delete delete forming a gallium nitride based semiconductor laminate structure consisting of a stack of an n-type semiconductor layer, an active layer and a p-type semiconductor layer;
Forming a p-type electrode and an n-type electrode in contact with the p-type semiconductor layer and the n-type semiconductor layer, respectively, of the semiconductor stacked structure; And
And forming a surface modification layer including a resistance increase layer and a resistance decrease layer on the exposed surface of the gallium nitride based semiconductor stacked structure.
The resistance increasing layer and the resistance reduction layer is a semiconductor light emitting device manufacturing method comprising the step of forming at the same time.
The method according to claim 6,
Wherein the resistance increasing layer is formed on an exposed surface of the active layer and the p-type semiconductor layer, and the resistance reducing layer is formed on an exposed surface of the n-type semiconductor layer.
delete The method according to claim 6,
The surface modification layer is a semiconductor light emitting device manufacturing method is formed by the surface treatment of the ion implantation or plasma doping method on the gallium nitride based semiconductor stacked structure.
The method of claim 9,
The surface modification layer is Si, C, Ge, Sn, Pb, O, S, Se, Te, N, P, As, Sb, Bi, Zn, Ca, Ar, Be, Ti, H, He, Al, In And B surface treatment with ions comprising any one selected from B.

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