KR101310518B1 - Solar cell and method of manufacturing the same - Google Patents

Abstract

The present invention relates to a solar cell and a manufacturing method thereof.
According to an aspect of the present invention, there is provided a solar cell including: a semiconductor substrate having a via hole penetrating from one surface of a light receiving surface to the other surface thereof and doped with impurities of a first conductivity type; An emitter layer disposed on the semiconductor substrate and doped with impurities of a second conductivity type different from the first conductivity type; A first electrode formed on the emitter layer and extending from the one surface to the other surface of the semiconductor substrate to fill the via hole; A second electrode disposed on the other surface of the semiconductor substrate and electrically separated from the first electrode; And an insulating layer formed between the emitter layer on the sidewall of the via hole and the first electrode.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a solar cell,

The present invention relates to a solar cell and a method for manufacturing the same, and more particularly, to a solar cell including a MWT (Metal Wrap Through) structure and a method for manufacturing the same.

With the recent depletion of existing energy resources such as oil and coal, interest in alternative energy to replace them is increasing. In particular, solar cells are attracting particular attention because they are rich in energy resources and have no problems with environmental pollution. Solar cells include solar cells that use steam to generate steam for rotating turbines, and solar cells that convert photons into electrical energy using the properties of semiconductors. (Hereinafter referred to as 'solar cell').

A solar cell is a semiconductor device that converts solar energy into electrical energy and has a p-n junction. The basic structure is the same as that of a diode.

When light is incident on the solar cell, the incident light is absorbed by the solar cell to cause interaction with materials constituting the semiconductor of the solar cell. As a result, electrons and holes, which are minority carriers, are formed, and they move to both of the connected electrodes to obtain an electromotive force, which is called a photovoltaic effect.

On the other hand, the structure of the general solar cell has a structure in which the front electrode and the rear electrode is provided on the front and rear, respectively, as the front electrode is provided on the front of the light receiving surface, the light receiving area is reduced by the area of the front electrode. In order to solve the problem that the light receiving area is reduced, a back electrode solar cell has been proposed. The back electrode solar cell is characterized by maximizing the light receiving area of the solar cell by providing a (+) electrode and a (-) electrode on the back of the solar cell.

Such back-electrode type solar cells are classified into interdigitated back contact (IBC), point contact type, emitter wrap through (EWT), metal wrap through (MWT), and the like according to the type. The MWT type solar cell is a structure in which the front of the grid fingers and the bus bars of the bus bar are left in front and the bus bars are moved to the rear. It is connected by penetrating via holes.

1 is a view showing the structure of a MWT solar cell according to the prior art.

As shown in FIG. 1, the conventional MWT solar cell includes an emitter layer 11 on the entire surface of the semiconductor substrate 10, and an antireflection layer 11 and a front grid electrode 12 on the entire surface of the substrate 10. ) Is provided. In addition, a p electrode 15 is provided on a rear surface of the substrate 10, and the grid electrode 12 is connected to the rear surface of the semiconductor substrate 10 through a via hole 14 penetrating through the substrate 10.

Meanwhile, a back surface field (p +) 16 is provided under the p electrode 15, that is, inside the rear surface of the semiconductor substrate 10 to improve charge collection efficiency. The layer 16 and the p electrode 15 are in contact with each other.

As described above, in the case of the MWT-type solar cell, the current flow is improved by reducing the shading loss.

However, in the conventional MWT solar cell, as the emitter layer formed in the via hole portion is doped shallowly (low concentration), the shunt is easily generated and the photoelectric conversion efficiency is lowered compared to the emitter layer formed on the front surface of the semiconductor substrate. There is a problem.

The present invention has been made to solve the problems of the prior art as described above, the general object of the present invention is a solar cell and its manufacture which can substantially eliminate one or more problems caused by the limitations and disadvantages in the prior art To provide a way.

Another specific object of the present invention is to provide a solar cell capable of suppressing shunt generation in a via hole portion in a solar cell of a MWT structure and a method of manufacturing the same.

To this end, a solar cell according to an embodiment of the present invention comprises a semiconductor substrate having a via hole penetrating from one surface, which is a light receiving surface to the other surface, and doped with impurities of a first conductivity type; An emitter layer disposed on the semiconductor substrate and doped with impurities of a second conductivity type different from the first conductivity type; An insulating layer formed on the emitter layer on the sidewalls of the via hole; A first electrode extending from the one surface of the semiconductor substrate to the other surface to fill the via hole; And a second electrode disposed on the other surface of the semiconductor substrate and electrically separated from the first electrode.

In one embodiment of the present invention, it may further include an antireflection layer formed on the emitter layer.

In one embodiment of the present invention, the anti-reflection layer may be composed of a plurality of layers having different refractive indices.

In one embodiment of the present invention, the insulating layer may be made of the same material as the anti-reflection layer.

In one embodiment of the present invention, the anti-reflection layer may include at least one of silicon nitride (Si _X N _Y ) material or silicon oxide (Si _X O _Y ) material.

In an embodiment, the semiconductor device may further include a back surface layer formed in the semiconductor substrate to contact the second electrode and doped with impurities of a first conductivity type at a higher concentration than the semiconductor substrate.

In one embodiment of the invention, the semiconductor substrate may have a texturing surface.

In one embodiment of the present invention, the semiconductor substrate may be a polycrystalline silicon substrate.

In addition, the solar cell manufacturing method according to an embodiment of the present invention comprises the steps of (a) forming a via hole to penetrate through the first conductive semiconductor substrate from one surface to the other surface facing; (b) forming an emitter layer doped with impurities of a second conductivity type different from the first conductivity type on the semiconductor substrate; (c) forming an insulating layer on the sidewalls of the via holes; (d) forming a first electrode extending from the one surface to the other surface of the semiconductor substrate to fill the via hole; And (e) forming a second electrode on the other surface of the semiconductor substrate to be electrically separated from the first electrode.

In an embodiment of the present disclosure, the method may further include forming a texturing by etching the surface of the semiconductor substrate before the step (a).

In one embodiment of the present invention, after the step (b) may further comprise the step of forming an anti-reflection layer on the emitter layer.

In one embodiment of the present invention, the anti-reflection layer may be formed of a plurality of layers having different refractive indices.

In one embodiment of the present invention, after the step (e) may further comprise the step of forming a backside field layer between the semiconductor substrate and the second electrode.

In an embodiment of the present disclosure, the method may further include removing a damaged layer by etching a part of the surface of the semiconductor substrate damaged by the via hole forming process after the (a) process and before the (b) process.

In an embodiment of the present invention, the method may further include removing the natural oxide film generated by the impurity doping after the emitter layer is formed in the process (b).

According to the solar cell and the manufacturing method according to the present invention, it is possible to improve the photoelectric conversion efficiency of the solar cell by preventing the shunt generation in the via hole portion of the solar cell of the MWT structure.

1 is a cross-sectional view showing the structure of an MWT solar cell according to the prior art.
2 is a cross-sectional view showing the structure of a solar cell according to an embodiment of the present invention.
3 is a cross-sectional view showing the structure of a solar cell according to another embodiment of the present invention.
4A to 4F are flowcharts illustrating a solar cell manufacturing process according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear. In addition, the terms described below are defined in consideration of the functions of the present invention, and these may vary depending on the intention of the user, the operator, or the precedent. Therefore, the definition should be based on the contents throughout this specification.

First, Figure 2 is a cross-sectional view showing the structure of a solar cell according to an embodiment of the present invention.

2, the solar cell 100 according to the present exemplary embodiment includes a semiconductor substrate 110, a first electrode 130, a second electrode 140, and an insulating layer 150. In addition, an emitter layer 111, an antireflection layer 112, and a back field layer 113 is included.

The semiconductor substrate 110 is, for example, a silicon substrate doped (p ⁻ ) with a low concentration of impurities of a first conductivity type, and has a via hole 120 penetrating from the front surface to the back surface of the semiconductor substrate 10. . Here, any one of the impurity of the first conductivity type and the impurity of the second conductivity type may be a p-type impurity, and the other may be an n-type impurity.

The emitter layer 111 is formed on the front surface of the semiconductor substrate 110 and the sidewalls of the via holes 120 and is doped with impurities of a second conductivity type. As such, the PN junction of the solar cell is formed by forming the emitter layer 111 doped with the impurity of the second conductivity type on the semiconductor substrate 110 doped with the impurity of the first conductivity type. For example, the semiconductor substrate 110 may be a p-type semiconductor, and the emitter layer 111 may be an n-type semiconductor. Alternatively, the semiconductor layer 110 may include a plurality of n-type semiconductor layers or may include a plurality of p-type semiconductor layers. Alternatively, the semiconductor substrate 110 may be an n-type semiconductor, and the emitter layer 111 may be a p-type semiconductor.

The anti-reflection layer 112 is formed on the upper surface of the emitter layer 111, and by suppressing the reflection of the sunlight incident on the semiconductor substrate 110 from the outside, it is possible to lower the light reflectance of the solar cell 100, accordingly It improves the efficiency of solar cells.

The antireflection layer 112 may have a single layer structure or a multi layer structure. For example, the refractive index may be implemented as a plurality of layers having different refractive indices, and the refractive index of the second reflective layer formed on the first reflective layer is preferably lower than the refractive index of the first reflective layer.

In addition, the refractive index of the first reflective layer is preferably lower than the refractive index of the semiconductor substrate 110. That is, the refractive index may increase according to the order in which sunlight is incident from the outside, that is, in the order of the second antireflection layer, the first antireflection layer, and the semiconductor substrate.

By changing the refractive index of the anti-reflection layer, the traveling direction of solar light incident from the outside may be changed to a direction in which the light reflectance may be reduced, thereby reducing the reflectance of the solar cell.

The back surface field 113 is formed inside the back surface of the semiconductor substrate 110 to reduce carrier transfer resistance to improve charge collection efficiency, and is the same as impurities doped in the semiconductor substrate 110. The impurity of the first conductivity type, which is a conductivity type impurity, is composed of a highly doped layer p ⁺ .

The first electrode 130 may be electrically connected to the emitter layer 111. Accordingly, the first electrode 130 may collect and output one of the carriers generated by the incident light, for example, holes. Since the first electrode 130 includes a portion disposed on the light incident surface, the first electrode 130 may be referred to as a front electrode. In addition, when the first electrode 130 is formed so as to penetrate from one surface to the other surface of the semiconductor substrate 110, the portion of the light incident surface (light receiving surface) of the solar cell 100 is covered by the first electrode 130. The area of the solar cell 100 can be reduced, thereby increasing the area of the portion where the solar cell 100 can receive sunlight, thereby increasing the light efficiency.

The second electrode 140 is formed on the rear surface of the semiconductor substrate 110 to be in contact with the rear field layer 113, and collects and outputs one of carriers generated by incident light, for example, electrons. The second electrode 140 is disposed on the opposite side of the light incident surface, and thus the second electrode 140 may be referred to as a rear electrode.

The insulating layer 150 is formed between the emitter layer 111 on the sidewalls of the via hole and the first electrode 130, and serves to prevent shunt occurring in the via hole 120. That is, since the emit layer formed in the via hole portion is doped at a lighter concentration (shallower) than the emitter layer formed on the front surface (upper surface) of the semiconductor substrate 110, a shunt is formed between the emit layer 111 and the first electrode 130. Since there is a high possibility of occurrence, the shunt can be prevented by forming the insulating layer 150 between the emitter layer 111 and the first electrode 130.

The power production principle of the solar cell 100 configured as described above is briefly described, when light is incident from the outside, electrons and holes are formed by using light energy at the junction surface of the semiconductor substrate 110 and the emitter layer 111. The electrons and holes are collected using the first electrode 130 and the second electrode 140. As the electrons and holes accumulate in each electrode, a potential difference is generated, thereby generating power by solar light.

3 is a diagram illustrating a structure of a solar cell according to another embodiment of the present invention, which illustrates a case in which a surface of a semiconductor substrate has a texturing structure.

That is, the surface of the semiconductor substrate 110 may be textured. Texturing is to form an unevenness by etching the surface of the semiconductor substrate, the surface texturing can improve the efficiency of the solar cell by not only increase the area of the light receiving surface but also reduce the light reflectance on the surface of the semiconductor substrate. In addition, it is possible to improve the efficiency of the solar cell by appropriately adjusting the texturing direction and the inclination angle.

In addition, as the semiconductor substrate 110 has a texturing structure, the emitter layer 111, the antireflection layer 112, and the insulating layer 150 formed thereon also have a texturing structure.

Referring to the solar cell manufacturing method according to an embodiment of the present invention having the above-described configuration as follows.

4 is a cross-sectional view illustrating a solar cell manufacturing process according to an embodiment of the present invention.

Referring to FIG. 4, first, as shown in FIG. 4A, texturing is formed on a surface of a semiconductor substrate 110. Here, the texturing may form a texturing surface having a plurality of protrusions by etching the entire surface of the semiconductor substrate 110 using a dry etching method such as reaction ion etching (RIE) or the like.

Next, as shown in FIG. 4B, a via hole 120 is formed in the semiconductor substrate 110. The via hole 120 may be formed by a drilling process using a laser.

After the via hole 120 is formed in the semiconductor substrate 110, a surface etching process of removing a portion of the semiconductor substrate 110 damaged by the etching process may be further added. For example, after the via hole 120 is formed in the semiconductor substrate 110 by a laser drilling process, a damaged layer damaged on the surface of the semiconductor substrate 110 by a laser is removed using a base solution such as KOH, NaOH, or TMAH. Can be removed.

In another embodiment, the via hole may be first formed and the texturing process may be performed. In this case, the surface etching process may be omitted.

Next, as shown in FIG. 4C, the emitter layer 111 is formed by doping impurities into the semiconductor substrate 110. When the semiconductor substrate 110 is a p-type silicon substrate, a material containing impurities of pentavalent elements such as phosphorus (P), arsenic (As), antimony (Sb), and the like, for example, POCl3 or H3PO4 may be used at high temperature. The emitter layer 111 may be formed on the semiconductor substrate 110 by performing heat treatment to diffuse impurities of the pentavalent element onto the substrate 110.

As such, since the emitter layer is formed after removing the damaged portion, there is no change in operating characteristics of the emitter layer, so that the operating efficiency of the solar cell can be improved.

After the impurity doping process, a process of removing the PSG (Phospho Silicate Glass), which is a natural oxide film generated by the impurity doping, may be further added.

Next, as shown in FIG. 4D, an antireflection layer 112 is formed on the emitter layer 111. The antireflection layer 112 may be formed of silicon nitride (Si _X N _Y ) or silicon oxide (Si _X O _Y ).

Next, as shown in FIG. 4E, an insulating layer 150 is formed on the emitter layer 111 of the sidewalls of the via hole 120. Here, the insulating layer 150 may be formed of a layer of the same material as the anti-reflection layer 112, for example, silicon nitride (Si _X N _Y ) or silicon oxide (Si _X O _Y ).

Next, as shown in FIG. 4F, the electrode material is filled in the via hole 120 by screen printing to form the first electrode 130, and the second electrode is formed on the rear surface of the semiconductor substrate 110. Form an electrode. Here, the first electrode 130 may be formed of a conductive material containing silver (Ag) material, and the second electrode 140 may be formed of a conductive material containing aluminum (Al).

Next, as shown in FIG. 4G, a back surface field layer 113 is formed between the semiconductor substrate 110 and the second electrode 140 by a heat treatment process.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and similarities. Accordingly, the scope of the present invention should be construed as being limited to the embodiments described, and it is intended that the scope of the present invention encompasses not only the following claims, but also equivalents thereto.

100 solar cell 110 semiconductor substrate
111 emitter layer 112 antireflection layer
113: rear field layer 120: via hole
130: first electrode 140: second electrode
150: insulating layer

Claims (15)

A semiconductor substrate having a via hole penetrating from one light receiving surface to the other opposite surface and doped with impurities of a first conductivity type;
An emitter layer disposed on the semiconductor substrate and doped with impurities of a second conductivity type different from the first conductivity type;
An insulating layer formed on the emitter layer on the sidewalls of the via hole, the insulating layer being formed on the entire sidewall of the via hole such that the emitter layer and the first electrode do not contact inside the via hole;
The first electrode extending from the one surface of the semiconductor substrate to the other surface to fill the via hole; And
And a second electrode disposed on the other surface of the semiconductor substrate and electrically separated from the first electrode.
The solar cell of claim 1, further comprising an antireflection layer formed on the emitter layer.
The solar cell of claim 2, wherein the antireflection layer comprises a plurality of layers having different refractive indices.
The solar cell of claim 2, wherein the insulating layer is made of the same material as the anti-reflection layer.
The method according to any one of claims 2 to 4, wherein the antireflection layer
A solar cell comprising at least one of a silicon nitride (Si _X N _Y ) material or a silicon oxide (Si _X O _Y ) material.
The semiconductor device of claim 1, further comprising a backside field layer formed in the semiconductor substrate to contact the second electrode and doped with a first conductivity type impurity at a higher concentration than the semiconductor substrate. Solar cell.
The method of claim 1, wherein the semiconductor substrate
A solar cell having a texturing surface.
The method of claim 1, wherein the semiconductor substrate
A solar cell, which is a polycrystalline silicon substrate.
(a) forming a via hole in the first conductive semiconductor substrate so as to penetrate from one surface thereof to the other surface thereof;
(b) forming an emitter layer doped with impurities of a second conductivity type different from the first conductivity type on the semiconductor substrate;
(c) forming an insulating layer on the emitter layer on the sidewall of the via hole, and forming an insulating layer on the entire sidewall of the via hole such that the emitter layer and the first electrode do not contact inside the via hole;
(d) forming the first electrode extending from the one surface to the other surface of the semiconductor substrate to fill the via hole; And
(e) forming a second electrode on the other surface of the semiconductor substrate to be electrically separated from the first electrode.
The method of claim 9, further comprising forming a texturing by etching the surface of the semiconductor substrate before or after the step (a).
The method of claim 9 or 10, further comprising forming an anti-reflection layer on the emitter layer after the step (b).
The method of claim 11, wherein the anti-reflection layer is formed of a plurality of layers having different refractive indices.
The method of claim 9, further comprising forming a backside field layer between the semiconductor substrate and the second electrode after the step (e).
The method of claim 9, wherein after step (a), before step (b)
And removing a damaged layer by etching a part of the surface of the semiconductor substrate damaged by the via hole forming process.
10. The method of claim 9, after forming the emitter layer of the process (b)
The method of manufacturing a solar cell further comprising the step of removing the natural oxide film generated by the impurity doping.

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