KR101270172B1 - Oxide thin film transistor and manufacturing method for the same - Google Patents

Abstract

The present invention relates to an oxide thin film transistor and a manufacturing method thereof. An oxide thin film transistor comprising: a gate; A channel continuously formed at a position corresponding to the gate and a capping layer having a work function higher than the channel; A gate insulator formed between the gate and the channel; And a source and a drain formed in contact with both sides of the capping layer, respectively.

Description

[0001] The present invention relates to an oxide thin film transistor and a manufacturing method thereof,

The present invention relates to an oxide thin film transistor, and more particularly, to an oxide thin film transistor having a capping layer formed on a channel region to improve electrical characteristics and a manufacturing method thereof.

Background Art Thin film transistors are currently used in various application fields. In particular, they are used as switching and driving elements in a display field and are used as selection switches of a cross-point type memory device.

Currently, liquid crystal display (LCD) is the main axis for TV panels, and organic light emitting displays are being studied for application to TV. The development of display technology for TVs is developing in a way to meet the demands of the market. The market requires large-sized TV or DID (Digital Information Display), low price, high definition (video expression power, high resolution, brightness, contrast ratio, color reproduction). In order to meet such a demand, a thin film transistor (TFT) to be applied as a switching and driving element of a display having excellent performance is required along with enlargement of a substrate such as glass.

An amorphous silicon thin film transistor (a-Si TFT) is used as a driving and switching element of a display. This is the most widely used device which can be formed uniformly on a large substrate over 2m at a low cost. However, due to the trend toward larger size and higher quality of display, high performance is required for device performance, and it is considered that the conventional a-Si TFT having a mobility of 0.5 cm ² / Vs is at the limit. Therefore, there is a need for high-performance TFTs and manufacturing techniques with higher mobility than a-Si TFTs.

Polycrystalline silicon thin film transistor (poly-Si TFT), which has much higher performance than a-Si TFT, has a high mobility of several tens to several hundreds cm ² / Vs, and thus can be applied to a high- . In addition, the problem of deterioration of the device characteristics is very small as compared with the a-Si TFT. However, in order to fabricate a poly-Si TFT, a complicated process is required compared to an a-Si TFT, and the additional cost is also increased. In particular, the p-Si TFT has a large disadvantage that uniformity is reduced when applied to a large substrate. Therefore, p-Si TFT is suitable for high definition display and products such as OLED, but its cost is inferior to that of conventional a-Si TFT, so its application is limited. In the case of p-Si TFTs, manufacturing processes using large-sized substrates larger than 1 m have not been realized so far due to technical problems such as limitations of manufacturing equipment and unevenness in uniformity. Thus, application to TV products is difficult.

Accordingly, a new TFT technology having both advantages of a-Si TFT and advantages of poly-Si TFT is required. Research on this is actively being made, and oxide thin film transistors are representative.

Recently, there have been Zn oxide thin film transistors such as Ga-In-Zn oxide (GIZO) as an oxide thin film transistor which receives light in the near future. ZnO-based semiconductor devices can be fabricated by a low-temperature process and have amorphous phases, which is advantageous in facilitating large-area fabrication. Further, the ZnO-based semiconductor film is a material having a high mobility and has very good electrical properties such as polycrystalline silicon. Currently, research is being conducted to use a layer of an oxide semiconductor material having a high mobility, that is, a ZnO based material layer in a channel region of a thin film transistor.

It is an object of the present invention to provide an oxide thin film transistor having excellent electrical characteristics including a channel including a capping layer.

It is another object of the present invention to provide a method of fabricating an oxide thin film transistor having a channel including a capping layer.

In order to achieve the above object,

In an oxide thin film transistor,

gate;

A channel continuously formed at a position corresponding to the gate and a capping layer having a work function higher than the channel;

A gate insulator formed between the gate and the channel; And

And a source and a drain formed in contact with both sides of the capping layer, respectively.

In the present invention, the channel may be formed of an In-Zn oxide doped with Ni.

In the present invention, the channel is formed of a material doped with a Group 1, Group 2 or Group 3 transition element in a Ni-In-Zn oxide.

In the present invention, the first group transition element is Cu, Ag or Au, the second group transition element is Pd, Pt or Ds, and the third group transition element is Co, Ir or Mt.

In the present invention, the capping layer is a Ga-In-Zn oxide.

In the present invention, the capping layer is characterized in that a Group 1 or Group 2 element is further doped in the Ga-In-Zn oxide.

In the method of manufacturing an oxide thin film transistor according to the present invention,

Forming a gate on the substrate, and forming a gate insulating layer on the substrate and the gate;

Forming a channel on the gate insulating layer corresponding to the gate and a capping layer having a work function higher than the channel; And

And forming source and drain regions on both sides of the capping layer.

In the present invention, the channel is formed by doping In-Zn oxide with Ni.

In the present invention, the channel is formed by doping a Group 1, Group 2, or Group 3 transition element with Ni-In-Zn oxide.

In the present invention, the capping layer is formed of a Ga-In-Zn oxide.

In the present invention, the capping layer is formed by doping a Group 1 or Group 2 element with a Ga-In-Zn oxide.

In the method of manufacturing an oxide thin film transistor according to the present invention,

Forming a channel in one region on the substrate and a capping layer having a higher work function than the channel;

Forming a source and a drain on both sides of the capping layer and exposing the capping layer; And

Forming a gate insulating layer on the capping layer, the source and the drain, and forming a gate on the gate insulating layer corresponding to the capping layer.

According to the present invention, there are the following effects.

First, an active region of an oxide thin film transistor is formed into a multi-layer structure of a capping layer formed of a material having a channel and a work function higher than that of the channel, and a new structure and a new material are applied to the channel.

Second, it is possible to provide an oxide thin film transistor having excellent On / Off current characteristics and S.S characteristics by using a new material.

Hereinafter, an oxide semiconductor according to an embodiment of the present invention and a method for fabricating the same will be described in detail with reference to the drawings. For reference, it should be noted that the thickness and width of each layer shown in the drawings are exaggerated for clarity.

1A and 1B are views showing an oxide thin film transistor according to an embodiment of the present invention. FIG. 1A shows a structure of a bottom gate type oxide thin film transistor, and FIG. 1B shows a structure of a top gate type oxide thin film transistor.

An oxide thin film transistor according to an embodiment of the present invention includes a gate; A channel continuously formed at a position corresponding to the gate and a capping layer having a work function higher than the channel; A gate insulator formed between the gate and the channel; And a source and a drain formed in contact with both sides of the capping layer, respectively. The bottom gate structure and the top gate structure are described below.

1A, a gate 12 is formed on one region of a substrate 11, and a gate insulating layer 13 is formed on a substrate 11 and a gate 12. As shown in FIG. If the substrate 11 is silicon, it may include an oxide layer on its surface. A channel 14 and a capping layer 15 corresponding to the active region are formed on the gate insulating layer 13 corresponding to the gate 12. A source 16a and a drain 16b are formed on both sides of the capping layer 15 and on the gate insulating layer 13. A passivation layer 15 is formed on the capping layer 15 and the source 16a and the drain 16b, (17) are formed.

Referring to FIG. 1B, a channel 112 and a capping layer 113 corresponding to the active region are formed on one region of the substrate 111. A source 114a and a drain 114b are formed on both sides of the capping layer 113 and a gate insulating layer 115 is formed on the capping layer 113 and the source 114a and the drain 114b. A gate 116 is formed on the gate insulating layer 115 corresponding to the capping layer 113 and a passivation layer 117 is formed on the gate 116 and the gate insulating layer 115.

The oxide thin film transistor according to an embodiment of the present invention is characterized by having at least one capping layer on one side of a channel and a channel as an active region. Here, the capping layer is formed of a material having a higher work function than the channel.

The materials of the respective layers forming the oxide thin film transistor according to the embodiment of the present invention will be described as follows. The substrates 11 and 111 may be formed of a material used as a substrate of a conventional semiconductor device, for example, Si, glass or an organic material. The gates 12 and 116 may use a conductive material, for example, a metal or a metal oxide. The gate insulating layers 13 and 115 may be formed using an insulating material used in a typical semiconductor device, and silicon oxide or nitride may be used. For example, HfO ₂ , Al ₂ O ₃ , Si ₃ N ₄ , or a mixture thereof may be used as the high-K material having a higher dielectric constant than SiO ₂ or SiO ₂ . The sources 16a and 114a and the drains 16b and 114b may be formed using a conductive material such as a metal such as Pt, Ru, Au, Ag, Mo, Al, W, or Cu, or an IZO (InZnO) Or a metal or conductive oxide such as AZO (AlZnO).

The capping layers 15 and 113 of the oxide thin film transistor according to the embodiment of the present invention are formed of materials having a work function higher than that of the channels 14 and 112. Specifically, the materials forming the channels 14 and 112 and the capping layers 15 and 113 are, for example, as follows. The channels 14 and 112 may be made of Ni-doped Ni-doped In-Zn oxide (IZO). The Ni-In-Zn oxide may further be doped with a Group 1, Group 2 or Group 3 transition element. The first group transition element may be Cu, Ag or Au. Pd, Pt, or Ds may be used as the Group 2 transition element. The Group 3 transition element may be Co, Ir or Mt. The capping layers 15 and 113 are formed of a material having a work function larger than that of the channels 14 and 112. The capping layers 15 and 113 are formed of a material such as Cu or Ni such as Ga or In Group-element doped materials may be used.

Hereinafter, a method of manufacturing an oxide thin film transistor according to an embodiment of the present invention will be described in detail with reference to the drawings.

FIGS. 2A to 2H are views illustrating a method of manufacturing an oxide thin film transistor of a bottom gate structure according to an embodiment of the present invention shown in FIG. 1A.

Referring to FIG. 2A, a substrate 11 is provided. The substrate 11 may be made of Si, glass or an organic material. When a Si substrate is used, an insulating layer can be formed on the surface by a thermal oxidation process. A conductive material such as a metal or a conductive metal oxide is applied to form the gate electrode 12 on the substrate 11. Then, as shown in FIG. 2B, the gate 12 is formed by patterning a conductive material.

Referring to FIG. 2C, an insulating material is applied on the substrate 11 and the gate 12 to form the gate insulating layer 13.

Referring to FIG. 2D, a channel material and a capping layer material are applied by a process such as PVD, CVD, or ALD on the gate insulating layer 13 corresponding to the gate 12. Then, as shown in FIG. 2E, a patterning process is performed to form the channel 14 and the capping layer 15.

Referring to FIG. 2F, a metal or a conductive metal oxide or the like is coated on the gate insulating layer 13 and the capping layer 15 to form a conductive material layer 16. 2G, the conductive material layer 16 is etched to form the source 16a and the drain 16b, and the capping layer 15 is exposed.

Finally, referring to FIG. 2h, an insulating material is applied on the capping layer 15 to form the passivation layer 17. [

3A to 3G are views illustrating a method of manufacturing a top gate structure oxide thin film transistor according to an embodiment of the present invention shown in FIG.

Referring to FIG. 3A, a substrate 111 is provided. The substrate 111 may be made of Si, glass or an organic material. Then, the channel material and the capping layer material are coated on the substrate 111 by a process such as PVD, CVD, or ALD. Then, as shown in FIG. 3B, the channel 112 and the capping layer 113 are formed by a patterning process.

Referring to FIG. 3C, a metal or conductive metal oxide is coated on the substrate 111 and the capping layer 113 to form a conductive material layer 114. 3D, the conductive material layer 114 is etched to form the source 114a and the drain 114b, and expose the capping layer 113. Next, as shown in FIG.

Referring to FIG. 3E, an insulating material is coated on the capping layer 113, the source 114a, and the drain 114b to form the gate insulating layer 115). Referring to FIG. 3F, a conductive material such as a metal or a conductive metal oxide is coated on the gate insulating layer 115, and the gate 116 is formed by patterning the conductive material.

Referring to FIG. 3G, an insulating material is applied on the gate insulating layer 115 and the gate 116 to form a passivation layer 117.

After forming the oxide thin film transistor according to an embodiment of the present invention by the above-described method, the oxide thin film transistor is annealed at a temperature of 400 DEG C or less, for example, 300 DEG C by using a furnace, rapid thermal annealing (RTA) Further processing can be carried out.

Hereinafter, electrical characteristics of an oxide thin film transistor according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 4 is a graph showing electrical characteristics of an oxide thin film transistor according to an embodiment of the present invention, and FIG. 5 is a graph showing electrical characteristics of a conventional oxide thin film transistor.

FIG. 4 is a graph showing the relationship between the gate voltage (Vd) and the gate voltage (Vd) in a state where the source-drain voltage Vd is fixed at 0.1, 5.1, and 10.1 V, respectively, to the oxide thin film transistor including the cap layer formed of GIZO doped with NIZO channel layer and Cu as the active region VGS) -Drain Current (IDS) value. Referring to FIG. 4, when the source-drain voltage is 10.1 V, it can be seen that the On current value is about 10 ^-4 A, the Off current value is 10 ^-12 A or less, and the On / Off current ratio is 10 ⁸ or more have. The subthreshold swing (SS) was about 0.83 V / dec.

FIG. 5 is a graph showing the relationship between the gate voltage (VGS) -drain current (IDS) value and the gate-to-source voltage of the oxide thin film transistor in which only the NIZO channel layer is formed as the active region, with the source-drain voltage Vd fixed at 0.1, 5.1, Fig. Referring to FIG. 5, when the source-drain voltage is 10.1 V, the on / off current ratio is about 10 ⁵ and the subthreshold swing (SS) is about 4.90 V / dec.

FIG. 6 is a graph comparing the case where the source-drain voltage Vd of FIG. 4 and FIG. 5 is 0.1 V. FIG. Referring to FIG. 6, on / off current ratio can be greatly improved by forming a capping layer having a work function higher than that of a channel on one side of a channel and a channel in the active region, and the S.S characteristic is also improved.

7 is a graph showing electrical characteristics according to thickness of a capping layer of an oxide thin film transistor according to an embodiment of the present invention. FIG. 7 is a graph showing the electrical characteristics of an oxide thin film transistor including an NIZO channel layer doped with Cu and a capping layer formed of GIZO doped with Cu as an active region by forming a capping layer having a thickness of 350 ANGSTROM and 250 ANGSTROM, respectively . Referring to FIG. 7, it can be seen that as the capping layer becomes thicker, Ioff decreases and the S.S characteristic improves. However, it can be seen that the change of Ion is not large depending on the thickness of the capping layer.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the present invention as defined by the appended claims. It will be possible.

As a result, the scope of the present invention should not be limited by the illustrated embodiments but should be determined by the technical idea described in the claims.

1A is a view illustrating a bottom gate structure of an oxide thin film transistor according to an embodiment of the present invention.

1B is a top gate structure of an oxide thin film transistor according to an embodiment of the present invention.

FIGS. 2A to 2H are views illustrating a method of manufacturing a bottom gate structure of an oxide thin film transistor according to an embodiment of the present invention shown in FIG. 1A.

3A to 3G are views illustrating a method of manufacturing a top gate structure of an oxide thin film transistor according to an embodiment of the present invention shown in FIG.

4 is a graph showing electrical characteristics of an oxide thin film transistor according to an embodiment of the present invention.

5 is a graph showing electrical characteristics of an oxide thin film transistor according to the related art.

6 is a graph comparing electric characteristics of oxide thin film transistors according to the conventional art of the present invention.

7 is a graph showing electrical characteristics according to thickness of a capping layer of an oxide thin film transistor according to an embodiment of the present invention.

Description of the Related Art

11, 111 ... substrate 12, 116 ... gate

13, 115 ... gate insulating layer 14, 112 ... channel

15, 113 ... capping layer 16a, 114a ... source

16b, 114b ... drain 17, 117 ... passivation layer

Claims (16)

In an oxide thin film transistor, gate; A channel continuously formed at a position corresponding to the gate and a capping layer having a work function higher than the channel; A gate insulator formed between the gate and the channel; And And a source and a drain formed in contact with both sides of the capping layer, respectively. The method according to claim 1, Wherein the channel is formed of an In-Zn oxide doped with Ni. The method according to claim 1, Wherein the channel is formed of a material doped with a Group 1, Group 2 or Group 3 transition element in the Ni-In-Zn oxide. The method of claim 3, Wherein the Group 1 transition element is Cu, Ag, or Au, the Group 2 transition element is Pd, Pt, or Ds, and the Group 3 transition element is Co, Ir, or Mt. 3. The method of claim 2, Wherein the capping layer is a Ga-In-Zn oxide. 6. The method of claim 5, Wherein the capping layer is doped with a Group 1 or Group 2 element in the Ga-In-Zn oxide. A method of manufacturing an oxide thin film transistor, Forming a gate on the substrate, and forming a gate insulating layer on the substrate and the gate; Forming a channel on the gate insulating layer corresponding to the gate and a capping layer having a work function higher than the channel; And forming a source and a drain on both sides of the capping layer. 8. The method of claim 7, Wherein the channel is formed by doping In-Zn oxide with Ni. 8. The method of claim 7, Wherein the channel is formed by doping a Group 1, Group 2, or Group 3 transition element in a Ni-In-Zn oxide. 8. The method of claim 7, Wherein the capping layer is formed of a Ga-In-Zn oxide. 11. The method of claim 10, Wherein the capping layer is formed by further doping a Group 1 or Group 2 element with a Ga-In-Zn oxide. A method of manufacturing an oxide thin film transistor, Forming a channel in one region on the substrate and a capping layer having a higher work function than the channel; Forming a source and a drain on both sides of the capping layer and exposing the capping layer; And Forming a gate insulating layer on the capping layer, the source and the drain, and forming a gate on the gate insulating layer corresponding to the capping layer. 13. The method of claim 12, Wherein the channel is formed by doping In-Zn oxide with Ni. 13. The method of claim 12, Wherein the channel is formed by doping a Group 1, Group 2, or Group 3 transition element in a Ni-In-Zn oxide. 13. The method of claim 12, Wherein the capping layer is formed of a Ga-In-Zn oxide. 16. The method of claim 15, Wherein the capping layer is formed by further doping a Group 1 or Group 2 element with a Ga-In-Zn oxide.

Images