KR101163533B1 - Step down conversion system and method for step down conversing thereof - Google Patents

Abstract

The step-down conversion system according to an embodiment of the present invention, a voltage regulator for receiving a first voltage from the outside to generate a second voltage lower than the first voltage, and upper logic driven by the first voltage and the second voltage And a logic circuit having lower logic driven by the first voltage and ground voltage, the logic circuit being capable of adjusting power consumption of the upper logic and the lower logic.

According to the present invention, a step-down conversion method of a step-down conversion system having a logic circuit having an upper logic driven by a high voltage and a driving voltage and a lower logic driven by the driving voltage and a ground voltage, the power consumption of the upper logic and the lower Determining whether the power consumption of the logic is the same, and when the power consumption of the upper logic and the power consumption of the lower logic are not the same, the amount of charge used in the upper logic and the amount of charge used in the lower logic are equal. Varying the ratio of the upper logic or the lower logic.

Step-down, charge recycling, selection, top, bottom

Description

DOWN CONVERSION SYSTEM AND METHOD FOR STEP DOWN CONVERSING THEREOF

A step-down conversion system and a step-down conversion method thereof.

The present invention is derived from a study conducted as part of the IT source technology development of the Ministry of Knowledge Economy and the Ministry of Information and Telecommunications Research and Development.

Microprocessors typically operate at higher voltage levels than, for example, memory. In order for the external power supply to be compatible with both the microprocessor and its memory, the voltage from the external power supply must be converted low.

A typical step down converter uses a regulator to convert from high voltage to low voltage. However, such a step-down converter generates power consumption by the difference between the high voltage and the low voltage.

It is an object of the present invention to provide a step-down converter system and a step-down conversion method thereof in which power consumption can be reduced.

Another object of the present invention is to provide a step-down conversion system and a step-down conversion method thereof which reduce power consumption by recycling electric charges.

The step-down conversion system according to an embodiment of the present invention, a voltage regulator for receiving a first voltage from the outside to generate a second voltage lower than the first voltage, and upper logic driven by the first voltage and the second voltage And a logic circuit having lower logic driven by the first voltage and ground voltage, the logic circuit being capable of adjusting power consumption of the upper logic and the lower logic.

In example embodiments, the logic circuit may include a selection circuit that may select the upper logic and the lower logic.

In example embodiments, the selection circuit may include an upper selection circuit driven by the first voltage and the second voltage, and a lower selection circuit driven by the second voltage and the ground voltage.

In an embodiment, the power consumed by the upper logic and the lower logic will be implemented to be the same.

In an embodiment, when the power consumed in the upper logic is greater than the power consumed in the lower logic, the selection circuit will increase the ratio of the lower logic.

In an embodiment, when the power consumed in the upper logic is less than the power consumed in the lower logic, the selection circuit will increase the ratio of the upper logic.

According to the present invention, a step-down conversion method of a step-down conversion system having a logic circuit having an upper logic driven by a high voltage and a driving voltage and a lower logic driven by the driving voltage and a ground voltage, the power consumption of the upper logic and the lower Determining whether the power consumption of the logic is the same, and when the power consumption of the upper logic and the power consumption of the lower logic are not the same, the amount of charge used in the upper logic and the amount of charge used in the lower logic are equal. Varying the ratio of the upper logic or the lower logic.

As described above, the step-down conversion system according to the present invention is implemented to recycle the charges used in the upper logic in the lower logic, thereby reducing power consumption.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention.

The step-down converter according to the present invention will be implemented so that the charge used in the upper logic can be recycled in the lower logic. Here, the upper logic is a circuit driven by the high voltage 2VDD and the driving voltage VDD, and the lower logic is a circuit driven by the driving voltage VDD and the ground voltage GND. Thus, the step-down converter of the present invention will be able to reduce the power consumption by using charge recycling.

1 is a view showing a step-down conversion system according to an embodiment of the present invention. Referring to FIG. 1, the step-down conversion system 100 will include a logic circuit 140 having a voltage regulator 120, an upper logic 142, and a lower logic 144. The logic circuit 140 of the present invention may adjust the power consumption of the upper logic 142 and the lower logic 144.

Hereinafter, for convenience of description, the high voltage (2VDD) and the driving voltage (VDD) are collectively referred to as upper voltages, and the driving voltage (VDD) and ground voltage (GND) collectively referred to as lower voltages. .

The voltage regulator 120 may distribute the high voltage 2VDD supplied from the outside to the driving voltage VDD to supply the logic circuit 140.

Logic circuit 140 will include variable upper logic 143, variable lower logic 145, and selection circuit 146. Here, the selection circuit 146 will include upper logic and lower logic. The variable upper logic 143 is a circuit driven with an upper voltage, and the variable lower logic 145 is a circuit driven with a lower voltage. Variable upper logic 143 and variable lower logic 145 are not fixed upper logic or fixed lower logic. According to the selection of the selection circuit 146, the circuit that was the upper logic may be the lower logic, and the circuit that was the lower logic may be the upper logic.

The selection circuit 146 is a circuit for selecting a voltage provided to circuits existing in the logic circuit 140 as an upper voltage or a lower voltage. That is, the variable upper logic 143 and the variable lower logic 145 may be determined according to the selection of the selection circuit 146. The selection circuit 146 may be implemented such that the upper logic 142 and the lower logic 144 consume the same power as each other. That is, the selection circuit 146 may adjust the power consumption of the upper logic 142 and the lower logic 144.

If the power consumption is inconsistent between the upper logic 142 and the lower logic 144, the amount of charge required by the two logics 142 and 144 will be different. This will soon lead to power consumption. The step-down conversion system 100 of the present invention is to reduce the power loss caused by the mismatch of the charge amount when converting the high voltage (2VDD) to the driving voltage (VDD).

The selection circuit 146 may be implemented such that the power consumption of the upper logic 142 and the lower logic 144 are always the same to prevent the power loss described above.

That is, the selection circuit 146 freely adjusts the variable upper logic ratio and the variable lower logic ratio in the logic circuit 140 when the power consumed by the upper logic 142 and the lower logic 144 is different, thereby allowing the newly selected higher upper level. Power consumption in logic 142 and lower logic 144 will be kept constant. Thus, the amount of charge used in the upper logic 142 and the amount of charge used in the lower logic 144 will be the same. As a result, power loss will be minimized.

The decoupling capacitor Cdecap may be used to keep the driving voltage VDD constant.

In the step-down conversion system 100 of the present invention, the power consumption and the voltage level VDD of the upper logic 142 and the lower logic 144 will be the same. Thus, the amount of charge used in the upper logic 142 and the lower logic 144 will be implemented to be the same. As a result, by reusing the charge used in the upper logic 142 in the lower logic 144, the power loss of the step-down conversion system 100 will be minimized.

2 is a diagram illustrating a change in a logic region due to a difference in power consumption of a logic circuit. Referring to FIG. 2, the change of the logic region according to the difference in power consumption is as follows.

If the power consumption of the upper logic 142 and the lower logic 144 is the same, the ratio of the upper logic and the lower logic in the selection circuit 146 will be the same.

However, if the power consumption in the upper logic 142 is high, the power consumption of the upper logic 142 and the lower logic 144 will be different. The amount of charge consumed will also vary. Accordingly, the selection circuit 146 may perform a selection operation to increase the ratio of the variable lower logic 145 and decrease the ratio of the variable upper logic 1432. As a result, the power consumption of the upper logic 142 and the lower logic 144 will be the same.

Conversely, if the power consumption in the lower logic 144 is high, the selection circuit 146 will perform a selection operation to increase the ratio of the variable upper logic 143 and decrease the ratio of the variable lower logic 145. . As a result, the power consumption of the upper logic 142 and lower logic 9144 will be the same.

In this case, the ratio of the variable upper logic 143 in the selection circuit 146 may be up to X _Leftmost, and the ratio of the variable lower logic 145 may be implemented up to X _Rightmost .

3 is a diagram illustrating a selection circuit according to an exemplary embodiment of the present invention. Referring to FIG. 3, the selection circuit 146 may include a capacitor C _decap and first and second comparators 147 and 148.

The capacitor C _decap may be connected between the driving voltage VDD and the ground voltage GND. Capacitor C will charge a charge that varies with the power consumption of variable upper logic 143 and variable lower logic 145.

The first comparator 147 may generate a first selection signal Low_Shift by comparing the voltage difference between the upper margin voltage V _H and the driving voltage VDD. The first selection signal Low_Shift is a signal for increasing the ratio of the variable lower logic 145 in the selection circuit 146.

The second comparator 148 may generate a second selection signal High_Shift by comparing the voltage difference between the lower margin voltage V _L and the driving voltage VDD. The second selection signal Low_Shift is a signal for increasing the ratio of the variable upper logic 143 in the selection circuit 146.

FIG. 4 is a diagram illustrating a method of generating first and second selection signals in the selection circuit of FIG. 3.

FIG. 5 is a diagram illustrating a ratio change of upper logic and lower logic according to the first and second selection signals generated in FIG. 4.

1 to 5, the first and second selection signals Low_Shift and High_Shift will be generated as follows.

The logic circuit 140 may be divided into upper logic 142 and lower logic 144 that consume the same power. In this case, the selection circuit 146 may also be divided such that the ratio of the upper logic 142 and the lower logic 144 is the same.

If the power consumption in the upper logic 142 and the lower logic 144 continues to be constant, the drive voltage VDD required in the logic circuit 140 will always be constant.

However, if the power consumption in the upper logic 142 and lower logic 144 is different, the voltage level required for each circuit will be different. At this time, the driving voltage VDD will be shaken, and the voltage level will be increased or decreased. In this case, the selection circuit 146 may determine the variable upper logic ratio and the variable lower logic ratio according to the first and second selection signals Low_Shift and High_Shift generated from the power consumption difference detection circuit 161.

The reference voltage is defined as the driving voltage VDD, and the upper margin is referred to as the upper margin voltage V _H and the lower margin as the lower margin voltage V _L from the reference voltage.

The reference voltage becomes higher than the upper margin V _H when the amount of charge used by the upper logic 142 is greater than the amount of charge used by the lower logic 144. At this time, the selection circuit 146 increases the ratio of the variable lower logic 145 to make the charge amount of the upper logic 142 and the lower logic 144 the same. That is, the first comparator 147 compares the reference voltage with the upper margin voltage V _H to generate the first selection signal Low_Shift. Accordingly, the selection circuit 146 may increase the ratio of the variable lower logic 145 in response to the first selection signal Low_Shift signal.

On the other hand, when the reference voltage is lower than the lower margin V _H , the amount of charge used by the upper logic 142 is lower than the amount of charge used by the lower logic 144. At this time, the selection circuit 146 increases the ratio of the variable upper logic 143 to make the charge amount of the upper logic 142 and the lower logic 144 the same. That is, the second comparator 148 may generate a second selection signal High_Shift by comparing the reference voltage with the lower margin voltage V _L. Accordingly, the selection circuit 146 may increase the ratio of the variable upper logic 143 in response to the second selection signal High_Shift signal.

By repeating the above process, the selection circuit 146 will make the power consumption of the upper logic 142 and the lower logic 144 equal.

6 is a flowchart illustrating an embodiment of a step-down conversion method according to the present invention. 1 to 6, the step-down conversion method is as follows.

The logic circuit 140 may be divided into an upper logic 142 and a lower logic 144 so that power consumption is the same. Here, the upper logic 142 may include upper logic of the selection circuit 146, and the lower logic 142 may include lower logic of the selection circuit 146.

At this time, the power consumption P _High of the upper logic 142 and the power consumption P _Low of the lower logic 144 will be the same (S11). At this time, since the voltage levels are the same as the driving voltage levels, the amounts of charges Q _High and Q _Low will also be the same (S12).

However, when the circuit operates in the upper logic 142 and the lower logic 144, respectively, the power consumption of the upper logic 142 and the lower logic 144 will be different and the amount of charge used will be different. At this time, the charge of each logic will be inconsistent (S13).

It is determined whether the charge amounts of the upper logic 142 and the lower logic 144 are the same (S14). If the charge amount of the upper logic 142 and the lower logic 144 is the same, the selection circuit 146 will not change (S15).

On the other hand, if the charge amount of the upper logic 142 and the lower logic 144 is not the same, the power consumption detection circuit 161 determines whether the charge amount Q _High of the upper logic is greater than the charge amount Q _Low of the lower logic. It will be (S16).

If the amount of charge Q _High of the upper logic 142 is greater than the amount of charge Q _Low of the lower logic 144, the selection circuit 146 may generate a first selection signal generated from the power consumption sensing circuit 161. Low_Shift) will further increase the lower logic ratio (S21). Accordingly, the charge amount Q _Low of the lower logic will be increased (S22). This operation will proceed until the charge amount Q _High of the upper logic 142 and the charge amount Q _Low of the lower logic 144 are the same (S23).

On the other hand, if the charge amount Q _High of the upper logic 142 is not greater than the charge amount QLow of the lower logic 144, the selection circuit 146 may generate the second selection signal High_Shift generated from the power consumption detection circuit 161. ), The higher logic ratio is further increased (S31). Accordingly, the charge amount Q _High of the lower logic will be increased (S32). This operation will proceed until the charge amount Q _High of the upper logic 142 and the charge amount Q _Low of the lower logic 144 are the same (S33).

Through the above-described process, the charge amount Q _High of the upper logic 142 and the charge amount Q _Low of the lower logic 144 become equal to each other, and as a result, the power consumption P _High of the upper logic 142. Power consumption P _Low of the and lower logic 144 will also be the same (S40).

When voltage conversion is performed from a high voltage to a low voltage, power loss will occur by the difference between the high voltage and the low voltage. This power loss causes a decrease in efficiency. The step-down converter of the present invention may be implemented to divide the logic circuit into a plurality of circuits in which the same power consumption occurs, and to reuse the charge used in one circuit in another circuit.

The step-down conversion system of the present invention will be able to reduce power loss by always matching the amount of charge consumed by different logic during voltage conversion using charge recycling. Therefore, the step-down converter of the present invention can be easily applied to portable electric parts and the like, which use less power loss.

While the invention has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that various changes and modifications may be made therein without departing from the spirit and scope of the invention. Therefore, the scope of the present invention should not be limited to the above-described embodiments, but should be determined by the equivalents of the claims of the present invention as well as the following claims.

1 is a block diagram showing a step-down conversion system according to an embodiment of the present invention.

2 is a diagram illustrating a change in a logic region due to a difference in power consumption of a logic circuit.

3 is a diagram illustrating a selection circuit according to an exemplary embodiment of the present invention.

4 is a diagram illustrating a process of generating a selection signal in the selection circuit shown in FIG. 3.

FIG. 5 is a diagram illustrating a method of selecting upper logic and lower logic of the selection circuit of FIG. 3.

6 is a flowchart illustrating an embodiment of a step-down conversion method of the present invention.

* Description of the symbols for the main parts of the drawings *

100: step-down conversion system 120: voltage regulator

140: logic circuit

142: high logic 144: low logic

143: variable high logic 145: variable low logic

146: selection circuit 147, 148: comparator

Cdecap: Capacitor

Claims (7)

delete delete delete delete A voltage regulator configured to receive a first voltage from an external source and generate a second voltage lower than the first voltage; And Upper logic driven by the first voltage and the second voltage, lower logic driven by the first voltage and the ground voltage, and the upper logic and the lower logic to adjust power consumption of the upper logic and the lower logic. It includes a logic circuit having a selection circuit that can select, The selection circuit, An upper select circuit driven by the first voltage and the second voltage; And A lower selection circuit driven with the second voltage and the ground voltage; The power consumed by the upper logic and the lower logic is implemented to be the same, When the power consumed in the upper logic is greater than the power consumed in the lower logic, the selection circuit increases the ratio of the lower logic. 6. The method of claim 5, When the power consumed in the upper logic is less than the power consumed in the lower logic, the selection circuit increases the ratio of the upper logic. In the step-down conversion method of a step-down conversion system having a logic circuit having a higher logic driven by a high voltage and a drive voltage and a lower logic driven by the drive voltage and the ground voltage: Determining whether power consumption of the upper logic and power consumption of the lower logic are the same; And When the power consumption of the upper logic and the power consumption of the lower logic are not the same, the ratio of the upper logic or the lower logic is varied so that the amount of charge used in the upper logic and the amount of charge used in the lower logic are equal. Step-down conversion method comprising the step.

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