KR101152482B1 - Methods of encoding and decoding using fast ldpca code and apparatuses using the same - Google Patents

Abstract

Disclosed are a decoding method using a fast code rate-adaptive low density parity code, and an encoding / decoding device using the method. A fast decoding method using a Low Density Parity Check Accumulate (LDPCA) code calculates a first prediction coefficient for predicting a bitplane based on auxiliary information and a Laplacian coefficient, and recovers a bitplane based on the first prediction coefficient. Calculating a second prediction coefficient indicating the amount of information, and calculating the number of first parity bit transmissions based on the second prediction coefficient. Therefore, it is possible to bring improvement in decoding processing time while preventing degradation of RD performance.

Description

TECHNICAL FIELD OF DECODING AND DECODING USING FAST LDPCA CODE AND APPARATUSES USING THE SAME

The present invention relates to a decoding method using a fast code rate-adaptive low density parity code, and to a decoding / decoding device using the same, and a method for encoding / decoding an LDPCA code and an apparatus using the method.

Coders used in traditional video coding methods such as H.264 require a lot of computational and complex processing such as motion prediction and motion compensation, so that the complexity of the encoder is relatively higher than that of the decoder. The high complexity coding structure of the encoder is suitable for broadcasting environments that require a large amount of computation in the encoder. Unlike traditional brocasting environments, new types of video applications are now appearing in distributed broadcasting-communication convergence environments, such as wireless video cameras and sensor network surveillance systems in mobile phones. In general, the encoders used in these applications are limited in computational complexity, and therefore low complexity encoders are required. Thus, traditional video coding methods are not suitable for emerging applications.

Distributed Video Coding (DVC) is a representative technique for solving the requirements of such applications. DVC is theoretically based on the Slepian-Wolf theory and the Wyner-Ziv theory published in the 1970s. The Slepian-Wolf theory mathematically proved that even if the prediction information Y is given only to the decoder, the minimum information for losslessly restoring the original information X is H (X | Y).

For the Wiener-Jib theory with lossy compression, it has been demonstrated that it can have the same rate-distortion (RD) performance compared to predictive encoding techniques. Therefore, even if a source is encoded independently without motion prediction and motion compensation to have a low encoder complexity, the same RD performance can be obtained compared to conventional video coding if it is decoded using the source association.

The Wiener-Jib video coding structure proposed at Stanford University is a representative structure of DVC. The WZ encoder divides the input image into two groups (key frames, WZ frames). Key frames are encoded using existing H.26X intra coding and WZ frames are encoded using existing channel codes such as turbo codes and LDPC codes. In the decoding process, the WZ decoder recovers two keyframes from the two encoded keyframes transmitted and generates side information (SI) from the two keyframes recovered using Motion Compensated Temporal Interpolation (MCTI). do. The auxiliary information is regarded as a reconstructed WZ frame including virtual channel noise. Virtual channel noise refers to the difference between auxiliary information and the original WZ frame. The WZ decoder uses a channel noise model to predict noise and remove noise from the channel decoding process.

Among the existing channel codes, the turbo code and LDPC code have strong error correction performance near the Shannon limit. This channel code is based on a decoding process that uses statistically iterative computations. Since the iterative decoding process is time consuming, the complexity of the WZ decoder using LDPC code and turbo code is relatively increased. Currently, Low Density Parity Check Accumulate (LDPCA) channel codes are used in place of LDPC codes for LDPC code rate adaptation. The computational complexity for decoding the LDPCA code accounts for 70% of the complexity of the entire WZ decoder. Therefore, there is a need for an algorithm that can reduce the complexity of the decoder without affecting RD (Rate Distortion) performance.

Accordingly, a first object of the present invention is to provide a fast decoding method using an LDPCA code for lowering the computational complexity of a decoder to improve an image decoding speed.

In addition, a second object of the present invention is to provide a decoding apparatus for performing a fast decoding method using an LDPCA code for improving the decoding speed by reducing the computational complexity of the decoder.

A fast decoding method using a Low Density Parity Check Accumulate (LDPCA) code according to an aspect of the present invention for achieving the first object of the present invention includes a first prediction that predicts a bitplane based on auxiliary information and a Laplacian coefficient. Calculating a coefficient, calculating a second prediction coefficient representing an amount of information required to restore the bitplane based on the first prediction coefficient, and calculating a number of first parity bit transmissions based on the second prediction coefficient. It may include. In the fast decoding method using the LDPCA code, after calculating a first transmission parity bit based on the number of first parity bit transmissions, the encoder requests the first transmission parity bit to the encoder and sends the first transmission parity bit to the encoder. The method may further include correcting an error present in the bitplane on the basis. The fast decoding method using the LDPCA code may further include requesting an additional parity bit to an encoder if an error existing in the bitplane is not corrected using the transmitted first transmission parity bit. . In the fast decoding method using the LDPCA code, when a bit included in the bit plane is a first bit, a second parity transmission count is calculated based on the first parity bit transmission count and is based on the second parity bit transmission count. The method may further include requesting a second parity bit from the encoder. The second parity bit transmission frequency is expressed by Equation 1 below.

(Equation 1)

은 제1 패리티 전송 횟수임)에 기초하여 산출될 수 있다. 상기 LDPCA 코드를 이용한 고속 복호화 방법은 상기 비트 플레인에 포함된 비트가 제2 비트이고 산출된 이전 패리티 비트 전송 횟수가 상기 제1 패리티 전송 횟수보다 클 경우, 상기 이전 패리티 비트 전송 횟수에 기초하여 제3 패리티 비트 전송 횟수를 산출하고 상기 제3 패리티 비트 전송 횟수에 기초한 제3 패리티 비트를 부호화부에 요청하는 단계를 더 포함할 수 있다. 상기 제3 패리티 비트 전송 횟수는 아래의 식 2(here,

Is the number of first parity transmissions). In the fast decoding method using the LDPCA code, when a bit included in the bit plane is a second bit and the calculated previous parity bit transmission count is greater than the first parity transmission count, a third parity bit transmission is performed based on the previous parity bit transmission count. The method may further include calculating a number of parity bit transmissions and requesting the encoder for a third parity bit based on the number of transmissions of the third parity bits. The third parity bit transmission frequency is expressed by Equation 2 below.

(Equation 2)

(여기서,

는 이전 패리티 비트 전송 횟수임)

(here,

Is the number of previous parity bit transfers)

It can be calculated based on. In the fast decoding method using the LDPCA code, when the bit included in the bit plane is the second bit and the calculated previous parity bit transmission count is less than or equal to the first parity transmission count, the previous parity bit transmission count and the The method may further include calculating a fourth parity bit transmission number based on the first parity bit transmission number and requesting the encoder for a fourth parity bit based on the fourth parity bit transmission number. The fourth parity bit transmission number is

Equation 3 below

(Equation 3)

은 제1 패리티 전송 횟수,

는 이전 패리티 비트 전송 횟수임)에 기초하여 산출될 수 있다. 상기 제1 예측 계수는, 아래의 식 4(here,

Is the number of first parity transmissions,

May be calculated based on the number of previous parity bit transmissions. The first prediction coefficient is expressed by the following Equation 4

(Equation 4)

는 소정의 보조정보가

일 경우, 비트플레인의 비트값이 0으로 결정될 확률,

는 보조정보가

일 경우, 비트플레인의 비트값이 1로 결정될 확률을 의미함)에 의해 산출될 수 있다. 상기 제2 예측 계수는 아래의 식 5(here,

Has some auxiliary information

, The probability that the bit value of the bitplane is determined to be 0,

Has ancillary information

In this case, it means the probability that the bit value of the bit plane is determined to be 1). The second prediction coefficient is expressed by Equation 5 below.

(Eq. 5)

는 상기 제1 예측 계수를 기초로 산출한 값으로써,

를 의미함)(here,

Is a value calculated based on the first prediction coefficient,

Means)

Can be calculated by The first parity bit transmission number is expressed by Equation 6 below.

(Equation 6)

는 제2 예측 계수를 의미함)(here,

Means the second prediction coefficient)

Can be calculated by

In addition, the fast decoding apparatus using the LDPCA code according to an aspect of the present invention for achieving the second object of the present invention calculates the first number of parity bit transmission when there is an error in the bitplane and the first encoding from the encoder A channel code decoding unit for restoring the bit plane by requesting a first transmission parity bit based on the number of parity bit transmissions, and an image restoring unit for restoring an image by performing inverse quantization on the basis of the bit plane transmitted from the channel code decoding unit. It may include. The channel code decoder may include a parity bit predictor that calculates the number of first parity bit transmissions and predicts a first transmission parity bit necessary for decoding the bitplane based on the number of first parity bit transmissions. The channel code decoder receives the first transmission parity bit from the encoder and determines whether the bit plane is errored by a hard decision aided (HDA) method. You can request a bit. The parity bit predictor may include a first prediction coefficient calculator configured to calculate a first prediction coefficient for predicting a bit value of the bitplane based on the auxiliary information and the Laplacian coefficient, and the bit value of the bitplane based on the calculated first prediction coefficient. And a first parity bit transmission count calculating unit for calculating a first parity bit transmission count required for restoring the bitplane based on the second prediction coefficient calculating unit indicating the amount of information required to restore the PPC. have. The parity bit predictor may further include a second parity bit transmission count calculator configured to calculate a second parity bit transmission count required to restore the bitplane based on a previous parity bit transmission count. When the bit included in the bit plane is a first bit, the second parity bit transmission number calculating unit calculates a second parity bit transmission number based on the first parity bit transmission number calculated by the first parity bit transmission number calculating unit. Can be calculated. The second parity bit transmission count calculating unit, based on the previous parity bit transmission count, when the bit included in the bit plane is the second bit and the calculated previous parity bit transmission count is greater than the first parity transmission count, The number of parity bit transmissions can be calculated. The second parity bit transmission count calculating unit, when the bit included in the bit plane is a second bit and the calculated previous parity bit transmission count is less than or equal to the first parity transmission count, the previous parity bit transmission count and the first parity bit transmission count calculation unit are used. The fourth parity bit transmission count may be calculated based on the number of one parity bit transmission.

As described above, according to the decoding method using the fast code rate-adaptive low density parity code and the encoding / decoding apparatus using the method, the parity predicted by predicting the amount of parity bits required by the decoder is described. By using the method of transmitting the amount of bits, it is possible to reduce the complexity of the decoder by reducing the iteration process for decoding the LDPCA code, thereby increasing the image decoding speed.

1 is a conceptual diagram illustrating a bitplane generated to be input to an LDPC encoder.
2 is a conceptual diagram illustrating a method for reducing the number of repetitions in determining whether an LDPCA code is error according to an embodiment of the present invention.
3 is a flowchart illustrating a fast LDPCA code decoding method according to an embodiment of the present invention.
4 is a graph comparing parity bit transmission times expected and actual parity bit transmission times based on a result of performing a fast LDPCA code decoding method according to an embodiment of the present invention.
5 is a flowchart illustrating a fast LDPCA code decoding method according to another embodiment of the present invention.
FIG. 6 is a graph showing that a required number of parity transmissions, that is, a parity amount, differs depending on a position of a bit value included in a bit plane in a fast LDPCA code decoding method according to another embodiment of the present invention.
7 shows the number of parity bit transmissions required and the actual number of parity bit transmissions required when predicting MSB or MSB-1.
8 is a graph illustrating a prediction of the minimum number of parity bit transmissions of a second bit based on a previous bit frame according to another embodiment of the present invention.
9 and 10 are graphs for predicting the minimum number of parity bit transmissions of a second bit based on a previous bit frame according to another embodiment of the present invention.
11 is a conceptual diagram illustrating a distributed video encoding and decoding apparatus according to another embodiment of the present invention.
12 is a conceptual diagram illustrating a parity bit predictor according to another embodiment of the present invention.
13 is a conceptual diagram illustrating a parity bit predictor according to another embodiment of the present invention.

As the invention allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the written description. It should be understood, however, that the invention is not intended to be limited to the particular embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. Like reference numerals are used for like elements in describing each drawing.

The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component. And / or < / RTI > includes any combination of a plurality of related listed items or any of a plurality of related listed items.

It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when a component is referred to as being "directly connected" or "directly connected" to another component, it should be understood that there is no other component in between.

The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprise" or "have" are intended to indicate that there is a feature, number, step, operation, component, part, or combination thereof described in the specification, and one or more other features. It is to be understood that the present invention does not exclude the possibility of the presence or the addition of numbers, steps, operations, components, components, or a combination thereof.

Hereinafter, with reference to the accompanying drawings, it will be described in detail a preferred embodiment of the present invention. Hereinafter, the same reference numerals are used for the same components in the drawings, and duplicate descriptions of the same components are omitted.

1 is a conceptual diagram illustrating a bitplane generated to be input to an LDPC encoder.

사이즈 블록(100)에 각각 포함된 DCT 도메인의

블록(110)에 포함된 DC 성분(120)이 비트플레인으로 생성되는 것을 나타낸다. Referring to Figure 1, included in the WZ frame

Of the DCT domain included in the size block 100, respectively.

DC component 120 included in block 110 is generated as a bitplane.

사이즈 블록(100)이

블록(110)으로 나뉘고 각 블록은 DCT(Discrete Cosine Transform)에 의해 주파수 도메인으로 전환될 수 있다. 같은 주파수 영역에 위치한 블록의 DCT 계수는 양자화 매트릭스에 의해 그룹화되고 양자화된다.Included in the WZ (Wyner-Ziv) frame

Size block 100

Divided into blocks 110, each block may be transformed into a frequency domain by a discrete cosine transform (DCT). DCT coefficients of blocks located in the same frequency domain are grouped and quantized by a quantization matrix.

의 해상도를 가지고 있으므로 하나의 WZ 프레임에서는 1584 개의

블록이 생성될 수 있다.QCIF (Quater Common Intermediate Format) size video

Has a resolution of 1584 in one WZ frame

Blocks can be generated.

The quantization level of the DCT coefficients included in the block may vary according to the quantization matrix (QM) level. For example, the quantization matrix may have eight levels, ranging from 1 to 8 levels. When the quantization level is 8 levels, the quantization matrix may be restored to a high quality image because quantization is performed at a small interval. If the quantization level is 8, as in the quantization frame 110 shown in FIG. 1, the DCT coefficients of the DC region are quantized to 7 bits, and the DCT coefficients of the AC region are larger bits as the DCT coefficients included in the AC region closer to the DC region. Can be quantized.

블록(110)에 포함된 DC 주파수 성분의 DCT 계수들은 도 1의 하단과 같이 나열될 수 있다. 아래에서 블록의 나열 순서에 붙인 서수는 설명의 편의상 붙인 것으로 WZ 프레임에 포함되는 블록을 일정한 순서대로 나열하였다고 가정한다.1584 images included in QCIF (Quater Common Intermediate Format)

The DCT coefficients of the DC frequency components included in block 110 may be listed as shown in the bottom of FIG. 1. The ordinal numbers added to the order of arranging blocks below are for convenience of explanation, and it is assumed that the blocks included in the WZ frame are listed in a certain order.

DCT coefficient value 7 bits of DC frequency component of the first block from the left, DCT coefficient value 7 bits of the DC frequency component of the second block, DCT coefficient value 7 bits of the third block, and finally DCT of the DC frequency component of the 1584th block. 7 bits of count value may be listed. The 7-bit DC frequency component of each block can have MSB (Most Significant Bit), MSB-1, MSB-2 ... Least Significant Bit (LSB), and bits in the same location are generated in one bit plane. Can be.

A total of 1584 parity bits may be included through LDPCA coding in one bitplane in a QCIF size sequence. Parity bits are stored in the encoder's buffer and adaptively transmitted at the request of the decoder.

가 산출될 수 있다.The decoder may reconstruct the keyframes intra-coded by the H.264 / AVC standard, and side information (SI) based on the reconstructed keyframes may be generated using Motion Compensated Temporal Interpolation (MCTI). . Side information (SI) may be assumed to be a form in which channel noise is added to a WZ frame. The channel noise may have a Laplacian Distribution, and the Laplacian coefficient value depends on the channel noise.

Can be calculated.

도 다양한 방법으로 산출될 수 있고 이러한 다양한 방법들은 본 발명의 본질에서 벋어나지 않는 한 본 발명의 권리범위에 속한다.According to the fast LDPCA code decoding method according to an embodiment of the present invention, various methods exist for generating auxiliary information and calculating channel noise. That is, the auxiliary information may vary depending on the calculation method, and a Laplacian coefficient value for obtaining channel noise.

It can also be calculated in various ways and these various methods fall within the scope of the present invention unless they depart from the spirit of the invention.

The LDPCA decoder can calculate the Intrinsic Log Likelihood Ratio (LLR) using the calculated auxiliary information and the Laplacian coefficient. Intrinsic LLRs can be expressed in logscale as the Logscale probability ratio of whether the recovered bit is going to be zero or one. Intrinsic LLR may be expressed as Equation 1 below.

는 보조정보

가 주어진 경우, 복호화기에서 복원된 비트(

)가 0이 될 조건부 확률값을 의미하고

는 보조정보

가 주어진 경우, 복호화기에서 복원된 비트(

)가 1이 될 조건부 확률값을 의미한다. LDPCA 복호화기는 LLR Intrinsic과 전송된 패리티 비트를 사용하여 디코딩 프로세스를 수행할 수 있다. In Equation 1

Information

If is given, the bit recovered from the decoder (

) Means a conditional probability value of 0

Information

If is given, the bit recovered from the decoder (

) Means a conditional probability value of 1. The LDPCA decoder can perform the decoding process using the LLR Intrinsic and the transmitted parity bits.

와

는 보조정보와 라플라시안 계수

값에 기초하여 산출될 수 있다. LLR Intrinsic 값이 양수일 경우, 복원될 비트플레인의 비트값을 0으로 결정하고, LLR Intrinsic 값이 음수일 경우, 비트플레인의 비트값을 1로 결정할 수 있다.

Wow

Is ancillary information and Laplacian coefficient

It can be calculated based on the value. If the LLR Intrinsic value is positive, the bit value of the bitplane to be restored may be determined as 0. If the LLR Intrinsic value is negative, the bit value of the bitplane may be determined to be 1.

The bitplane reconstructed based on the LLR Intrinsic value in the decoder may determine whether an error exists in the bitplane based on the cyclic redundancy check (CRC) bit transmitted from the encoder.

If there is no error in the bitplane generated at the decoder, the decoder can terminate the decoding process without requiring the encoder additional parity bits for error correction. However, if there is an error in the bitplane generated by the decoder, the decoder requires additional parity bits in the encoder to correct the error. The decoder may calculate whether an error is based on the CRC bit value transmitted from the encoder.

In a QCIF sized frame, 1584 parity bits can be included in one bitplane, and the generated parity bits are stored in the encoder's buffer and transmitted by 24 bits in one request according to the decoder's request. Bitplane errors can be detected and corrected.

If there is one parity transmission, 50 iterations can be performed to recover the faulty bitplane. In the worst case, 66 parity bit transmissions must be performed to recover the bitplane based on parity bits transmitted by 24 bits. If 50 repeat calculations are performed each time, a total of 3300 repeat calculations must be performed.

2 is a conceptual diagram illustrating a method for reducing the number of repetitions in determining whether an LDPCA code is error according to an embodiment of the present invention.

Referring to FIG. 2, the decoding of the LDPCA code is performed to determine whether the decoding is successful before using the Hard Decision Aided (HDA) to complete the number of iteration calculations and to request an additional parity bit to the encoder in advance.

The variable node 200 may be composed of 1584 values, and the value of the variable node may be a modified LLR value whose LLR Intrinsic value or LLR Intrinsic value is changed by the parity bit value provided by the encoder.

Based on the LLR value, a new variable node may be generated in the bitplane by a hard decision method, and an estimated BER value may be calculated. If the estimated BER value is smaller than the target BER value, the LDPC iterative decoding process is terminated, and decoding can be completed successfully. When the estimated BER value is larger than the target BER value and when the generated bitplane value 210 is repeated with the same value, as shown in FIG. 2, the early termination variable 230 determines how many times the same value is repeated. Increase When the early termination variable 230 is larger than the predetermined repeat termination variable 240, it may be determined that decoding is impossible, and after the repetition is terminated, an additional parity bit may be requested to the encoder. That is, the decoding step can be quickly performed by determining whether the decoding succeeds without performing additional iteration calculation and immediately requesting a parity bit from the encoder.

However, even when using the HDA method, since the encoder transmits an additional parity bit 24 bits at a time to the decoder, a large number of iterations must be performed and the complexity of the decoder increases.

According to the fast LDPCA code decoding method according to an embodiment of the present invention, by using the LLR-Intrinsic disclosed in Equation 1, the encoder predicts the number of times of required parity bits in the decoder so that the encoder has a parity bit of a size corresponding to the predicted number of times. In the following description, a method of transmitting to a decoder at once is disclosed.

3 is a flowchart illustrating a fast LDPCA code decoding method according to an embodiment of the present invention.

Referring to FIG. 3, an LLR intrinsic value is calculated (step S300).

Hereinafter, in the decoding method using a fast code rate-adaptive low density parity code according to an embodiment of the present invention, the LLR Intrinsic value and the first prediction coefficient value may be used as the same meaning.

을 기초로 산출될 수 있다. 아래의 수학식 2는 LLR Intrinsic 값을 산출하는 식을 나타낸 것이다. The LLR Intrinsic value is the auxiliary information generated by the decoder and the Laplacian coefficient value.

It can be calculated based on. Equation 2 below shows the equation for calculating the LLR Intrinsic value.

값(하나의 비트플레인에 포함된 비트(QCIF 영상인 경우 1584개의 비트)를 가리키는 인덱스값.)에 따라 LLR Intrinsic 값을 산출하는 것을 나타낸 것이다. The top of Equation 2

It shows that the LLR Intrinsic value is calculated according to a value (index value indicating a bit included in one bit plane (1584 bits in the case of a QCIF image)).

는 소정의 보조 정보가

일 경우, 생성된 비트플레인이 0으로 결정될 확률값으로 크로스오버 확률값(

)이라는 용어로 정의할 수 있다. 수학식 2의 하단에 나타난 것과 같이 크로스오버 확률값(

)은 LLR Intrinsic값을 기초로 산출될 수 있다. The LLR Intrinsic represents the Logscale probability ratio, expressed in logscale, as to whether the bits contained in the recovered bitplane will be zero or one. In Equation 2,

Has some auxiliary information

In this case, the probability value of the generated bitplane is determined to be zero, and the crossover probability value (

Can be defined as As shown at the bottom of Equation 2, the crossover probability value (

) Can be calculated based on the LLR Intrinsic value.

)을 기초로 엔트로피값(

)을 산출하는 식을 나타낸 것이다. Equation 3 below is a crossover probability value (

Based on the entropy value (

The formula for calculating) is shown.

An entropy is calculated based on the calculated LLR intrinsic value (step S310).

)는

값을 인덱스로 가지는 가지는 소정의 비트플레인에 포함된 비트를 성공적으로 디코딩하기 위해 필요한 정보량을 나타낸다. Entropy (

)

It indicates the amount of information necessary to successfully decode bits included in a given bitplane having a value as an index.

)과 제2 예측 계수 값은 동일한 의미로 사용될 수 있다. Hereinafter, in a decoding method using a fast code rate-adaptive low density parity code according to an embodiment of the present invention, entropy (

) And the second prediction coefficient may have the same meaning.

The number of parity bit transmissions is calculated based on the calculated entropy (step S320).

)를 알 경우, 아래의 수학식 4를 통해 제1 패리티 비트 전송 횟수(

)를 산출할 수 있다. Entropy (

), The number of times of first parity bit transmission (

) Can be calculated.

It is also possible to calculate the number of times other than the minimum parity bit transmission if necessary, but for convenience of description, it is assumed that the first number of parity bit transmissions required for decoding calculates the minimum number of parity bit transmissions.

Equations 2 to 4 described above for calculating the LLR-Intrinsic value (first prediction coefficient), entropy (second prediction coefficient), and the first parity bit transmission frequency are fast LDPCA encoding according to an embodiment of the present invention. It is also possible to calculate the minimum number of parity bit transmissions by another mathematical solution as long as it does not depart from the essence of the present invention as one exemplary formula for calculating the above values for convenience of description in the method.

The first prediction coefficient and the second prediction coefficient for calculating the number of first parity bit transmissions may be calculated and used in various ways.

The parity bit is transmitted based on the calculated number of first parity bit transmissions, and the bitplane is restored based on the transmitted parity bit (step S330).

The minimum parity bit may be transmitted based on the calculated number of first parity bit transmissions calculated by Equation 4. When reconstruction is performed based on the minimum parity bits, the bitplane can be reconstructed without requiring additional parity bits to the encoder. However, if the restoration is not performed based on the minimum parity bits, the decoder may restore the bitplane using a method of requesting the encoder for an additional parity bit of 24 bits.

The Hard Decision Aided (HDA) method disclosed in FIG. 2 may be used to recover the bitplane. When using the Hard Decision Aided (HDA) method, it is possible to recover the bitplane faster because the decoder knows whether or not the decoding has failed before completing the iteration for bitplane recovery.

4 is a graph comparing the expected number of first parity bit transmissions with the actual number of parity bit transmissions based on the result of performing the fast LDPCA code decoding method according to an embodiment of the present invention.

축은 수학식 4를 기초로 예상한 제1 패리티 비트 전송 횟수를 나타내고

축은 실제의 복호화에 필요한 패리티 비트 전송횟수를 나타낸 것이다. 가장 이상적인 경우는 예상한 제1 패리티 비트 전송 횟수와 실제의 패리티 비트 전송횟수가 동일한 경우로 그래프에 접근되는 것이다.4, the graph of

The axis represents the expected number of first parity bit transmissions based on Equation 4.

The axis shows the number of parity bit transfers required for actual decoding. The ideal case is to approach the graph when the expected number of first parity bit transmissions and the actual number of parity bit transmissions are the same.

그래프의 상단에 위치한 시뮬레이션 결과(400)는 실제의 필요한 패리티 비트 전송 횟수보다 예상한 패리티 비트 전송횟수가 적은 경우를 나타낸 것이다. 즉, 수학식 4에 의해 예상된 제1 패리티 비트 전송 횟수에 해당하는 만큼의 패리티 비트의 양을 처음 보낸 후, 복원된 비트플레인에 에러가 검출되지 않을 때까지 부호화기에 추가로 24비트를 요구할 수 있다.

The simulation result 400 located at the top of the graph shows a case where the expected number of parity bit transmissions is smaller than the actual number of necessary parity bit transmissions. That is, after first sending an amount of parity bits corresponding to the number of first parity bit transmissions estimated by Equation 4, an additional 24 bits may be requested to the encoder until no error is detected in the restored bitplane. have.

그래프의 하단에 위치한 시뮬레이션 결과(410)는 예상한 패리티 전송 횟수가 실제 필요한 패리티 비트의 수보다 많은 경우로, 이러한 경우 과도 추정(Overestimation)이 발생할 수 있고 과도 추정이 일어날 경우, 필요 이상의 패리티 비트를 전송하기 때문에 RD(Rate-Distortion) 성능을 감소시킬 수 있다.

The simulation result 410 located at the bottom of the graph shows that the estimated number of parity transmissions is larger than the number of parity bits actually required. In this case, overestimation may occur and if overestimation occurs, more parity bits may be needed. Because of the transmission, Rate-Distortion (RD) performance can be reduced.

5 is a flowchart illustrating a fast LDPCA code decoding method according to another embodiment of the present invention.

Referring to FIG. 5, when the bit included in the bitplane is the first bit, the expected number of second parity transmissions is calculated (step S500).

The fast LDPCA code decoding method according to another embodiment of the present invention may change the amount of parity bits initially transmitted by varying the expected number of parity bit transmissions according to the positions of bits included in the bitplane.

Hereinafter, in the fast LDPCA code decoding method according to another embodiment of the present invention, a bit in the MSB or MSB-1 position may be referred to as a first bit, and a bit located elsewhere except the MSB or MSB-1 position may be referred to as a second bit. have.

The first bit and the second bit are arbitrarily divided for convenience of description. In another embodiment, the bit at the MSB, MSB-1, or MSB-2 position is referred to as the first bit, and the MSB, MSB-1, or MSB- Bits other than the two positions may be referred to as second bits. In other words, unless separated from the essence of the present invention, the distinction between any first bit and the second bit is within the scope of the present invention.

The expected number of parity bit transmissions may vary according to the positions of the bits included in the bitplane, such as the first bit and the second bit of the present invention.

In the fast LDPCA code decoding method according to another embodiment of the present invention, the number of parity bit transmissions expected when the first bit is the second number of parity bit transmissions, and the number of expected parity bit transmissions when the second bit is the third number; And 4 parity bit transmission times.

FIG. 6 is a graph showing that a required number of parity transmissions, that is, a parity amount, differs depending on a position of a bit value included in a bit plane in a fast LDPCA code decoding method according to another embodiment of the present invention.

블록에 포함되는 DC, 제1 AC, 제2 AC을 구성하는 비트는 QM(Quantize Matrix, QM)의 레벨이 8일 경우, DC는 7개의 비트, 제1 AC 및 제2 AC는 6개의 비트로 양자화될 수 있다. Referring to FIG. 6, each DCT domain

The bits constituting the DC, the first AC, and the second AC included in the block are quantized to 7 bits for the DC, and the first AC and the second AC to 6 bits when the level of the QM (Quantize Matrix, QM) is 8. Can be.

Bit values obtained by quantizing the DC may list seven bit values from the MSB to the LSB. Larger values (MSB or MSB-1, hereinafter referred to as the first bit) have a lower probability of error and fewer parity bits than smaller values (MSB-2 through LSB, hereinafter referred to as the second bit). Is restored through. On the other hand, since the second bit is smaller than the first bit, there is a relatively high probability of error, and the number of parity bit transmissions required to recover the bitplane increases.

Referring back to FIG. 6, the above-described feature may be confirmed through a graph related to DC. That is, the number of parity bit transmissions required from the first bitplane including the LSB value of DC to the seventh bitplane including the MSB value in order of magnitude is reduced. That is, the closer the MSB is, the lower the probability of error and the smaller the number of parity bit transmissions required to recover the bit.

In the case of the first AC and the second AC, the MSB positions of the first AC and the second AC are bits representing a sign of the corresponding AC value and bits representing the magnitude of the AC value from MSB-1. When the QM level is 8, the AC value may be represented by 6 bits (1 bit is a sign and 5 bits is a size). As you can see in the first and second AC graphs. From MSB-1 to LSB, the number of transmissions of the parity bits required to calculate the value included in the corresponding bit plane is increased.

In the fast LDPCA encoding method according to another embodiment of the present invention, the parity bit request number required when restoring a previous bit is predicted as the minimum required parity bit transmission number, and the parity based on the predicted parity bit transmission number. As much as the bit amount can be transmitted to the decoder. For example, the minimum estimated parity bit transmission to recover MSB-3 is the parity bit transmission actually needed to recover MSB-2 bits, and other required parity bits are additionally transmitted by 24 bits. Method can be used. In addition, the new minimum parity bit may be transmitted by calculating the minimum number of parity bit transmissions once again based on the restored result.

In the case of DC values, the MSB has no previous reference value and MSB-1 often has a value similar to that of MSB. Therefore, the minimum expected parity transmission is determined by the number of parity bit transmissions required to restore MSB-2 from MSB-3. You can do this. That is, the minimum parity bit transmission count for restoring a specific bit value may be the parity bit transmission count used for restoring a bit before the specific bit value.

The AC value is the MSB value as the Sign value. Therefore, the MSB-1 value has no previous value that can be referred to. You can do

Equation 5 below shows the expected number of second parity bit transmissions when restoring the bitplane including the first bit MSB or MSB-1.

은 수학식 4를 통해 예상한 엔트로피를 이용한 제2 패리티 비트 전송 횟수이고, 아래의 계수 2는 설명의 편의상 고정된 값인 2로 나타내었으나, 2가 아닌 다른 값을 사용하는 것도 가능하다. 또한, 본 발명의 본질에서 벋어나지 않는 한 과도추정이 발생하지 않는 다른 수식적인 해법을 사용해 최소 패리티 비트 전송 횟수를 산출할 수 있다.
In Equation 5 above

Is the number of second parity bit transmissions using entropy expected through Equation 4, and the coefficient 2 below is represented as 2, which is a fixed value for convenience of description, but other values than 2 may be used. In addition, the minimum number of parity bit transmissions can be calculated by using another mathematical solution that does not cause an overestimation unless it departs from the essence of the present invention.

7 shows the number of parity bit transmissions required and the actual number of parity bit transmissions required when predicting MSB or MSB-1.

축은 수학식 4에 의해 산출된 예상된 제1 패리티 비트 전송 횟수인

값을 나타내고

축은 실제 MSB 또는 MSB-1을 예측할 경우 요구되는 패리티 비트 전송 횟수를 나타낸다.Of the graph of FIG.

The axis is the expected number of first parity bit transmissions calculated by equation (4).

Indicates a value

The axis represents the number of parity bit transmissions required when predicting the actual MSB or MSB-1.

Referring to FIG. 7, when the slope of the graph is 1/2, an overestimation rarely occurs. That is, when using the value obtained by dividing the predicted number of first parity bit transmissions by two as the number of second parity bit transmissions, overestimation may not occur.

If the bit included in the bitplane is the second bit, the expected number of parity transmissions is calculated (step S510).

라는 새로운 추정 계수를 산출할 수 있다.

는 복원하고자 하는 비트플레인 이전의 비트플레인에서 요구된 패리티 비트 전송 횟수를 나타낸 것이다. 도 6의 그래프에서 도시된 바와 같이 일반적으로 하위 비트플레인에 해당할수록 요구되는 비트플레인 전송 횟수가 많아지므로 이전 비트플레인을 복원하는데 사용되었던 비트플레인 전송 횟수를 기초로 초기 패리티 비트 전송량을 결정할 수 있다. 이때

의 값과

의 값을 서로 비교해서 상대적인 크기에 따라 예상된 패리티 비트 전송 횟수가 달라질 수 있다.For convenience of description, the second bit is defined as a bit other than MSB or MSB-1. As described above, when the parity bit transmission number prediction method according to another embodiment of the present invention is the second bit,

A new estimation coefficient can be calculated.

Denotes the number of parity bit transmissions required in the bitplane before the bitplane to be restored. As shown in the graph of FIG. 6, since the required number of bitplane transmissions increases as the lower bitplanes generally correspond, the initial parity bit transmission amount may be determined based on the number of bitplane transmissions used to restore the previous bitplane. At this time

And the value of

Compared with each other, the expected number of parity bit transmissions may vary depending on the relative size.

의 값이

의 값보다 큰 경우 예상된 제3 패리티 비트 전송 횟수를 나타낸 것이다. Equation 6 below

Has a value of

If the value is greater than, it indicates the expected number of third parity bit transmissions.

8 is a graph illustrating a prediction of the number of times of transmitting a third parity bit of a second bit based on a previous bit frame according to another embodiment of the present invention.

축은 이전 비트 프레임에서 요구되었던 패리티 비트의 전송 회수를 기초로 예상한 현재의 제2 비트를 복원하기 위한 제3 패리티 비트 전송 횟수

을 나타내고, 그래프의

축은 제2 비트를 복원하기 위해 필요한 실제의 패리티 비트 전송 횟수를 나타낸다. Of the graph of FIG.

The axis transmits a third parity bit transmission number for restoring the current second bit expected based on the number of transmissions of the parity bits that were required in the previous bit frame.

Of the graph

The axis represents the actual number of parity bit transmissions needed to recover the second bit.

값을 기초로 초기 전송 패리티 비트양을 전송했을 경우, 실제 요구되는 패리티 비트 전송 횟수값이 그래프의 상단에 위치한다. 즉,

값을 기초로 초기 전송 패리티 비트양을 전송했을 경우 과도 예측이 발생하지 않는다. Referring to Figure 8, the expected

When the initial transmission parity bit amount is transmitted based on the value, the actually required parity bit transmission count value is located at the top of the graph. In other words,

Transient prediction does not occur when the initial transmission parity bit amount is transmitted based on the value.

의 값이

의 값보다 작거나 같은 경우 예상된 제4 패리티 비트 전송 횟수를 나타낸 것이다.Equation 7 is

Has a value of

If it is less than or equal to, it indicates the expected number of fourth parity bit transmissions.

9 and 10 are graphs for predicting the number of times of parity bit transmission of a second bit based on a previous bit frame according to another embodiment of the present invention.

축은 수학식 4에 의해 예상된 제1 패리티 비트 전송 횟수를

을 나타내고, 그래프의

축은 제2 비트를 복원하기 위해 필요한 실제의 패리티 비트 전송 횟수를 나타낸다. Of the graph disclosed in FIG.

The axis represents the number of first parity bit transmissions expected by Equation 4.

Of the graph

The axis represents the actual number of parity bit transmissions needed to recover the second bit.

의 값이

의 값보다 작거나 같은 경우, 제4 패리티 비트의 전송 횟수를

으로 한다면, 그래프의 하단에 실제 패리티 비트 전송 횟수가 위치함으로써 과도 예측이 발생한다는 것을 알 수 있다. 9,

Has a value of

If less than or equal to, the number of times the fourth parity bit is transmitted

In this case, it can be seen that over prediction occurs because the actual number of parity bit transmissions is located at the bottom of the graph.

축은 수학식 7에서 산출된 예상된 제4 패리티 비트의 전송 횟수

을 나타내고, 그래프의

축은 제2 비트를 복원하기 위해 필요한 실제의 패리티 비트 전송 횟수를 나타낸다. Of the graph disclosed in FIG.

The axis represents the number of transmissions of the expected fourth parity bit calculated in Equation 7.

Of the graph

The axis represents the actual number of parity bit transmissions needed to recover the second bit.

의 값이

의 값보다 작거나 같은 경우, 제4 패리티 비트의 전송 횟수를

으로 한다면, 과도 예측이 발생하지 않는다는 것을 알 수 있다.Referring to FIG. 10,

Has a value of

If less than or equal to, the number of times the fourth parity bit is transmitted

In this case, it can be seen that over prediction does not occur.

의 값이

의 값보다 작거나 같은 경우 제4 패리티 비트의 전송 횟수를 결정하는 식

은 본 발명의 본질에서 벋어나지 않는 한 과도 추정이 발생하지 않는 다른 수식을 이용해 최소 패리티 비트 전송 횟수를 산출할 수 있다. According to the fast LDPC code decoding method according to another embodiment of the present invention disclosed in Equation (7)

Has a value of

An expression that determines the number of times the fourth parity bit is transmitted if it is less than or equal to

The minimum parity bit transmission count may be calculated by using another equation in which transient estimation does not occur unless it departs from the essence of the present invention.

The parity bit is transmitted based on the calculated minimum parity bit transmission number, and the bit plane is restored based on the transmitted parity bit (step S520).

The bitplane including the first bit (MSB or MSB-1) can obtain a second parity bit transmission amount based on the number of second parity bit transmissions calculated by Equation 5, Bit plane), according to Equation 6 and Equation 7, according to Equation 6 and Equation 7, the third parity bit transmission amount based on the third parity bit transmission number and the fourth parity bit transmission amount based on the fourth parity bit transmission number according to each case. You can get it.

In each case, the calculated minimum parity bit transmission amount may be provided by the encoder and the bit plane may be restored. If the restoration is not performed based on the minimum parity bit, the bitplane may be restored by using a method of requesting the encoder for an additional parity bit of 24 bits.

The Hard Decision Aided (HDA) method disclosed in FIG. 2 may be used to recover the bitplane. The Hard Decision Aided (HDA) method allows for faster bitplane recovery because the decoder knows whether additional parity bits are required for bitplane recovery before the decoder finishes all iterations for bitplane recovery. have.

11 is a conceptual diagram illustrating a distributed video encoding and decoding apparatus according to another embodiment of the present invention.

Referring to FIG. 11, the conventional Wyner-Ziv encoding apparatus 1100 includes a keyframe encoder 1140, a quantizer 1110, a block unitizer 1120, and a channel code encoder 1130. The corresponding decoding apparatus 1150 includes a keyframe decoder 1170, a channel code decoder 1160, an image restorer 1190, and an auxiliary information generator 1180.

The encoding apparatus 1100 according to the Wyner-Ziv encoding technique classifies frames of source video content into two types. One is a frame (WZ frame) to be encoded by the distributed video encoding method, and the other is a frame (key frame) to be encoded by the conventional encoding method rather than the distributed video encoding method.

The key frames are typically encoded by the H.264 / AVC intra coding scheme by the key frame encoder 1140 and transmitted to the decoding apparatus 1150. The keyframe decoder 1170 of the decoding apparatus 1150 corresponding to the encoding apparatus 1100 according to the conventional Wyner-Ziv coding technique reconstructs the transmitted keyframes, and the auxiliary information generator 1180 decodes the keyframe. The side information corresponding to the WZ frame is generated by using the key frame reconstructed by the unit 1170, and the generated side information is output to the channel code decoder 1160.

Typically, the auxiliary information generator 1180 assumes linear movement between key frames located before and after the current WZ frame, and generates side information corresponding to the WZ frame to be restored using interpolation. In some cases, the interpolation method may be used instead of the interpolation method, but the interpolation method is used in most cases because the noise in the auxiliary information generated by the interpolation method is smaller than the noise in the auxiliary information generated by the interpolation method.

Meanwhile, in order to encode the WZ frame, the quantization unit 1110 of the encoding apparatus 1100 performs quantization on the WZ frame and outputs the quantization value of the WZ frame to the block unitization unit 1120. The block unit unit 1120 divides the quantized value of the input WZ frame into predetermined coding units. The channel code encoder 1130 generates a parity bit for each coding unit by using the channel code.

The parity bits generated by the channel code encoder 1130 are temporarily stored in a parity buffer (not shown), and are sequentially transmitted to the decoding device 1150 when the decoding device 1150 requests the parity bits through a feedback channel. do.

The channel code encoder 1130 may vary the amount of transmission of the parity bits according to the amount of parity bits required by the parity bit predictor 1163 included in the channel code decoder 1160. For example, if the parity bit predicting unit determines that the number of parity bit transmissions for decoding a predetermined bit plane is 20 times, the channel code decoding unit 1160 may request 480 bits of the parity bits, and the channel code encoding unit ( In operation 1130, 480 bits of parity bits may be transmitted at a time.

Thereafter, the channel code encoder 1130 may transmit the additional parity bits when the channel code decoder 1160 requests the additional parity bits.

The channel code decoder 1160 of the decoding apparatus 1150 receives the parity transmitted from the encoding apparatus 1100, estimates a quantized value, and the image restorer 1190 estimates the quantized value by the channel code decoding unit 1160. The quantized value is input and dequantized to restore the WZ frame. If the decoding fails because the parity bits provided from the encoding device 1100 are not sufficient to ensure successful decoding, the decoding device 1150 transmits an additional parity bit to the encoding device 1100 through a feedback channel. This process is repeated until decryption succeeds. The channel code decoder 1160 may include a parity bit predictor 1163.

12 is a conceptual diagram illustrating a parity bit predictor according to another embodiment of the present invention.

Referring to FIG. 12, the parity bit predictor 1163 may include an LLR-intrinsic calculator 1200, an entropy calculator 1210, and a parity bit transfer count calculator 1220.

Hereinafter, according to the fast LDPCA code decoding apparatus according to an embodiment of the present invention, the LLR-Intrinsic calculator 1200 is a first prediction coefficient calculator, the entropy calculator 1210 is a second prediction coefficient calculator, parity bits The transmission count calculator 1220 may be defined as a first parity bit transmission count calculator.

을 기초로 전술한 수학식 2에 의해 산출된 LLR-Intrinsic값(제1 예측 계수)를 산출할 수 있다.The LLR-Intrinsic calculator 1200 performs auxiliary information and Laplacian coefficient values generated by the decoder.

Based on the above, the LLR-Intrinsic value (first prediction coefficient) calculated by Equation 2 described above may be calculated.

값을 인덱스로 가지는 가지는 소정의 비트플레인에 포함된 비트를 성공적으로 디코딩하기 위해 필요한 정보량을 나타낸다.The entropy calculator 1210 may obtain the entropy (second prediction coefficient) disclosed in Equation 3 based on the LLR-Intrinsic value calculated by the LLR-Intrinsic calculator 1200. Entropy is

It indicates the amount of information necessary to successfully decode bits included in a given bitplane having a value as an index.

The parity bit transmission count calculator 1220 may calculate the first parity transmission count through the above-described Equation 4 based on the entropy value calculated by the entropy calculator 1210.

As described above, the above-described Equations 2 to 4 for calculating the LLR-Intrinsic value (first prediction coefficient), entropy (second prediction coefficient), and the first parity bit transmission frequency are high speed according to an embodiment of the present invention. For the convenience of description in the LDPC encoding method, as one exemplary formula for calculating the above values, it is also possible to calculate the minimum number of parity bit transmissions by using another formulating solution without departing from the essence of the present invention.

The parity bit transmission number predictor 1220 may request a parity bit to the encoder based on the first parity transmission count calculated by the parity bit transmission unit 1220, and restore the bitplane based on the transmitted parity bit.

In recovering the bitplane, it is also possible to quickly determine whether the decoding of the bitplane is successful using the above-described Hard Decision Aided (HDA) method, and to request an additional parity bit to the encoder.

13 is a conceptual diagram illustrating a parity bit predictor according to another embodiment of the present invention.

Referring to FIG. 13, the parity bit predictor 1163 includes an LLR intrinsic calculator 1300, an entropy calculator 1310, a first parity bit transfer count calculator 1320, and a second parity bit transfer count calculator 1320. 1330 may be included.

Hereinafter, according to the fast LDPCA code decoding apparatus according to an embodiment of the present invention, the LLR-Intrinsic calculator 1200 may define the first prediction coefficient calculator and the entropy calculator 1210 as the second prediction coefficient calculator. Can be.

을 기초로 전술한 수학식 2에 의해 산출된 LLR-Intrinsic값(제1 예측 계수)을 산출할 수 있다. The LLR-Intrinsic calculator 1300 may use the auxiliary information generated by the decoder and the Laplacian coefficient value.

Based on the above, the LLR-Intrinsic value (first prediction coefficient) calculated by Equation 2 described above may be calculated.

값을 인덱스로 가지는 가지는 소정의 비트플레인에 포함된 비트를 성공적으로 디코딩하기 위해 필요한 정보량을 나타낸다.The entropy calculator 1310 may obtain the entropy (second prediction coefficient) disclosed in Equation 3 based on the LLR-Intrinsic value calculated by the LLR-Intrinsic calculator 1300. Entropy is

It indicates the amount of information necessary to successfully decode bits included in a given bitplane having a value as an index.

The first parity bit transmission number prediction unit 1320 may calculate the first parity transmission number based on Equation 4 described above based on the entropy value calculated by the entropy calculation unit 1310.

As described above, the above Equations 2 to 4 for calculating the LLR-Intrinsic value, entropy, and the minimum parity bit transmission count are calculated for convenience of description in the fast LDPC encoding method according to an embodiment of the present invention. It is also possible to calculate the first minimum parity bit transmission number by another formulating solution as long as it does not deviate from the essence of the present invention as one exemplary formula.

(제1 패리티 비트 전송 횟수)에 의해 제2 패리티 비트 전송 횟수를 예측하고, 제2 비트(MSB 또는 MSB-1를 제외한 비트)의 경우, 산출된

의 값을 기초로 수학식 6 및 수학식 7을 이용하여 제3 패리티 비트 전송 횟수 및 제4 패리티 비트 전송 횟수를 예측할 수 있다. The second parity bit transmission count estimator 1330 is configured to calculate the first bit (MSB or MSB-1) by Equation 5 described above and transmitted from the first parity bit transmission count calculator 1320.

The second parity bit transmission count is predicted by the (number of first parity bit transmissions), and in the case of the second bit (bits other than MSB or MSB-1), the calculated number is calculated.

The third parity bit transmission count and the fourth parity bit transmission count may be predicted using Equation 6 and Equation 7 based on the value of.

The second parity bit transmission count calculator 1330 may request a parity bit from the encoder based on the parity transmission count calculated by the second parity bit transmission unit 1330, and restore the bitplane based on the transmitted parity bits.

In restoring the bitplane, it is also possible to quickly determine whether the decoding of the bitplane is successful using the aforementioned Hard Decision Aided (HDA) method and to request an additional parity bit to the encoder.

Although described with reference to the above embodiments, those skilled in the art will understand that various modifications and changes can be made without departing from the spirit and scope of the invention as set forth in the claims below. Could be.

Claims (20)

In the fast decoding method using a Low Density Parity Check Accumulate (LDPCA) code,
Calculating a first prediction coefficient for predicting the bitplane based on the auxiliary information and the Laplacian coefficients; And
Calculating a second prediction coefficient representing a quantity of information required to restore the bitplane based on the first prediction coefficient, and calculating a first parity bit transmission number based on the second prediction coefficient. Fast decoding method using. The fast decoding method according to claim 1, wherein the LDPCA code includes:
After calculating a first transmission parity bit based on the number of transmission of the first parity bit, the encoder requests the first transmission parity bit from an encoder and exists in the bitplane based on the transmitted first parity bit. Fast decoding method using the LDPCA code further comprising the step of correcting. The fast decoding method according to claim 1, wherein the LDPCA code includes:
And if an error existing in the bit plane is not corrected using the transmitted first transmission parity bits, requesting an additional parity bit to an encoder. The fast decoding method according to claim 1, wherein the LDPCA code includes:
If the bit included in the bit plane is the first bit, the second parity transmission count is calculated based on the first parity bit transmission count, and the encoder requests the second parity bit based on the second parity bit transmission count. A fast decoding method using an LDPCA code further comprising the step of. The method of claim 4, wherein the second parity bit transmission number,
Equation 1 below
(Equation 1)

(here,

Is the number of first parity transmissions)
A fast decoding method using the LDPCA code, characterized in that calculated based on. The fast decoding method according to claim 1, wherein the LDPCA code includes:
If the bit included in the bit plane is a second bit and the calculated previous parity bit transmission count is greater than the first parity transmission count, the third parity bit transmission count is calculated based on the previous parity bit transmission count and the first parity bit transmission count is calculated. And requesting, by the encoder, a third parity bit based on the number of three parity bits transmitted, using the LDPCA code. The method of claim 6, wherein the third parity bit transmission frequency,
Equation 2 below
(Equation 2)

(here,

Is the number of previous parity bit transfers)
A fast decoding method using the LDPCA code, characterized in that calculated based on. The fast decoding method according to claim 1, wherein the LDPCA code includes:
If the bit included in the bit plane is the second bit and the calculated previous parity bit transmission count is less than or equal to the first parity transmission count, the first parity bit transmission count and the first parity bit transmission count are based on the first parity bit transmission count. Calculating a parity bit transmission number and requesting a fourth parity bit based on the fourth parity bit transmission number to the encoding unit. 4. The method of claim 8, wherein the fourth parity bit transmission number,
Equation 3 below
(Equation 3)

(here,

Is the number of first parity transmissions,

Is the number of previous parity bit transfers)
A fast decoding method using the LDPCA code, characterized in that calculated based on. The method of claim 1, wherein the first prediction coefficient,
Equation 4 below
(Equation 4)

(here,

Has some auxiliary information

, The probability that the bit value of the bitplane is determined to be 0,

Has ancillary information

, The probability that the bit value of the bitplane is determined to be 1)
A fast decoding method using the LDPCA code, characterized in that calculated by. The method of claim 10, wherein the second prediction coefficient,
Equation 5 below
(Equation 5)

(here,

Is a value calculated based on the first prediction coefficient,

Means)
A fast decoding method using the LDPCA code, characterized in that calculated by. The method of claim 11, wherein the first parity bit transmission number,
Equation 6 below
(Equation 6)

(here,

Means the second prediction coefficient)
A fast decoding method using the LDPCA code, characterized in that calculated by. In the fast decoding apparatus using the LDPCA code,
A channel code decoding unit calculating a number of first parity bit transmissions and requesting first transmission parity bits based on the number of first parity bit transmissions from an encoder to restore the bit planes when an error exists in a bit plane; And
And a video restoring unit for restoring an image by performing inverse quantization on the basis of the bit plane transmitted from the channel code decoding unit. The method of claim 13, wherein the channel code decoder,
And a parity bit predictor for calculating the first number of parity bit transmissions and predicting first transmission parity bits necessary for decoding the bitplane based on the number of transmissions of the first parity bits. The method of claim 14, wherein the channel code decoder,
After receiving the first transmission parity bit from the encoder and determining whether the bit plane is errored by a Hard Decision Aided (HDA) method, requesting an additional parity bit when an error exists in the bit plane. A fast decoding device using an LDPCA code characterized in that. 15. The apparatus of claim 14, wherein the parity bit predictor comprises:
A first prediction coefficient calculator for calculating a first prediction coefficient for predicting a bit value of the bitplane based on the auxiliary information and the Laplacian coefficient;
A second prediction coefficient calculating unit indicating an amount of information required to restore a bit value of a bitplane based on the calculated first prediction coefficients; And
And a first parity bit transfer count calculating unit configured to calculate a first parity bit transfer count required to recover the bitplane based on the second prediction coefficient calculator. 17. The apparatus of claim 16, wherein the parity bit predictor comprises:
And a second parity bit transmission count calculating unit for calculating a second parity bit transmission count required to restore the bitplane based on a previous parity bit transmission count. The method of claim 17, wherein the second parity bit transmission count calculator
If the bit included in the bit plane is a first bit, the LDPCA code of the second parity bit transmission count based on the first parity bit transmission count calculated by the first parity bit transmission count calculating unit is calculated Fast decoding apparatus using. 18. The apparatus of claim 17, wherein the second parity bit transfer count calculating unit comprises:
If the bit included in the bit plane is a second bit and the calculated previous parity bit transmission count is greater than the first parity transmission count, an LDPCA code for calculating a third parity bit transmission count is calculated based on the previous parity bit transmission count. Fast decoding device used. 18. The apparatus of claim 17, wherein the second parity bit transfer count calculating unit comprises:
If the bit included in the bit plane is the second bit and the calculated previous parity bit transmission count is less than or equal to the first parity transmission count, the first parity bit transmission count and the first parity bit transmission count are based on the first parity bit transmission count. A high speed decoding device using an LDPCA code for calculating the number of 4 parity bit transmission.

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