KR101151254B1 - 안테나 리드프레임을 이용한 반도체 패키지 - Google Patents
안테나 리드프레임을 이용한 반도체 패키지 Download PDFInfo
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- KR101151254B1 KR101151254B1 KR1020110044343A KR20110044343A KR101151254B1 KR 101151254 B1 KR101151254 B1 KR 101151254B1 KR 1020110044343 A KR1020110044343 A KR 1020110044343A KR 20110044343 A KR20110044343 A KR 20110044343A KR 101151254 B1 KR101151254 B1 KR 101151254B1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 83
- 239000011347 resin Substances 0.000 claims abstract description 15
- 229920005989 resin Polymers 0.000 claims abstract description 15
- 238000000465 moulding Methods 0.000 claims abstract description 13
- 150000001875 compounds Chemical class 0.000 claims abstract description 12
- 230000008054 signal transmission Effects 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 5
- 238000004891 communication Methods 0.000 description 13
- 238000004519 manufacturing process Methods 0.000 description 6
- 239000000758 substrate Substances 0.000 description 6
- 238000010276 construction Methods 0.000 description 2
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005672 electromagnetic field Effects 0.000 description 1
- 230000005674 electromagnetic induction Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
즉, 본 발명은 신호 수신용 안테나패턴 프레임과 더블다운셋된 반도체 칩 탑재판이 일체로 형성된 안테나 리드프레임을 구비하여, 반도체 칩 탑재판에 반도체 칩을 부착하여 신호 수신용 안테나패턴 프레임과 도전성 와이어로 연결한 다음, 반도체 칩 및 도전성 와이어 등을 몰딩 컴파운드 수지로 몰딩하되, 신호 수신을 위한 안테나패턴 프레임을 외부로 노출시키면서 몰딩시킨 새로운 구조의 안테나 리드프레임을 이용한 반도체 패키지를 제공하고자 한 것이다.
Description
도 2는 본 발명에 따른 안테나 리드프레임을 이용한 반도체 패키지를 나타내는 단면도,
도 3a 및 도 3b는 본 발명에 따른 안테나 리드프레임을 이용한 반도체 패키지를 나타내는 평면도,
도 4는 본 발명에 따른 안테나 리드프레임을 이용한 반도체 패키지가 마더보드에 탑재되는 것을 설명하는 단면도,
도 5는 종래의 안테나를 갖는 반도체 패키지를 나타내는 단면도.
11 : 신호 수신용 안테나패턴 프레임
12 : 반도체 칩 탑재판
13 : 리드
14 : 신호 수신용 다각형 박판
15 : 신호전달라인
16 : 더미박판
20 : 반도체 칩
22 : 도전성 와이어
24 : 몰딩 컴파운드 수지
26 : 제1그라운드판
28 : 제2그라운드판
30 : 그라운드 쉴드판
32 : 마더보드
Claims (4)
- 신호 수신용 안테나패턴 프레임(11)과, 신호 수신용 안테나패턴 프레임(11)의 일측에 더블 다운셋되며 일체로 형성된 반도체 칩 탑재판(12)과, 안테나패턴 프레임(11)과 반도체 칩 탑재판(12)으로부터 외부로 연장되는 다수의 연장된 리드(13)를 포함하는 안테나 리드프레임(10)과;
상기 반도체 칩 탑재판(12)에 부착되는 반도체 칩(20)과;
상기 반도체 칩(20)의 본딩패드와 각 리드(13) 간에 연결되는 동시에 반도체 칩(20)의 본딩패드와 신호 수신용 안테나 패턴프레임(11) 간에 연결되는 도전성 와이어(22)와;
상기 안테나 리드프레임(10)의 더블다운셋된 부분과, 반도체 칩(20)과, 도전성 와이어(22)를 보호하기 위하여 몰딩되는 몰딩 컴파운드 수지(24);
로 구성하되,
상기 안테나 리드프레임(10)의 신호 수신용 안테나패턴 프레임(11)의 상면과, 반도체 칩 탑재판(12)의 저면을 몰딩 컴파운드 수지(24)와 동일 평면으로 하여 외부로 노출시킨 것을 특징으로 하는 안테나 리드프레임을 이용한 반도체 패키지.
- 청구항 1에 있어서,
상기 신호 수신용 안테나패턴 프레임(11)은 한쪽 방향을 따라 나란히 배열되는 다수개의 신호 수신용 다각형 박판(14)과, 신호 수신용 다각형 박판(14)의 안쪽단부에 일체로 형성되어 도전성 와이어(22)가 연결되는 신호전달라인(15)으로 구성된 것을 특징으로 하는 안테나 리드프레임을 이용한 반도체 패키지.
- 청구항 2에 있어서,
상기 신호 수신용 안테나패턴 프레임(11)의 안쪽부분에는 반도체 칩(20)과 도전성 와이어(22)로 연결되는 제1그라운드판(26)이 배열되고, 신호 수신용 안테나패턴 프레임(11)의 바깥쪽 부분에는 제1그라운드판(26)과 일체로 연결되거나 독립적으로 존재하게 되는 제2그라운드판(28)이 더 배열되는 것을 특징으로 하는 안테나 리드프레임을 이용한 반도체 패키지.
- 청구항 1에 있어서,
상기 몰딩 컴파운드 수지(24)의 저면 및 반도체 칩 탑재판(12)의 저면에는 그라운드 쉴드판(30)이 더 부착된 것을 특징으로 하는 안테나 리드프레임을 이용한 반도체 패키지.
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KR1020110044343A KR101151254B1 (ko) | 2011-05-12 | 2011-05-12 | 안테나 리드프레임을 이용한 반도체 패키지 |
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KR1020110044343A KR101151254B1 (ko) | 2011-05-12 | 2011-05-12 | 안테나 리드프레임을 이용한 반도체 패키지 |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110137158A (zh) * | 2019-06-04 | 2019-08-16 | 广东气派科技有限公司 | 一种封装模块天线的封装方法及封装结构 |
US10734704B2 (en) | 2018-11-20 | 2020-08-04 | Advanced Semiconductor Engineering, Inc. | Antenna package and method of manufacturing the same |
US10978312B2 (en) | 2019-05-03 | 2021-04-13 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method of manufacturing the same |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20010058790A (ko) * | 1999-12-30 | 2001-07-06 | 마이클 디. 오브라이언 | 반도체 패키지 |
JP2005142627A (ja) | 2003-11-04 | 2005-06-02 | Oki Electric Ind Co Ltd | アンテナ内蔵半導体装置 |
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2011
- 2011-05-12 KR KR1020110044343A patent/KR101151254B1/ko active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20010058790A (ko) * | 1999-12-30 | 2001-07-06 | 마이클 디. 오브라이언 | 반도체 패키지 |
JP2005142627A (ja) | 2003-11-04 | 2005-06-02 | Oki Electric Ind Co Ltd | アンテナ内蔵半導体装置 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10734704B2 (en) | 2018-11-20 | 2020-08-04 | Advanced Semiconductor Engineering, Inc. | Antenna package and method of manufacturing the same |
US10978312B2 (en) | 2019-05-03 | 2021-04-13 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method of manufacturing the same |
CN110137158A (zh) * | 2019-06-04 | 2019-08-16 | 广东气派科技有限公司 | 一种封装模块天线的封装方法及封装结构 |
CN110137158B (zh) * | 2019-06-04 | 2024-07-19 | 广东气派科技有限公司 | 一种封装模块天线的封装方法及封装结构 |
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