KR101112118B1 - Method of manufacturing a self-supporting type III nitride substrate - Google Patents

Abstract

The manufacturing method of the self-supporting group III nitride substrate disclosed in the embodiment of the present invention can overcome the technical limitations of using a conventional heterogeneous substrate, and furthermore, by providing a way to reuse the group III nitride substrate as a host substrate, Can be improved.

Description

Method for preparing a freestanding type III nitride substrate {Method for Preparing Freestanding Group III Nitride Substrate}

The present invention relates to a method for producing a free-standing group III nitride substrate. More specifically, the present invention relates to a method of making a freestanding group III nitride substrate capable of imparting reduced defect characteristics.

Group III-V nitride semiconductors such as GaN (Gallium Nitride), AlN (Aluminum Nitride), InN (Indium Nitride) or alloys thereof are known as materials for optoelectronic devices such as light emitting diodes (LEDs) and laser diodes. . These semiconductor materials have a large energy band gap of direct transition type, and have characteristics such that light of almost full wavelength range can be obtained depending on the composition of the nitride, and thus various fields such as flat panel display devices and optical communication Applied in

Such devices are typically grown in a thin film form on a substrate by growth methods such as molecular beam epitaxy (MBE), metalorganic chemical vapor deposition (MOCVD), and hydride vapor phase epitaxy (HVPE).

However, in the case of semiconductors based on group III nitrides represented by GaN, a method of growing a device on a heterogeneous substrate, such as a sapphire substrate, SiC, or the like, is common. In particular, the sapphire substrate not only has a hexagonal crystal structure such as GaN, but also has low cost and stable properties at high temperature, and thus is most widely used commercially. However, the heterogeneous substrate described above has a lattice constant difference (about 16% and about 3.5% for sapphire and SiC, respectively) and a coefficient of thermal expansion (about 34% and about 34% for Sapphire and SiC, respectively) with Group III nitrides, in particular GaN. 25%) causes strain at the interface, causing defects such as threading dislocations and cracks, making it difficult to grow a high quality film, which serves to shorten the life of the device.

In order to alleviate the problems caused by the use of heterogeneous substrates described above, a method of using a III-nitride substrate in which homo epitaxy growth can be achieved instead of a heterogeneous substrate such as sapphire has been proposed. In the case of using a homogeneous substrate as described above, the difference in lattice constant and difference in coefficient of thermal expansion are not only small, but also because the conductivity is excellent, mesa etching for n-contact is unnecessary, so that active layer loss can be suppressed. It is expected to have advantages.

In this regard, a method of growing a freestanding group III nitride substrate from a host substrate is known. For example, by growing a group III nitride layer for a thick film by hydride vapor-phase epitaxy (HVPE) on a sapphire substrate, the group III nitride layer is separated from the sapphire substrate using a UV laser (laser). Lift-off method). In other words, the excimer laser in the ultraviolet wavelength region having a very high energy is irradiated to the grown substrate to induce separation between the sapphire substrate and the group III nitride layer. For example, US Patent Publication No. 2007-82465 and the like have suggested a method for easier separation by laser irradiation through a porous nitride layer between the sapphire substrate and the grown group III nitride layer.

 However, in the above-described method, not only the phenomenon that the surrounding layer is damaged during the laser lift-off (LLO) process can be avoided, but also a so-called bending or bowing phenomenon is caused, which makes it difficult to obtain a high quality substrate. In some prior arts (for example, Korean Patent Publication No. 2009-14500), a chemical etching layer is formed on a sapphire substrate to mitigate cracking during laser lift-off, and a GaN layer is formed thereon. After the growth, a method of separating by chemical etching is also proposed, but there are still limitations in improving the quality deterioration problem of the group III nitride substrate due to the use of a heterogeneous substrate.

As an alternative, a method of using a III-nitride instead of sapphire as a host substrate may be considered. However, it is difficult to commercialize the III-nitride substrate since it is significantly more expensive than the sapphire substrate. In particular, even when the nitride substrate is used as the host substrate, there is only a method of etching from the side to separate the planar host substrate and the nitride layer grown thereon. A recent study (APPLIED PHYSICS LETTERS Volume 94, 221907 (2009)) suggested the possibility of lateral etching, but as the etching process becomes longer, the surface of the grown nitride is peeled off, which is not suitable for the substrate separation process.

As such, there is a need for a method capable of manufacturing a freestanding, high-quality, self-supporting group III nitride substrate compared to the prior art.

In one embodiment presented in the present invention to provide a method for manufacturing a high-quality Group III nitride substrate that can alleviate the problems according to the prior art when manufacturing the self-supporting Group III nitride substrate.

Furthermore, an object of the present invention is to provide a method for manufacturing a self-supporting Group III nitride substrate which can be manufactured at low cost while using the same type of nitride substrate as a host substrate.

According to the first aspect of the embodiment provided according to the invention,

a) providing a III-nitride-based host substrate;

b) forming on the host substrate a structure in which a group III nitride layer epitaxially grown over a plurality of rods is located; And

c) removing the plurality of rods to isolate the epitaxially grown Group III nitride layer from the host substrate;

Provided is a method of manufacturing a self-supporting group III nitride substrate comprising a.

Also, the method may further include reusing the separated host substrate as the host substrate of step a).

According to a preferred embodiment, the group III nitride layer epitaxially grown on the plurality of rods may be formed by hydride vapor-phase epitaxy (HVPE).

In this case, step c) may be performed by chemical etching or mechanical method.

According to an exemplary embodiment of the invention, step b) is

(i) forming an intermediate layer on the host substrate;

(ii) performing selective etching on the intermediate layer to form holes corresponding to the patterns of the plurality of rods; And

(iii) growing a group III nitride in the hole formed in the intermediate layer to form a plurality of rods;

It may include.

In the above embodiment, (iv) a group III nitride for a self-supporting substrate is provided by further comprising a side growth step subsequent to (or successively) forming the plurality of rods, thereby providing the side growth layer as a kind of template. Defects or dislocations in the layer can be further reduced. Step (ii) may also be performed using nano-imprint.

According to a second aspect of the invention,

A self-supporting group III nitride substrate prepared according to the above method and an electronic (or optoelectronic) device using the same are provided. In this case, the electronic device may include a light emitting device (LED), a laser diode (LD), a transistor, and the like.

The self-supporting group III nitride substrate prepared according to the embodiment of the present invention has a lower density of defects (dislocations) than the case of using a heterogeneous substrate such as a sapphire substrate, and can suppress damage caused by a laser or the like during the manufacturing process. Therefore, it is possible to improve the quality of the electronic device using the same. In particular, the Group III nitride substrate can be used as the host substrate, and the economic efficiency can be improved in that it can be reused in the future. Therefore, broad commercialization is expected in the future.

1 is a process flow diagram schematically illustrating a manufacturing process of a self-supporting group III nitride substrate according to an embodiment of the present invention;
2 (a) to 2 (i) are diagrams sequentially showing a fabrication procedure of a self-supporting group III nitride substrate according to an exemplary embodiment of the present invention;
3 is a perspective view illustrating a cross section in which a plurality of holes are formed in an intermediate layer during a fabrication process of a self-supporting group III nitride substrate according to one embodiment of the present invention; And
4 is a diagram showing an example in which a self-supporting Group III nitride substrate obtained in accordance with one embodiment of the present invention is applied to an LED device.

The present invention can all be achieved by the following description. The following description is to be understood as describing preferred embodiments of the invention, but the invention is not necessarily limited thereto.

In addition, the accompanying drawings may be somewhat exaggerated relative to the thickness (or height) of the actual layer or the ratio with other layers to facilitate understanding, the meaning of which will be appropriately understood by the specific purpose of the related description to be described later Can be.

In this specification, the expressions "on" and "on" are used to refer to the concept of relative location, where other components or layers are directly present in the layers mentioned, as well as other layers in between. Or it may be understood that the component may be interposed or present. Similarly, the expressions "below", "below", "below" and "between" may also be understood as a relative concept of position.

In the present specification, "Group III nitride" may refer to a semiconductor compound formed of a group III element on the periodic table and nitrogen. As an example of such a group III element, aluminum (Al), gallium (Ga), indium (In), or the like can be exemplified, and these can be included alone or in combination of two or more. Therefore, it can be understood as a concept including GaN, AlN, InN, AlGaN, AlInN, GaInN, AlInGaN and the like. Generalizing this, the group III nitride can be represented by the following general formula (1).

[Formula 1]

Al _x In _y Ga _1-xy N

In the above, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, and 0 ≦ x + y ≦ 1.

1 is a process flow diagram schematically illustrating a manufacturing process of a self-supporting group III nitride substrate according to an embodiment of the present invention.

As shown in the figure, first, a group III nitride-based substrate is provided as a host substrate (step A).

At this time, such a host substrate may be suitable to implement good homo epitaxy properties having the same composition as the self-supporting group III nitride substrate to be finally obtained. In addition, the Group III nitride-based host substrate may be prepared by growing in the form of a thick film by HVPE on a dark thermal method (ammonothermal method) or a different substrate (sapphire substrate) known in the art, the present invention is necessarily limited thereto It doesn't happen.

In the embodiment according to the invention, it is preferred that the host substrate be as low as possible in defect (eg, through dislocation) density because it can provide a growth surface of the epitaxy layer. For example, in this embodiment, the defect density of the group III nitride-based host substrate may be about 10 ⁶ / cm 2 or less, and further, about 10 ⁵ / cm 2 or less. In this regard, it may be desirable for the host substrate to have a thickness that ensures adequate durability and mechanical strength to withstand the physical or chemical environment from the outside during subsequent processes (eg, lift-off process, finishing process, etc.). Can be. Although the present invention is not limited to a specific thickness, it may be suitable, for example, in the range of about 100 to 1,000 μm, more specifically about 200 to 500 μm. In addition, the size (or diameter) of the host substrate may be at least about 2 inches, more specifically at least about 2 to 4 inches to be suitable for commercialization. The above numerical ranges are described for illustrative purposes, and it is obvious that the present invention is not limited thereto.

Then, forming an epitaxial growth layer of group III nitride on the host substrate over the plurality of rods (step B).

According to one embodiment of the present invention, the process may include a step of forming a rod through a patterning-etching-growth (regrowth) process and a step of growing a III-nitride layer grown on epitaxy for a freestanding substrate in the future. .

An exemplary rod forming step of the above embodiment forms an intermediate layer (e.g., silicon-based dielectric material) on a host substrate, and then forms a hole therein through patterning-etching, thereby forming group III nitride in the hole. It may be carried out in a growing manner. Furthermore, further comprising a lateral growth step subsequent to (or successively) the rod forming step, thereby providing defects or dislocations of the group III nitride layer growing thereon by providing the lateral growth layer as a kind of template. Can be reduced.

In an embodiment of the present invention, the plurality of rods may be formed in a so-called "top-down" or "bottom-up" manner according to the pattern principle, and the present invention is not necessarily limited to a specific manner. However, the latter may be advantageous in that a rod may be formed of a III-nitride material so that the subsequent substrate separation process may be performed relatively simply.

As a subsequent step, the epitaxially grown group III nitride layer and the host substrate located on each of the upper and lower sides of the rod are removed by removing the plurality of rods (step C).

In a preferred embodiment, the plurality of rods may be removed by chemical etching or mechanical manner. In addition, the separated group III nitride layer for free-standing substrates may optionally be further subjected to subsequent finishing processes, such as lapping and / or polishing. In the case of a separate host substrate, it can be reused as the host substrate of the process A, and the lapping and / or polishing process can be further performed as necessary.

2 (a) to 2 (i) are diagrams sequentially showing a fabrication procedure of a self-supporting group III nitride substrate according to an exemplary embodiment of the present invention.

In FIG. 2A, a group III nitride substrate 101 is provided as a host substrate as described above.

Next, an intermediate layer 102 is formed on the host substrate 101. As the intermediate layer 102, a material which does not affect the underlying layer, can easily form a pattern, and can be easily removed later, for example, a dielectric material, specifically a silicon-based dielectric material may be used. . As such a material, typically SiO _2, SiN _x and the like can be given (for example, Si ₃ N _4).

The layer can be formed by known methods, such as plasma enhanced chemical vapor deposition (PECVD). In this case, the intermediate layer 102 may be formed in a thickness of, for example, about 0.1 to 10 μm, specifically about 0.5 to 5 μm, and more specifically about 0.8 to 1.5 μm.

Subsequently, as shown in FIGS. 2 (c) to 2 (e), a patterning and etching step is performed to provide a space in which the rod of the III-nitride material can be grown later in the intermediate layer 102.

To this end, electron-beam lithography, focused ion beam lithography, nano-imprint, anodized aluminum oxide mask formation, and masks using SiO ₂ nanoparticles Principles known in the art may be used, such as formation methods, self-assembled metal masks, and the like. In this regard, it may be desirable to use a method in which the hole pattern may be formed in the intermediate layer 102 in a range of about 50 to 1,000 nm, more specifically, about 100 to 500 nm.

According to an exemplary embodiment of the present invention, the use of the principle of nano-imprint, which is relatively simple and can evenly distribute the load, can increase the ease and separation efficiency in a later substrate separation process (especially a mechanical separation process). It may be desirable.

Although the present invention does not exclude other approaches, the following description will focus on the nano-imprint principle.

As such nano-imprint, for example, a thermal imprint method, a UV imprint method and the like are known, and an example (thermal imprint method) to which the principle is applied can be described as follows. Not limited is clear:

First, the thermosetting resin layer 103 is applied on the intermediate layer 102 according to a known method such as spin coating. Then, a mold (eg, a silicon mold) fabricated using electron beam lithography, focused ion beam lithography, or the like is placed on the thermosetting resin layer 103. Then, at a temperature above the glass transition temperature (typically about 140 to 180 ° C. higher than the glass transition temperature) such that the thermosetting resin layer 103 has sufficient fluidity until pressurized to about 500 to 2000 psi, for example, about After heating at 160 to 170 ° C. for about 1 to 10 minutes, the mold is cooled (eg, at room temperature) to separate the mold from the thermosetting resin layer 103 to which the uneven pattern of the mold has been transferred. At this time, a portion corresponding to the convex portion of the mold may remain in the form of a thin film (not shown) on the intermediate layer 102, and according to a known etching technique such as reactive ion etching (RIE). You can remove it.

As a result, a plurality of hole 103 'patterns are formed in the thermosetting resin layer 103 on the intermediate layer 102. Although a circular hole pattern is illustrated in the drawing, hole patterns of various shapes are also possible. In addition, the spacing between the holes may vary depending on the size of the holes, but typically should be in the range of about 1 to 10 μm. In the case of the above-mentioned specific example, it is not necessarily limited to a hole pattern, and if a rod can be formed in various shapes or patterns, it will be sufficient if it is a pattern specifically defined. In this case, it may be preferable that there is a space between the pattern and the pattern so that the intermediate layer portion can be removed in a subsequent process.

As described above, etching is performed on the hole pattern 103 'in the thermosetting resin layer 103 formed on the intermediate layer 102, in which the thermosetting resin layer region in which the hole pattern is not formed serves as a mask for etching. . It is preferable to use dry etching as the etching method, for example, reactive ion etching (RIE), inductively coupled plasma reactive ion etching (ICP-RIE), chemically assisted etching (chemically assisted) ion beam etching (CAIBE) and the like.

Thus, the etching (preferably to the bottom depth of the intermediate | middle layer) of the intermediate | middle layer 102 is performed according to the hole pattern 103 'in a thermosetting resin layer. Thereafter, the thermosetting resin region remaining as a mask can be dissolved and removed using a known substance such as alcohol or acetone. As a result, as shown in FIGS. 2E and 3, the pattern of the plurality of holes 104 is formed in the intermediate layer 102. At this time, the hole 104 has a dimension substantially equivalent to that of the hole 103 'in the thermosetting resin layer which theoretically acts as a mask.

In the above-described etching process, when the ICP-RIE method is used, the etching conditions can be set as shown in Table 1 below.

Process parameters Process conditions Etc Etching time (min) 20

Interlayer Thickness: 1 μm Etch Rate (Å / min) 500 O ₂ / CF ₄ 3/35 sccm Forward bias (W) 200 Chamber pressure (mTorr) 75

As a next step, as shown in Fig. 5 (f), by growing group III nitride in the plurality of holes 104, a rod 105 bounded by (or corresponding to) the holes is formed.

In the above embodiment, it can be grown using conventional layer growth techniques such as MOCVD, HVPE, MBE, etc. In one example, it may be desirable to use MOCVD to ensure better quality.

As described above, the rod 105 is formed by growing the group III nitride in the hole 104 using the lower group III nitride host substrate 101 as a kind of seed. Further, in order to reduce defects or dislocations in the nitride layer that later grow to the freestanding substrate, a group III nitride layer may be formed on the intermediate layer 102 through a subsequent epitaxial lateral growth (ELO) process. As can be seen in FIG. 5 (f), the lateral growth layer 106 of such a group III nitride is shown.

In the ELO process, in the intermediate layer 102, the hole 104 acts as a kind of "window region", while regions other than the hole act as "wing regions".

Accordingly, group III nitride in the hole 104 can grow with filling the hole over time and gradually grow laterally over the wing area corresponding to the mask. As a result, the laterally grown group III nitride layer 106 has high quality crystalline properties with significantly reduced defects. At this time, the rod growth and side growth (ELO) in the hole 104 may be preferably performed in a single continuous process.

The lateral growth layer 106 acts as a kind of template, so that the microstructure of the improved properties of the lateral growth layer can be reproduced in the epitaxy group III nitride layer growing thereon. In this regard, the thickness of the side growth layer 106 is not particularly limited, but may be, for example, in the range of about 0.5 to 10 μm, more specifically about 1 to 3 μm.

The flow rate of the Ga source (eg, trimethylgallium, triethylgallium, etc.) supplied in the rod formation and lateral growth process may range from about 50 to 100 sccm. In addition, the above-described process can be carried out for about 50 to 100 minutes under a temperature (high temperature growth) of about 1,000 to 1200 ^o C and a pressure of about 200 to 600 mTorr, which should be understood in an exemplary manner and the material, rod It can be changed depending on the shape and dimensions, the dimensions of the side growth layer and the like.

Exemplary conditions of the above-described process may be set as shown in Table 2 below.

Process parameters Process conditions Etc Process pressure 500 mTorr ELO layer thickness: 2 μm Nitride Growth (High Temperature) 80 minutes (1050 ℃)

FIG. 2 (g) shows a state in which an epitaxially grown Group III nitride layer 107 is formed on the laterally grown Group III nitride layer 106 in the embodiment of the present invention.

The group III nitride layer 107 is preferably formed of an epitaxial growth layer of a thick film to be suitable for a self-supporting substrate, the thickness of which may be, for example, at least about 300 μm, more specifically It may range from about 100 to 500 μm. The numerical range is to be understood by way of example, the dimensions and the like can be changed in various ways depending on the intended use.

The group III nitride layer 107 is separated from the host substrate under the load through a subsequent lift-off process to be a substrate (eg, a growth substrate) for manufacturing electronic (or optoelectronic) devices such as LEDs, LDs, and transistors in the future. Can be used.

To this end, conventional growth techniques known in the art can be used, where MOCVD or MBE is advantageous for growing a high quality epitaxy layer, but at a relatively high cost as well as low growth rate. HVPE, on the other hand, has a relatively low growth cost and is particularly suitable for manufacturing thick growth layers because of its high growth rate. Although this embodiment is not limited to specific growth techniques, it may be desirable to use HVPE in view of the foregoing. Also, optionally, a pretreatment process such as nitriding may be performed as described above prior to growth.

In this regard, an example of forming a thick group III nitride layer using HVPE can be described as follows:

Ga is typically placed in a temperature range of about 600 to 1000 ° C. in a horizontal reactor having a two-stage temperature gradient and the target is placed in a growth area (temperature of about 800 to 1200 ° C.). GaCl synthesized by reacting Ga and HCl gas (feed rate: about 10-1000 sccm and about 100-1000 sccm, respectively) placed in a quartz vessel was converted into a carrier gas (eg, nitrogen gas; feed rate: about 1000-3000 sccm). ) And ammonia gas (feed rate: about 1000 to 5000 sccm) is supplied to the target location through a separate quartz plate. As a result, it grows on the target as in Scheme 1 below.

Scheme 1

GaCl + NH ₃ → GaN + HCl + H ₂ (for GaN growth)

Specific conditions of the above-described HVPE process can be illustrated as shown in Table 3.

Process parameters Process conditions Remarks Ga source temperature (℃) 800


Growth layer thickness: 300㎛ Growth zone temperature (℃) 1,000 HCl feed rate (sccm) 500 NH ₃ feed rate (sccm) 1,500 N ₂ carrier gas feed rate (sccm) 2000/3500 (HCl / NH ₃ ) Total flow slm 40 Growth time (min) 400 Holder rotation (rpm) 30

As described above, the III-nitride layer grown in the thick film form is a thick film, and as the growth thickness increases, the number of defects such as dislocations may be gathered into one and the number thereof may be reduced, thereby exhibiting improved characteristics as compared with the nitride host substrate. Further, when the side growth layer having reduced defect density or the like is used as a mold, a higher quality group III nitride layer can be obtained. In this case, the III-nitride layer 107 may lower the dislocation density to a level considerably lower than, for example, about 10 ⁵ / cm 2.

Figure 2 (h) is a view showing a state in which a plurality of rods are exposed by removing the intermediate layer portion in the embodiment of the present invention.

As shown, after the thick III-nitride layer is formed, only the region of the intermediate layer 102 surrounding the lower rod is selectively removed as much as possible and the rod 105 is exposed.

To this end, chemical (wet etch) removal methods known in the art may be used, for example HF, Buffered Oxide Etchant (HF + NH ₄ F mixture; BOE) and the like. For example, when using BOE, it is possible to remove the interlayer portion present between the rods in about 5 to 60 minutes at normal room temperature.

2 (i) shows the lateral growth layer 106 of the upper group III nitride or the epitaxially grown group III nitride layer 107 and the lower host substrate by removing the plurality of rods 105 exposed in the previous step. It is a figure which shows the state in which 101 was isolate | separated from each other.

In this embodiment, considering that the laser lift-off method according to the prior art can damage the peripheral layer, it is possible to simply remove the rod (or rod and side growth layer) by chemical or mechanical methods. As such, one of the advantages of the embodiments provided by the present invention is that it is possible to use a variety of separation schemes, without being limited to laser lift-offs.

(1) In order to implement chemical lift off, various wet etching schemes are typically available.

For example, using a strong acid (eg H ₃ PO ₄ ) or a heated (molten) strong base (eg alkali salts such as NaOH, KOH or mixtures thereof), the rod (or rod and It is preferable to remove the side growth layer) since the damage due to etching can be suppressed as much as possible. When using a molten alkali salt, the etching conditions can be set to typically be performed for about 3 to 30 minutes, more specifically about 5 to 15 minutes, under temperature conditions of at least about 300 ° C., more typically about 300 to 400 ° C. have.

Alternatively, after immersing the specimen in a solution such as oxalic acid, a voltage of about 20 to 90 volts (V), more specifically about 40 to 70 volts (V) is applied between the specimen and the platinum counter electrode. For example, the rod may be removed by etching, for example, for about 5 to 60 minutes, more specifically about 10 to 30 minutes. This etching principle is described in detail in APPLIED PHYSICS LETTERS Volume 94, 221907 (2009), which is incorporated herein by reference.

In addition, first, a resistive contact is made to the specimen and the two electrodes are connected by using a platinum (Pt) electrode as a counter electrode, and then a chemical cell is formed in diluted potassium hydroxide (KOH), followed by etching with ultraviolet rays. Inducing photoelectrochemical (PEC) etching may be applied. At this time, ammonia, hydrochloric acid, phosphoric acid and the like can be used as the electrolyte of the etching solution in addition to potassium hydroxide.

Specifically, the principle of performing PEC etching on GaN using potassium hydroxide is briefly described as follows.

When ultraviolet light is irradiated on the GaN surface, holes are generated and these holes move toward the surface. At this time, the OH ^- group in the electrolyte reacts with GaN and is converted into Ga ₂ O ₃ , which in turn reacts with the OH ^- group to produce GaO ₃ ^3- . As such, the GaN semiconductor is wet etched through the oxidation / reduction process in the electrolyte, and the excess hole is supplied by ultraviolet irradiation to promote the oxidation reaction, thereby increasing the etching rate.

In this regard, the present invention is not limited to the above manners, and the illustrated etching conditions may also be changed depending on the characteristics of the etching target. However, a chemical etching method using a molten alkali salt may be preferable in that the substrate and the grown nitride layer may be separated while maximally suppressing damage to another layer in a short time.

(2) In the case of mechanical separation, a sand blast can be exemplified by the use of air suction by high pressure air flow to remove abrasive (e.g., particle size in the range of about 800 to 1000 mesh). After suctioning, the target material is processed using the kinetic energy of the particles of the abrasive by spraying the abrasive sucked from the nozzle with air. For example, the group III nitride layer 107 may be separated by sandblasting the host substrate backside for about 1 to 10 minutes at a pressure of about 10 to 1000 g / cm 2 using sand blast equipment.

The epitaxially grown group III nitride substrate 107 and the host substrate 101 separated as described above may each be selectively processed to have a desired dimension or surface property, typically lapping and / or polishing ( Chemical and / or mechanical). In addition, if necessary, post-treatment steps known in the art such as etching (wet and / or dry), heat treatment, conditioning under a gas atmosphere (eg ammonia), and / or other finishing or The washing treatment can be performed.

One of the significant advantages of the embodiment according to the invention is that the host substrate separated from the freestanding group III nitride substrate can be reused as a host substrate for the production of a new freestanding substrate. For this purpose, for example, the separated host substrate 106 may be processed to have a desired surface property using polishing equipment within about several micrometers (for example, about 1 micrometer or so).

The self-supporting group III nitride substrate prepared according to the embodiment according to the present invention suppresses the mismatch phenomenon due to hetero epitaxy when using a heterogeneous substrate (for example, a sapphire substrate) that is widely used at present. It can be applied to the substrate of the electronic (or optoelectronic) device by the homo epitaxy growth. As an example of application to such an electronic device, a light emitting diode (LED), a laser diode (LD), a transistor (for example, HEMT), and the like can be exemplified.

4 is a diagram illustrating an example in which a self-supporting group III nitride substrate obtained in accordance with one embodiment of the present invention is applied to an LED device.

According to the figure, the LED element is a group III nitride substrate 201, an n-type (or p-type) semiconductor layer 202, an active layer 203 and a p-type (or n-type) semiconductor layer (from below) 204). In addition, a p-electrode 205 is formed on the p-type semiconductor layer 204, and an n-electrode 206 is formed on an exposed surface of the n-type semiconductor layer 202. The illustrated layer structure is provided for illustrative purposes, and various modified configurations are possible.

In this regard, the materials of the semiconductor layers 202 and 204 and the active layer 203 formed on the substrate 201 are not particularly limited, and various semiconductor materials (III-V and II-VI known in the art for manufacturing LEDs). Etc.), for example, GaN, InN, AlN, InP, InS, GaAs, CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnO, Al _x Ga _1-x N, In _x Ga _1-x N, In _x Ga _1-x As, Zn _x Cd _1-x S, or the like can be used, and these can be used alone or in combination (0 <x <1). However, it may be desirable to use group III nitride to effectively implement homoepitaxy properties.

In addition, the active layer 203 may be formed of at least two materials selected from, for example, GaN, AlN, InN, InGaN, AlGaN, InAlGaN, or the like. Among them, a material having a small energy band gap may be used as a quantum well, and a material having a large energy band gap may be configured as a quantum barrier, and both single and multi quantum well structures may be used.

In addition, for the electrodes 205 and 206 for electrical application, for example, platinum (Pt), palladium (Pd), aluminum (Al), gold (Au), nickel / gold (Ni / Au) alone Or in combination. For this electrode pattern formation, conventional methods such as photoresist patterning-etching, which are known in the art, may be performed.

Simple modifications and variations of the present invention can be readily used by those skilled in the art, and all such variations or modifications can be considered to be included within the scope of the present invention.

101: Group III nitride-based host substrate
102: middle layer
103: thermosetting resin layer
103 ': hole pattern in the thermosetting resin layer
104: hole pattern in the middle layer
105: load
106: lateral growth layer
107: Group III nitride layer for freestanding substrate
200: LED device
210: Group III nitride substrate
202: n-type (or p-type) semiconductor layer
203: active layer
204: p-type (or n-type) semiconductor layer
205 p-electrode
206: n-electrode

Claims (10)

a) providing a III-nitride-based host substrate;
b) forming on the host substrate a structure in which a group III nitride layer epitaxially grown over a plurality of rods is located; And
c) removing the plurality of rods to isolate the epitaxially grown Group III nitride layer from the host substrate;
Method for producing a self-supporting group III nitride substrate comprising a. The method of claim 1,
d) reusing the host substrate separated in step c) as a III-nitride-based host substrate of step a);
Method for producing a self-supporting group III nitride substrate further comprising a. The method of claim 1, wherein step b)
(i) forming an intermediate layer on the host substrate;
(ii) performing selective etching on the intermediate layer to form holes corresponding to the plurality of rod patterns;
(iii) growing a group III nitride in the hole formed in the intermediate layer to form a plurality of rods;
(iv) forming a lateral growth layer as a template of an epitaxially grown group III nitride layer following the plurality of rod forming steps;
(v) forming an epitaxially grown group III nitride layer on the lateral growth layer; And
(vi) removing the intermediate layer except the plurality of rods;
Method for producing a self-supporting Group III nitride substrate comprising a. The method of claim 3,
Step (ii) is a method of manufacturing a self-supporting Group III nitride substrate, characterized in that carried out using nano-imprint (nano-imprint). The method of claim 1,
Group III nitride layer epitaxially grown on the plurality of rods is formed by a hydride vapor-phase epitaxy (HVPE). The method of claim 1,
And a thickness of the group III nitride layer grown during epitaxy is at least 300 μm. The method of claim 1,
Wherein said step c) is carried out by chemical etching or mechanical method. The method of claim 1,
The size and length of the rod is 50 to 1,000nm and 0.1 to 10㎛ respectively manufacturing method of the self-supporting group III nitride substrate. A self-supporting group III nitride substrate made according to any one of claims 1 to 8. An electronic device comprising the self-supporting group III nitride substrate according to claim 9.

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