KR101093279B1 - Transverse electric field type liquid crystal display device and manufacturing method thereof - Google Patents

Abstract

A transverse electric field type liquid crystal display device according to the present invention comprises: a plurality of gate lines and data lines crossing on a substrate to define a pixel area in a matrix form; A thin film transistor formed at a point where the gate line and the data line cross each other; A pixel electrode formed on the pixel area and connected to the thin film transistor and having a plurality of vertical patterns, the pixel electrode being made of a transparent conductive metal material; A common electrode made of a transparent conductive metal material forming a transverse electric field with the pixel electrode and overlapping the gate line, the data line and the thin film transistor; An auxiliary common electrode formed of a gate metal material formed under the common electrode; And a contact hole formed to electrically connect the common electrode and the auxiliary common electrode at a predetermined position of the substrate.

According to the present invention, the common voltage delay problem associated with the high resistance of the common electrode made of the ITO electrode is common to the minimum portion of the entire display area through the common voltage input of the auxiliary common electrode to which the low resistance metal is applied. It is possible to improve the brightness and quality of the large-area liquid crystal display device through the delay compensation contact hole or the laser welding of the electrode, and to realize the continuous large area of the liquid crystal display device in the future.

Description

Transverse electric field type liquid crystal display device and manufacturing method thereof {In-Plane Switching mode Liquid Crystal Display Device and manufacturing method}

1 is a partial plan view of a lower substrate of a conventional IPS mode LCD.

2A to 2C are cross-sectional views of the manufacturing process taken along the lines II and II of FIG. 1.

3 is a plan view schematically illustrating a lower substrate of the IPS mode LCD shown in FIG. 1;

4 is a plan view schematically illustrating a lower substrate of an IPS mode liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 5 is a plan view illustrating some pixel areas of an IPS mode liquid crystal display according to the present invention including a specific point C of FIG.

6A to 6C are cross-sectional views of the manufacturing process taken along line III-III of FIG.

<Explanation of symbols for the main parts of the drawings>

400: lower substrate 520, 634: common electrode

642: contact holes 515 and 612: auxiliary common electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transverse electric field type liquid crystal display device and a method for manufacturing the same. In particular, an auxiliary common electrode formed of a gate metal is formed under a common electrode formed of ITO, and the common electrode and the auxiliary common electrode are electrically connected at a predetermined point of the panel. The present invention relates to a transverse electric field type liquid crystal display device and a method for manufacturing the same, which overcome the common voltage delay phenomenon by connecting to the semiconductor device.

In general, an LCD is formed by bonding an upper substrate and a lower substrate together and injecting a liquid crystal between the upper and lower substrates. In addition, a polarizer, a retardation film, and the like are attached to the outer surfaces of the upper and lower substrates, and by selectively configuring such a plurality of components, the light propagation direction or the refractive index is changed to be high. A liquid crystal display device having brightness and contrast characteristics is formed.

The liquid crystal cell used in recent years as a liquid crystal display device generally adopts a Twisk nematic (TN) mode, and the TN mode has a characteristic that the light transmittance in the gray scale display varies depending on the viewing angle, thereby limiting its large area. have.

In order to solve this problem, an In-Plane-Switching (IPS) mode using a parallel electric field has contrast, gray inversion, and color shift compared to the conventional TN mode. In the IPS mode, a pixel electrode and a common electrode are formed on the same plane on a thin film transistor array substrate, that is, a lower substrate, and a liquid crystal is formed on the lower substrate. It is operated by the horizontal electric field of the pixel electrode and the common electrode formed on the upper substrate is a substrate containing a color filter, the color filter is arranged in three colors of red, green, blue sequentially, pigment dispersion method, dyeing method, It is produced by methods such as electrodeposition.

1 is a partial plan view of a lower substrate of a conventional IPS mode LCD.

Referring to FIG. 1, a plurality of gate lines 111 and data lines 113 cross each other to define a pixel region P, and the pixel region P is provided in a matrix form on the lower substrate. The thin film transistor T, which is a switching element, is formed at the intersection of the gate line 111 and the data line 113. The thin film transistor T includes a gate electrode 119, a source electrode 121, and a drain electrode 123.

The common electrode 115 and the pixel electrode 117 are formed in a finger shape on the pixel region P defined by the intersection of the gate line 111 and the data line 113, respectively. 115 includes a vertical common electrode 115a, which is a plurality of vertical patterns, and a horizontal common electrode 115b, which is a horizontal pattern that integrates the plurality of vertical common electrodes into one, and is spaced apart from the gate line 111 by a predetermined interval. do.

In addition, the pixel electrode 117 formed to be engaged with the common electrode 115 is also a horizontal pixel electrode which is a horizontal pattern in which the vertical pixel electrodes 117a which are the plurality of vertical patterns and the plurality of vertical pixel electrodes 117a are integrated into one. 117b.

In the related art, the common electrode 115 is formed of the same material as the gate line 111 and formed on the layer in which the gate electrode 119 and the gate line 111 are formed. In this case, the common electrode 115 is formed. This is made of colored metal material has a disadvantage of lowering the aperture ratio.

Accordingly, in recent years, the common electrode 115 is formed of a transparent ITO electrode such as the pixel electrode 117, and the like is formed on the layer on which the pixel electrode 117 is formed, thereby increasing the aperture ratio. This is widely used.

2A to 2C, a manufacturing process of an IPS mode liquid crystal display device in which the common electrode 115 is formed of a transparent conductive metal will be described.

2A to 2C are cross-sectional views of the manufacturing process taken along the lines II and II of FIG. 1.

First, as illustrated in FIG. 2A, a conductive metal is deposited and patterned on the substrate 109 to form a gate line 111 and a gate electrode 119.

Next, an inorganic insulating material such as silicon nitride (SiNx) and silicon oxide (SiO ₂ ), or an acrylic resin, benzocyclobutene (BCB), etc., on the entire surface of the substrate 109 on which the gate line 111 is formed. The same organic insulating material is deposited to form the gate insulating layer 118.

Next, as shown in FIG. 2B, pure amorphous silicon (a-Si) and amorphous silicon (n + a-Si) containing impurities are stacked on the substrate on which the gate insulating layer 118 is formed, and then patterned to form an active layer. The layer 125 and the ohmic contact layer 127 are formed, and a conductive metal is deposited and patterned on the substrate on which the ohmic contact layer 127 is formed, thereby forming the data line 113, the source electrode 121, and the drain electrode 123. ).

Thereafter, BCB or an acrylic resin, which is a low dielectric material 129, is coated on the entire surface of the substrate on which the drain electrode 123 and the like are formed and patterned to form a drain contact hole 131 on the drain electrode 123.

FIG. 2C illustrates a process of forming a common electrode and a pixel electrode, and depositing and patterning a transparent conductive metal such as indium tin oxide (ITO), indium zinc oxide (IZO), and the like, and interlocking with each other at predetermined intervals. The common electrode 115 and the pixel electrode 117 are formed (the figures are the vertical pattern 115a of the common electrode 115 and the vertical pattern 117a of the pixel electrode 117).

However, in the conventional IPS mode liquid crystal display device, as the panel becomes larger, a common voltage applied to the common electrode is delayed toward the lower end of the panel, thereby degrading the image quality.

3 is a plan view schematically illustrating a lower substrate of the IPS mode LCD shown in FIG. 1.

As shown in FIG. 3, since the pixel region P illustrated in FIG. 1 is provided in a matrix form on the lower substrate, the common electrode 115 is also formed in a matrix form on the lower substrate 300. .

The same common voltage Vcom should be applied to the common electrode 115, and the common voltage Vcom is applied through the data pad 310 or the gate pad 320 on the substrate.                         

Recently, as the size of the panel becomes larger, the size of the lower substrate 300 also increases.

However, as described above, a high resistance ITO electrode or the like is used as the common electrode 115, and as the size of the panel becomes larger, a delay of the common voltage Vcom applied to the common electrode may occur. As a result, the image quality deteriorates toward the lower end area A of the panel.

According to the present invention, an auxiliary common electrode formed of a low resistance gate metal is formed under a common electrode formed of ITO, and the common electrode and the auxiliary common electrode are electrically connected at a predetermined point of the panel, thereby overcoming the common voltage delay phenomenon. An object of the present invention is to provide an electric field type liquid crystal display device and a method of manufacturing the same.

In order to achieve the above object, a transverse electric field type liquid crystal display device includes: a plurality of gate lines and data lines crossing a substrate to define a pixel area in a matrix form; A thin film transistor formed at a point where the gate line and the data line cross each other; A pixel electrode formed on the pixel area and connected to the thin film transistor and having a plurality of vertical patterns, the pixel electrode being made of a transparent conductive metal material; A common electrode made of a transparent conductive metal material forming a transverse electric field with the pixel electrode and overlapping the gate line, the data line and the thin film transistor; An auxiliary common electrode formed of a gate metal material formed under the common electrode; And a contact hole formed to electrically connect the common electrode and the auxiliary common electrode at a predetermined position of the substrate.

The transparent conductive metal may be indium tin oxide (ITO) or indium zinc oxide (IZO), and the gate metal may be a low resistance metal made of aluminum (AlNd), copper (Cu), or molybdenum (Mo). It features.

The common electrode may include a plurality of vertical patterns that are alternately arranged with each vertical pattern of the pixel electrode, and a horizontal pattern that integrates the plurality of vertical patterns into one, and the auxiliary common electrode is disposed below the horizontal pattern of the common electrode. It is characterized in that formed in a position overlapping.

Here, the auxiliary common electrode may be formed as a single line under a specific common electrode horizontal pattern, or may be formed as a plurality of lines respectively corresponding to the lower parts of all common electrode horizontal patterns.

In addition, a predetermined position of the substrate on which the contact hole is formed is a point at which the delay of the common voltage starts in the common voltage applied to the common electrode.

In addition, a method of manufacturing a transverse electric field type liquid crystal display device according to the present invention includes the steps of forming a gate line and an auxiliary common electrode on a substrate; Forming an insulating layer on the substrate on which the gate line and the auxiliary common electrode are formed, and forming a data line on the insulating layer; Forming a protective layer on the substrate on which the data line is formed, and forming a pixel electrode and a common electrode of a transparent conductive metal on the protective layer; And electrically connecting the common electrode and the auxiliary common electrode at a predetermined position of the substrate.                     

Here, the predetermined position of the substrate is a point at which the delay of the common voltage starts in the common voltage applied to the common electrode, and the common electrode and the auxiliary common electrode are electrically connected by a contact hole or a laser. It is characterized by being made by welding.

According to the present invention, the common voltage delay problem associated with the high resistance of the common electrode made of the ITO electrode is common to the minimum portion of the entire display area through the common voltage input of the auxiliary common electrode to which the low resistance metal is applied. It is possible to improve the brightness and quality of the large-area liquid crystal display device through the delay compensation contact hole or the laser welding of the electrode, and to realize the continuous large area of the liquid crystal display device in the future.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

4 is a plan view schematically illustrating a lower substrate of an IPS mode liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 4, the common electrode 520 is formed in a matrix on the lower substrate 400. In more detail, the common electrode 520 is formed in an upper region of a data line (not shown) and a gate line (not shown) formed on the lower substrate 400 to cross each other at right angles. And a center portion of the pixel region P defined by the data line.

In the related art, since the common electrode is made of a transparent conductive metal having a high resistance such as ITO, a common voltage applied to the common electrode in a large area panel is delayed.

In order to overcome this drawback, as shown in FIG. 4, a low resistance auxiliary common electrode 515 is formed below the common electrode 520. More specifically, the auxiliary common electrode 515 is described below. ) May be formed as one line below the specific common electrode 520 horizontal pattern, or may be formed as a plurality of lines respectively corresponding to the bottom of all the common electrodes 520 horizontal pattern.

4 illustrates that the auxiliary common electrode 515 is formed as a single line under a specific horizontal pattern of the common electrode 520 ', but is not limited thereto. As described above, all common electrodes 520 are horizontal. It may be formed of a plurality of lines respectively corresponding to the lower portion of the pattern.

The same common voltage Vcom is applied to the common electrode 520 and the auxiliary common electrode 515, and the common voltage Vcom is applied through the data pad part 410 or the gate pad part 420 on the substrate. .

In this case, the common voltage is not significantly delayed with respect to the common electrode 520 and the auxiliary common electrode 515 at the front end of the panel to which the voltage is applied, but as the size of the panel becomes larger, the lower end of the panel Towards the region B, a phenomenon in which the common voltage applied to the high resistance common electrode 520 is delayed compared to the common voltage applied to the low resistance auxiliary common voltage 515 occurs.

The present invention forms a contact hole at a specific point (C) at which the delay of the common voltage starts to overcome the delay of the common voltage, or uses the laser welding to form the common electrode 520 and the auxiliary common electrode. 515 is electrically connected.

That is, the auxiliary common electrode 515 of one line shown in FIG. 4 has a lower portion of the lower panel of the panel in which the delay of the common voltage is started to overcome the problem caused by the delay of the common voltage applied to the common electrode 520. It may be formed only up to a specific point C of the lower end of the panel through which a specific point C passes or is electrically connected to the common electrode, that is, a delay of the common voltage is started.

As a result, a signal transmitted without delay through the auxiliary common voltage of low resistance to the lower region of the panel is applied to the lower region of the panel, thereby reducing the disadvantage of the conventional large-area IPS mode liquid crystal display, that is, the image quality due to the delay of the common voltage. The degradation problem can be overcome.

FIG. 5 is a plan view illustrating some pixel areas of the IPS mode liquid crystal display according to the present invention including the specific point C of FIG. 4.

Referring to FIG. 5, a gate line 511 and a data line 513 cross each other on a lower substrate, and an auxiliary common electrode 515 is formed in parallel with the gate line 511 in one direction.

At this time, the auxiliary common electrode 515 is made of the same material as the gate metal 511 and the gate metal, and the gate metal is aluminum based (AlNd) or copper (Cu) or molybdenum (Mo). Use low resistance metal.

Further, a thin film as a switching element connected to the gate line 511 and the data line 513 to define a pixel region P, and intersecting the gate line and the data line on the pixel region P, respectively. A transistor (hereinafter TFT) 517 is provided.

Here, the common electrode 520 and the pixel electrode 522 made of a transparent conductive metal material such as ITO or IZO are formed on the pixel region P. The pixel electrode 522 may include a drain electrode of the TFT 517. Electrically connected, a plurality of vertical patterns 522a are provided.

Accordingly, the common electrode 520 includes a plurality of vertical patterns 520a and the plurality of vertical patterns 520a that are alternately arranged with each vertical pattern 522a of the pixel electrode 522 on the pixel region P. A horizontal pattern to be integrated is provided and is formed in an area overlapping the gate line 511, the data line 513, and the TFT 517 outside the pixel area P.

In this case, the auxiliary common electrode 515 is formed to be narrower than the width of the common electrode horizontal pattern 520b at a position overlapping the bottom of the horizontal pattern 520b of the common electrode. This is to minimize the reduction of the aperture ratio since the auxiliary common electrode 515 is formed of colored metal.

In the vertical pattern 520a of the common electrode formed on the pixel region P and the vertical pattern 522a of the pixel electrode adjacent thereto, the transverse electric field is distributed by the voltage applied to each of them, and according to the intensity of the electric field An image is displayed by varying the degree of arrangement of the liquid crystals, and thus, a region between the common electrode and the pixel electrode, that is, a region where light is selectively transmitted through the change of the liquid crystal arrangement by applying a transverse electric field is called a display region.                     

At this time, the common voltage Vcom applied to the common electrode 520 and the auxiliary common electrode 515 is applied with the same magnitude to the common electrode and the auxiliary common electrode, and the pixel region P shown in FIG. As described with reference to FIG. 4, the contact hole 540 is formed to electrically connect the common electrode and the auxiliary common electrode in the present invention because it corresponds to a point where a delay of the common voltage occurs on the large area panel.

That is, the position where the contact hole 540 is formed corresponds to a point at which the delay of the common voltage starts in the common voltage applied to the common electrode 520.

In addition, the contact hole 540 should be formed at a position spaced apart from the data line by a predetermined interval so as not to be shorted with the data line 513.

Here, the auxiliary common electrode 515 may be formed as one line under a specific common electrode horizontal pattern 520b where the delay of the common voltage starts, but is not limited thereto. It may be formed of a plurality of lines respectively corresponding to the lower portion.

As a result, the common voltage can be applied to the lower region of the panel through the auxiliary common electrode 515 without delay, thereby degrading the image quality due to the delay of the common voltage. You can overcome the problem.

In addition, in the exemplary embodiment, a contact hole 540 is formed in a protective layer (not shown) between the common electrode and the auxiliary common electrode to electrically connect the contact hole 540, and laser welding is performed in addition to the contact hole 540. The common electrode 520 and the auxiliary common electrode 515 may be electrically connected by using the same.

6A to 6C are cross-sectional views of the manufacturing process taken along line III-III of FIG. 5.

First, as illustrated in FIG. 6A, a conductive metal is deposited and patterned on a transparent insulating substrate 600 to form a gate line (not shown), a gate electrode 610, an auxiliary common electrode 612, and the like. In this case, as the conductive metal, low resistance aluminum series (AlNd), copper (Cu), molybdenum (Mo), or the like is used.

Next, an inorganic insulating material such as silicon nitride (SiNx) and silicon oxide (SiO ₂ ), or an acrylic resin, benzocyclobutene (BCB), etc., on the entire surface of the substrate 600 on which the gate electrode 610 is formed. A gate insulating film 620 is formed by depositing the same organic insulating material.

Next, as shown in FIG. 6B, pure amorphous silicon (a-Si) and amorphous silicon (n + a-Si) containing impurities are stacked on the substrate on which the gate insulating film 620 is formed, and then a data line or the like. And depositing a conductive metal to form the active layer and patterning the active layer 622 and the ohmic contact layer 624, and forming a data line (not shown), a source electrode 626, a drain electrode 628, and the like. do.

Referring to FIG. 6C, a protective layer 630 is formed by applying BCB or an acrylic resin, which is a low dielectric material, on the entire surface of the substrate on which the data line (not shown) and the like are formed, and a transparent conductive metal on the protective layer. A pixel electrode and a common electrode of material are formed.

That is, a transparent conductive metal such as indium tin oxide (ITO), indium zinc oxide (IZO), and the like is deposited and patterned, and the common electrode 634 and the pixel electrode 632 in the form of fingers interdigitated with a predetermined interval therebetween. ) Will be formed.

In this case, the pixel electrode 632 is electrically connected to the drain electrode 628 by the contact hole 640 of the passivation layer 630 formed on the drain electrode 628 and the common electrode 634. ) Is electrically connected to the insulating layer 620 and the protective layer 630 formed on the auxiliary common electrode 612 by a contact hole 642 formed by opening a predetermined region.

Here, the position of the contact hole 642 formed on the auxiliary common electrode 612 is a point at which the delay of the common voltage starts on the panel in the common voltage applied to the common electrode 634.

In addition, the contact hole 642 should be formed at a position spaced apart from the data line so as not to be shorted with the data line 513 of FIG. 5.

Here, the auxiliary common electrode 612 may be formed as one line under the specific common electrode horizontal pattern 520b where the delay of the common voltage starts when referring to FIGS. 4 and 5. The present invention is not limited thereto and may be formed of a plurality of lines respectively corresponding to lower portions of all common electrode horizontal patterns.

As a result, the common voltage can be applied to the lower region of the panel through the auxiliary common electrode without delay, thereby overcoming the disadvantage of the conventional large area IPS mode liquid crystal display, that is, the problem of deterioration in image quality due to the delay of the common voltage. You can do it.                     

In the embodiment, a contact hole is formed in the protective layer between the common electrode and the auxiliary common electrode to be electrically connected thereto. However, the common electrode and the auxiliary common electrode are connected to each other using laser welding in addition to the contact hole. It can also be electrically connected.

According to the transverse electric field type liquid crystal display device and a method of manufacturing the same, a common voltage delay problem associated with a high resistance of a common electrode composed of ITO electrodes is applied to a common voltage input of an auxiliary common electrode to which a low resistance metal is applied. Through the delay compensation contact hole or laser welding of the ITO common electrode in the minimum part of the entire display area, the luminance and quality of the large-area liquid crystal display device can be improved and the continuous large area of the liquid crystal display device can be realized in the future. There is this.

Claims (10)

In the lower substrate of the panel forming the transverse electric field liquid crystal display device, A plurality of gate lines and data lines crossing the lower substrate to define pixel regions in a matrix form; A thin film transistor formed at a point where the gate line and the data line cross each other; A pixel electrode formed on the pixel region and connected to the thin film transistor and having a plurality of vertical patterns and having a plurality of vertical patterns; A common electrode made of a transparent conductive metal material forming a transverse electric field with the pixel electrode and overlapping the gate line, the data line and the thin film transistor; An auxiliary common electrode formed of the same metal material as the gate line formed under the common electrode; A contact hole formed to electrically connect the common electrode and the auxiliary common electrode, The position of the substrate on which the contact hole is formed is formed at a point where the delay of the common voltage at the edge of the panel opposite to the region where the common voltage is applied is common voltage applied to the common electrode. A transverse electric field type liquid crystal display device. The method of claim 1, The transparent conductive metal is an indium tin oxide (ITO) or indium zinc oxide (IZO) characterized in that the transverse electric field type liquid crystal display device. The method of claim 1, And the gate line and the auxiliary common electrode are aluminum based or low resistance metal of copper (Cu) or molybdenum (Mo). The method of claim 1, And the common electrode includes a plurality of vertical patterns arranged alternately with each vertical pattern of the pixel electrode, and a horizontal pattern integrating the plurality of vertical patterns into one. The method of claim 4, wherein And the auxiliary common electrode is formed at a position overlapping a lower portion of the horizontal pattern of the common electrode. The method of claim 5, And the auxiliary common electrode is formed as a single line under a specific common electrode horizontal pattern or a plurality of lines respectively corresponding to a lower portion of all common electrode horizontal patterns. delete In the lower substrate of the panel forming the transverse electric field liquid crystal display device, Forming a gate line and an auxiliary common electrode on the lower substrate; Forming an insulating layer on the substrate on which the gate line and the auxiliary common electrode are formed, and forming a data line on the insulating layer; Forming a protective layer on the substrate on which the data line is formed, and forming a pixel electrode and a common electrode of a transparent conductive metal material on the protective layer; A contact hole in which the common electrode and the auxiliary common electrode are electrically connected to the protective layer is formed, and a position of the substrate on which the contact hole is formed is a common voltage applied to the common electrode, where the common voltage is applied. And a position at which the delay of the common voltage at the edge of the panel opposite to the region to be started is formed. delete The method of claim 8, And wherein the common electrode and the auxiliary common electrode are electrically connected to each other by a contact hole or by laser welding.

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