KR101056012B1 - Liquid crystal display device and manufacturing method thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a configuration of a liquid crystal display device having a color filter and a column spacer on an array substrate, and a manufacturing method thereof.

The liquid crystal display according to the present invention has the same size as that of the first column spacer and the first column spacer in the liquid crystal display device having the color filter configured in the thin film transistor array unit, but the liquid crystal display device. In the structure of a dual column spacer constituting a second column spacer having a predetermined gap from the first or second substrate of the display device, the upper column corresponding to the first column spacer is blocked. It is characterized by forming the protrusions using the layer. In this case, the first column spacer serves to maintain a gap between the first substrate and the second substrate of the liquid crystal display using the protrusion, and the second column spacer has a liquid crystal defect rather than a function of maintaining the gap. Prevents the function.

In the above-described configuration, due to the second column spacer, the liquid crystal is pushed to the lower portion of the liquid crystal panel, thereby preventing gravity defects or crushing spots in which the lower portion is convex.

Description

LCD and its manufacturing method {LCD with color-filter on TFT and method of fabricating of the same}             

1 is an exploded perspective view schematically illustrating a configuration of a general liquid crystal display device;

2 is a cross-sectional view schematically showing a configuration of a liquid crystal display according to the related art.

3 is an enlarged plan view schematically showing one pixel of an array substrate for a liquid crystal display device according to the present invention;

4 to 9 are process cross-sectional views illustrating a method of manufacturing an array substrate for a liquid crystal display device according to a first embodiment of the present invention, in order of process;

10 is a cross-sectional view showing the configuration of an upper substrate for a liquid crystal display device according to the present invention;

11 is a cross-sectional view showing the configuration of a COT structure liquid crystal display device according to a first embodiment of the present invention;

12 is a cross-sectional view showing the configuration of a TOC structure liquid crystal display device according to a second embodiment of the present invention;

13 is a cross-sectional view showing the configuration of a TOC structure liquid crystal display device according to a third embodiment of the present invention.

<Brief description of the main parts of the drawing>

100: first substrate 102: gate wiring

104: gate electrode 106: gate insulating film

108: active layer 110: ohmic contact layer

112 source electrode 114 drain electrode

116: data wiring 118: protective film

120b: color filter 122: planarization film

126 pixel electrode 128 lower alignment layer

130: first column spacer 132: second column spacer

200: second substrate 202: black pattern

204: common electrode 206: upper alignment layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device including a color filter, a black matrix, and a dual column spacer on an array substrate, and a manufacturing method thereof.                         

In general, a liquid crystal display device displays an image by using optical anisotropy and birefringence characteristics of liquid crystal molecules. When an electric field is applied, the alignment of liquid crystals is changed, and the characteristics of light transmission vary according to the arrangement direction of the changed liquid crystals.

In general, a liquid crystal display device is formed by arranging two substrates on which electric field generating electrodes are formed so that the surfaces on which the two electrodes are formed face each other, injecting a liquid crystal material between the two substrates, and then applying a voltage to the two electrodes. By moving the liquid crystal molecules by the electric field is a device that represents the image by the transmittance of light that varies accordingly.

1 is a view schematically showing a liquid crystal display according to the related art.

As shown, a general color liquid crystal display 11 includes a color filter 7 and a color filter 7 including a black matrix 6 formed between a sub color filter 8 and each sub color filter 8. The upper substrate 5 having the common electrode 18 deposited thereon, the pixel region P, and the pixel electrode 17 and the switching element T formed in the pixel region, and the pixel region P The liquid crystal 14 is filled between the lower substrate 22 and the upper substrate 5 and the lower substrate 22 on which array wiring is formed.

The lower substrate 22 is also referred to as an array substrate, and the thin film transistor T, which is a switching element, is positioned in a matrix type, and the gate wiring 13 passing through the plurality of thin film transistors T is crossed. ) And data wirings 15 are formed.

In this case, the pixel area P is an area defined by the gate line 13 and the data line 15 crossing each other, and a transparent pixel electrode 17 is formed on the pixel area P as described above.

The pixel electrode 17 uses a transparent conductive metal having a relatively high transmittance of light, such as indium-tin-oxide (ITO).

A storage capacitor C _ST connected in parallel with the pixel electrode 17 is formed on the gate wiring 13, and a part of the gate wiring 13 is used as the first electrode of the storage capacitor C _ST . As the second electrode, an island-shaped metal pattern 30 formed of the same material as the source and drain electrodes is used.

In this case, the metal pattern 30 is configured to be in contact with the pixel electrode 17 to receive a signal of the pixel electrode.

Although not shown in the above configuration, a spacer is formed between the first substrate 22 and the second substrate 50 to maintain a gap between the two substrates. The spacer comprises a spherical spacer or a color filter substrate and a columnar spacer formed directly on the array substrate.

Recently, when the column spacer is configured, a first column spacer having a function of maintaining a gap between the first substrate and the second substrate, and a space having a predetermined gap with the first and second substrates are formed. As a result, a configuration of forming a so-called dual column spacer having a second column spacer, which serves to widen the margin of the liquid crystal by flowing the liquid crystal, has been proposed.

This will be described below with reference to FIG. 2.

2 is an enlarged cross-sectional view illustrating a configuration of a liquid crystal display according to the related art.

As illustrated, the first substrate 22 is defined as the pixel areas P1, P2, and P3 including the switching area S and the storage area ST.

In the switching region S, a thin film transistor T including a gate electrode 32, an active layer 34, a source electrode 36, and a drain electrode 38 is formed, and the pixel regions P1, P2, and P3. ), A transparent pixel electrode 17 is formed.

In the storage area ST, the gate wiring 13 is used as the first electrode, and the metal pattern 30 formed in an island shape on the gate wiring 13 and in contact with the pixel electrode 17 is second. A storage capacitor C _ST serving as an electrode is configured.

In this case, the storage capacitor C _ST may be configured in various structures and shapes.

On one surface of the second substrate 5 spaced apart from each other with the first substrate 22 and the liquid crystal layer 14 interposed therebetween, the thin film transistor T, the gate wiring, and the data wiring 13 and 15 may correspond to each other. The black matrix 6 is formed, and the color filters 7a, 7b, and 7c are formed on the surface corresponding to the pixel areas P1, P2, and P3.

A transparent common electrode 18 is formed on the entire surface of the substrate 22 including the color filters 7a, 7b, and 7c and the black matrix 6.                         

In the above-described configuration, first and second column spacers 20a and 20b are formed under the common electrode 18 corresponding to the thin film transistor T and a part of the pixel region P. FIG.

The first and second column spacers 20a and 20b are evenly formed on the entire surface of the second substrate 5, and the first column spacer 20a and the second column spacer 20b are manufactured in the same process. Because of the same length.

In this case, the first column spacer 20 serves to maintain a gap between the two substrates 5 and 22, and the second column spacer 22 has a predetermined gap with the substrate 22. In order to be positioned, the first column spacer 20a is formed in the protruding step portion.

Accordingly, the first column spacer 20a is configured to correspond to the thin film transistor T, that is, the high stepped portion, thereby directly maintaining a gap between the first substrate 22 and the second substrate 5. Since the second column spacer 20b is not formed in a high stepped portion such as the thin film transistor T, the second column spacer 20b may be formed with a predetermined distance from the lower substrate.

Since the second column spacer 20b is spaced apart from the first substrate or the second substrates 22 and 5 by a predetermined interval, when the liquid crystal is excessively filled, the second column spacer 20b and the substrate 22 Because the liquid crystal can be filled into the space between them, the liquid crystal can minimize the gravity defect flowing to the lower part of the panel, and when the pressure is applied to the panel, it can act as a resistance component to the liquid crystal panel. This will prevent the function.                         

In addition, the function to widen the margin for filling the liquid crystal.

The first substrate 22 and the second substrate 5 described above are manufactured separately, and the process of attaching each other is completed when each production is completed.

However, in the liquid crystal display device configured as described above, adhesion misalignment may occur in the process of bonding the two substrates. In this case, the position of the black matrix 6 may deviate from the originally designed position, and thus, the thin film transistor T Light enters to generate a leakage current, and a region corresponding to the gate and data lines 13 and 15, that is, a region A spaced apart from the data line 15 and the pixel electrode 17 and the gate line ( There is a problem in that light leakage occurs in the area B spaced apart from the pixel electrode 17.

Therefore, conventionally, in order to solve this problem, in consideration of an error in the bonding process, the additional design margin is added to the initial design.

That is, the size of the black matrix 6 is designed to be larger.

In this way, the above defects do not occur even when a bonding error occurs.

However, since there is a problem of encroaching on the opening area by that much, there is a problem that the luminance and the opening ratio are reduced.

The present invention has been proposed for the purpose of solving the above-mentioned problem, characterized in that the color filter and the black matrix is formed on the lower substrate.                         

The first structure of the present invention relates to a color filter on TFT (COT) structure in which a color filter is formed on an upper portion of a thin film transistor array, in which a black pattern is formed on an upper substrate corresponding to a part of a pixel region. The first column spacer is formed by forming a high step and maintaining a gap in the corresponding lower substrate.

The second column spacer may be formed to be spaced apart from the upper color filter substrate.

The second structure of the present invention relates to a TFT on color filter (TOC) having a thin film transistor array unit formed on an upper portion of a color filter, wherein the first column spacer is formed corresponding to the step of the thin film transistor, and a part of the pixel region is formed. In response to the second column spacer is configured.

In the TOC and COT structures as described above, since the color filter and the black matrix are formed on the lower substrate, the opening area can be further secured by the bonding margin, and the liquid crystal is filled by securing the fluidity of the liquid crystal through the second column spacer. In this case, the margin of the liquid crystal can be increased, thereby preventing gravity defects that may occur due to the overfilling of the liquid crystal.

In addition, when pressure is applied to the liquid crystal panel, the second column spacer provides an resistance thereto, thereby minimizing a crushing stain that damages the liquid crystal panel.

According to an aspect of the present invention, there is provided a CIO structure liquid crystal display device comprising: a first substrate and a second substrate; A gate wiring and a data wiring defining a pixel area by vertically crossing each other on one surface of the first substrate facing the second substrate; A switching element configured at an intersection point of the gate line and the data line; A black matrix formed at an upper portion corresponding to the switching element; A color filter configured in the pixel region; A planarization film formed on the color filter and having a flat surface; A transparent pixel electrode positioned over the planarization layer and in contact with the switching element; A first column spacer configured to correspond to the switching element, a second column spacer configured to correspond to a part of the pixel region; A black pattern configured to correspond to the first column spacer or the second column spacer on one surface of the second substrate facing the first substrate; And a transparent common electrode formed on an entire surface of the second substrate including the black pattern, wherein the first and second column spacers have the same height, and correspond to the black pattern of the first and second column spacers. The column spacer formed at a portion thereof is configured to be in contact with a component provided on the innermost top layer of the second substrate.

The column spacer configured to correspond to the black pattern among the first column spacer and the second column spacer serves to maintain a gap between the first substrate and the second substrate, and the other column spacer is formed with the second substrate. It is characterized by being configured with a spaced apart area.

The height of the black pattern is characterized by consisting of a value in the range of 0.1㎛ ~ 0.4㎛.

According to an aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device having a CIO structure, comprising: preparing a first substrate and a second substrate; Forming gate lines and data lines on one surface of the first substrate facing the second substrate to vertically cross each other to define pixel regions; Forming a switching element configured at an intersection point of the gate line and the data line; Forming a black matrix formed thereon corresponding to the switching element; Forming a color filter in the pixel region; Forming a planarization film having a flat surface on the color filter; Forming a transparent pixel electrode on the planarization layer and above the color filter and in contact with the switching element; Forming a first column spacer and a second column spacer corresponding to a portion of the pixel region in correspondence with the switching element; Forming a black pattern on one surface of the second substrate facing the first substrate, corresponding to the first column spacer or the second column spacer; And forming a transparent common electrode on a front surface of the second substrate including the black pattern, wherein the first and second column spacers are formed to have the same height, and the black of the first and second column spacers is formed. The column spacer formed in a portion corresponding to the pattern is formed in contact with the components provided on the uppermost layer of the inner surface of the second substrate.

According to a first aspect of the present invention, there is provided a liquid crystal display device having a TOS structure, comprising: a first substrate and a second substrate on which a switching region and a plurality of pixel regions are defined; A black matrix configured in the switching region of the first substrate facing the second substrate; A color filter configured in the pixel region; Gate wiring and data wiring formed on one side of the pixel region including the color filter and the other side perpendicular to the pixel region; A switching element configured on the black matrix; An organic insulating film having a flat surface over the switching element; A transparent pixel electrode in contact with the switching element over the organic insulating layer; A first column spacer configured to correspond to the switching element, a second column spacer configured to correspond to a part of the pixel region; A black pattern formed on an inner surface of the second substrate facing the first substrate, the black pattern corresponding to the first column spacer or the second column spacer; A transparent common electrode configured to cover the black pattern on the front surface of the second substrate including the black pattern, wherein the first and second column spacers are formed to have the same height, and the first and second columns The column spacer formed on a portion of the spacer corresponding to the black pattern is formed to contact the component provided on the uppermost layer of the inner surface of the second substrate.

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According to an embodiment of the present invention, there is provided a method of manufacturing a liquid crystal display device having a TOS structure; Forming a black matrix in a switching region of the first substrate facing the second substrate; Forming a color filter in the pixel region; Forming a gate line and a data line on one side of the pixel area where the color filter is formed and the other side perpendicular thereto; Forming a switching element on top of the black matrix; Forming an organic insulating film having a flat surface over the switching element; Forming a transparent pixel electrode on the organic insulating layer and in contact with the switching element corresponding to the pixel region; Forming a first column spacer corresponding to the switching element and a second column spacer corresponding to a portion of the pixel region; Forming a black pattern on an inner surface of the second substrate facing the first substrate corresponding to the first column spacer or the second column spacer; Forming a transparent common electrode covering the black pattern on the entire surface of the second substrate including the black pattern, wherein the first and second column spacers are formed to have the same height, and the first and second The column spacer formed on a portion of the two column spacers corresponding to the black pattern may be formed to contact the component provided on the uppermost layer of the inner surface of the second substrate.

According to a second aspect of the present invention, a T.O.C structure liquid crystal display device includes: a first substrate and a second substrate on which a switching region and a plurality of pixel regions are defined; A black matrix configured in the switching region of the first substrate facing the first substrate; A color filter configured in the pixel region; Gate wiring and data wiring formed on one side of the pixel region including the color filter and the other side perpendicular to the pixel region; A switching element configured on the black matrix;

An inorganic insulating film formed on the entire surface of the substrate on which the switching element is formed; A transparent pixel electrode in contact with the switching element; A transparent common electrode formed on one surface of the second substrate facing the first substrate; And a first column spacer configured to correspond to the switching element on the common electrode, and a second column spacer configured to correspond to a portion of the pixel region.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

First Embodiment

The present invention provides a liquid crystal display device having a COT structure in which a color filter is formed in a thin film transistor array unit, wherein a black pattern is formed on an upper substrate to form a convex step, and a gap of the liquid crystal display device is maintained at a portion corresponding to the step. The first column spacer may be configured, and a second column spacer configured to have a predetermined gap with the upper substrate may be formed at a portion having no step difference.

3 is an enlarged plan view showing a part of an array substrate having a color filter according to the present invention.

As shown in the drawing, the gate wiring 102 is formed on the substrate 100 in one direction, and the data wiring 116 is formed to define the pixel region P while crossing the gate wiring 102 perpendicularly.

At the intersection of the gate wiring 102 and the data wiring 116, the gate electrode 104 connected to the gate wiring 102, the semiconductor layer 108 and the semiconductor layer 108 formed on the gate electrode 104 are disposed. A thin film transistor T including a source electrode 112 connected to the data line 116 and a drain electrode 114 spaced apart from the data line 116 is formed.

Color filters 120a, 120b, and 120c and pixel electrodes 126 are formed in the pixel region P, and the black matrix is formed by the thin film transistor T and the gate wiring and the data wiring 102 and 116. Form BM).

In the above configuration, the first column spacer 130 and the second column spacer 132 are configured to correspond to the portion corresponding to the thin film transistor T and the portion of the pixel region P. FIG.

Hereinafter, a manufacturing process of an array substrate for a liquid crystal display device having a COT structure according to a first embodiment of the present invention will be described with reference to the process cross section.

4 to 9 illustrate a method of manufacturing an array substrate for a COT structure liquid crystal display device according to a first embodiment of the present invention. FIG. 4 is a cross-sectional view illustrating a process sequence by cutting along line IV-IV of FIG. 3. to be.

As illustrated in FIG. 4, the pixel region P including the switching region S is defined on the substrate 100.

Aluminum (Al), aluminum alloy (AlNd), copper (Cu), tungsten (W), chromium (Cr), molybdenum (Mo), etc. may be formed on the substrate 100 in which the plurality of regions S and P are defined. Depositing and patterning one or more materials selected from the group of conductive metals including the gate metal 102 and the switching region while being connected to the gate wiring 102 along one side of the pixel region P A gate electrode 104 positioned at (S) is formed.

Next, one selected from the group of inorganic insulating materials including silicon nitride (SiN _X ) and silicon oxide (SiO ₂ ) is deposited on the entire surface of the substrate 100 on which the gate wiring 102 and the gate electrode 104 are formed. The gate insulating film 106 is formed.

Next, pure amorphous silicon (a-Si: H) and amorphous silicon (n + a-Si: H) containing impurities are successively deposited on the entire surface of the substrate 100 on which the gate insulating layer 106 is formed, and the pattern is formed. Thus, an active layer 108 and an ohmic contact layer 110 are formed on the gate insulating layer 106 corresponding to the gate electrode 104.

As shown in FIG. 5, aluminum (Al), aluminum alloy (AlNd), chromium (Cr), tungsten (W), and molybdenum (Al) on the entire surface of the substrate 100 on which the active and ohmic contact layers 108 and 110 are formed. Depositing and patterning one or more materials selected from the group of conductive metals including Mo, copper (Cu), molybdenum (MoW), titanium (Ti), and the like, to form a predetermined upper portion of the ohmic contact layer 110. Source and drain electrodes 112 and 114 spaced apart from each other are formed.

At the same time, a data line 116 connected to the source electrode 114 and perpendicularly intersecting with the gate line 102 is formed.

As shown in FIG. 6, one selected from the group of inorganic insulating materials including silicon nitride (SiN _X ) and silicon oxide (SiO ₂ ) on the entire surface of the substrate 100 on which the source and drain electrodes 112 and 114 are formed. More material is deposited to form the protective film 118.

The black resin is coated on the entire surface of the substrate 100 on which the passivation layer 118 is formed, and then patterned to form a black matrix BM on an upper portion of the source and drain electrodes 112 and 114. .

At the same time, the black matrix BM may be formed on the upper portion corresponding to the gate line 102 and the data line 116.

Next, the color filter 120b is formed corresponding to the pixel area P. Next, as shown in FIG.

The color filter 120b sequentially forms red, green, and blue color filters in a predetermined order, corresponding to the plurality of pixel areas P. FIG.

As shown in FIG. 7, inorganic insulation including benzocyclobutene (BCB) and acrylic resin (resin) on the entire surface of the substrate 100 on which the black matrix BM and the color filter 120b are formed. The planarization layer 122 is formed by depositing one or more materials selected from the group of materials.

Next, the planarization layer 122 and the lower passivation layer 114 are patterned to form a drain contact hole 124 exposing a part of the drain electrode 114.

As shown in FIG. 8, indium tin oxide (ITO) and indium zinc oxide (IZO) are formed on the entire surface of the substrate 100 on which the planarization film 122 exposing a part of the drain electrode 116 is formed. A selected one of the transparent conductive metal group including a is deposited and patterned to form a pixel electrode 126 positioned in the pixel region P while contacting the drain electrode 116.

As shown in FIG. 9, a polyimide is coated on the entire surface of the substrate 100 on which the pixel electrode 126 is formed to form an alignment layer 128.

The alignment layer 128 may not be formed in some cases.

Next, a resin is coated on the alignment layer 128 and patterned to form a first column spacer on an upper portion corresponding to the source and drain electrodes 112 and 114 and a portion of the pixel region P, respectively. 130 and the second column spacer 132 are formed.

Through the process as described above, it is possible to manufacture an array substrate for a liquid crystal display device having a COT structure according to the present invention.

Hereinafter, a method of manufacturing the upper substrate bonded to the above-described array substrate with reference to the drawings.

10 is a cross-sectional view showing the configuration of an upper substrate for a liquid crystal display device having a COT structure according to the present invention.

As shown, the array substrate (not shown) by depositing and patterning one selected from the group of metals having low reflection properties including chromium (Cr) and chromium oxide (CrO _X ) on the transparent insulating substrate 200 The black pattern 202 is formed in the region corresponding to the second column spacer 132 of FIG.

At this time, the height of the black pattern 202 is formed to have a value within the range of 0.1㎛ ~ 0.4㎛.                     

The common electrode 204 is formed by depositing one selected from a group of transparent conductive metals including indium tin oxide (ITO) and indium zinc oxide (IZO) on the entire surface of the substrate 200 on which the black pattern 202 is formed. To form.

The alignment layer 206 is formed by depositing polyimide on the entire surface of the substrate 200 on which the common electrode 204 is formed.

The alignment layer 206 may not be formed.

The upper substrate may be manufactured by the process as described above.

When the upper substrate and the array substrate manufactured as described above are bonded to each other, a cross-sectional configuration as shown in FIG. 11 can be obtained.

11 is a cross-sectional view showing the configuration of a COT structure liquid crystal display device according to a first embodiment of the present invention.

The liquid crystal display (LCD) of the COT structure according to the present invention is formed by bonding the lower substrate 100 on which the thin film transistor array unit and the color filter are formed, and the upper substrate 200 on which the black patterns and the common electrodes 202 and 204 are formed.

In detail, the lower substrate 100 includes a thin film transistor T including the gate electrode 104, the semiconductor layer 108, the source electrode, and the drain electrodes 112 and 114 in the switching region S, and the pixel. In the region P, a color filter 120b and a pixel electrode 126 in contact with the drain electrode 114 are formed.

The black matrix BM is formed in an area corresponding to the thin film transistor T, the gate lines, and the data lines 102 and 116.                     

In addition, a first column spacer 130 and a second column spacer 132 are formed to correspond to a portion of the thin film transistor T and the pixel region P, respectively.

A black pattern 202 having a height in the range of 0.1 μm to 0.4 μm is formed in an area corresponding to the first column spacer 130 or the second column spacer 132 on the upper substrate 200.

In the drawing, an example in which the black pattern 202 is configured to correspond to the second column spacer 132 is illustrated.

Next, a transparent common electrode 204 is formed on the entire surface of the upper substrate 200 on which the black pattern 202 is formed, and the alignment layer 206 is selectively formed on the entire surface of the substrate 200 on which the common electrode 204 is formed. Configure

In the above-described configuration, the second column spacer 132 is formed on the portion corresponding to the black pattern 202, so that the second column spacer 132 is formed of the upper substrate 200 and the lower substrate 100. While maintaining the gap of the first layer spacer 130 configured to correspond to the thin film transistor, the upper substrate 200 by the height (0.1 μm to 0.4 μm) of the black pattern 202. ) So that there is a space between them.

Therefore, it is possible to prevent the gravity failure of the liquid crystal by the first column spacer 130, it is also possible to prevent the crushing stain.

In the above-described configuration, as mentioned above, the black pattern 202 may be formed in a region corresponding to the first column spacer 130. In this configuration, the first column spacer 130 actually serves to maintain a gap between the first substrate 100 and the second substrate 200.

As described above, the liquid crystal display device having the COT structure according to the first embodiment of the present invention can be manufactured.

Hereinafter, the modification of the first embodiment will be described with the second embodiment.

Second Embodiment

A feature of the second embodiment of the present invention is that in the structure of the first embodiment described above, the color filter and the black matrix are configured under the thin film transistor array unit.

FIG. 12 is a schematic cross-sectional view of a liquid crystal display device having a TFT on color filter (TOC) structure according to a second embodiment of the present invention.

As illustrated, a black matrix 302 is formed on the lower substrate 300 on which the pixel regions P1 and P2 including the switching region S are defined.

Color filters 304a and 304b are formed in the pixel areas P1 and P2. The color filters 304a and 304b sequentially configure red, green, and blue color filters corresponding to the plurality of pixel areas P1 and P2.

The planarization layer 306 is formed on the entire surface of the substrate 300 including the black matrix 302 and the color filters 304a and 304b.                     

The planarization layer 306 is formed by depositing one or more materials selected from the group of organic insulating materials including benzocyclobutene (BCB) and an acrylic resin.

The semiconductor layer 314 and the semiconductor layer 314 with the gate electrode 308 and the gate electrode 308 interposed between the gate electrode 308 and the gate electrode 308 on the planarization film 306 corresponding to the switching region S. A thin film transistor T including a source electrode 316 and a drain electrode 318 is formed on the upper side of the top surface.

In addition, a gate line 310 and a data line (not shown) are formed on one side of the pixel areas P1 and P2 and the other side perpendicular thereto.

A pixel is formed on the entire surface of the substrate 300 on which the thin film transistor T is formed by applying the aforementioned organic insulating material to form a passivation layer 320 and contacting the drain electrode 318 on the passivation layer 320. An electrode 322 is formed.

An alignment layer may or may not be formed on the pixel electrode.

The first column spacer 326 and the second column spacer 328 are formed to correspond to the thin film transistor T and a part of the pixel region P, respectively.

In this case, since the passivation layer 324 formed on the thin film transistor T is formed of an organic insulating material, the surface of the thin film transistor T may be planarized.

Therefore, a protrusion must be formed to position one of the first column spacer 326 or the second column spacer 328 spaced apart from the substrate.                     

To this end, a black pattern is formed on one surface of the upper substrate 400 bonded to the lower substrate 300 in a region corresponding to the second column spacer 328.

The black pattern 402 may be formed to correspond to either the first column spacer 326 or the second column spacer 328.

A transparent common electrode 404 is formed on the entire surface of the substrate 400 on which the black pattern 402 is formed.

An alignment layer 406 is formed under the transparent common electrode 404. In this case, the alignment layer 406 may not be formed.

In the above-described configuration, the second column spacer 328 is positioned in a region corresponding to the protrusion of the black pattern, and serves to maintain a gap between the lower substrate 300 and the upper substrate 400. The first column spacer 326 is spaced apart from the upper substrate 400 by the height (0.1 μm˜0.4 μm) of the black pattern 202.

In the above-described configuration, the black pattern 402 may be formed in a region corresponding to the first column spacer 326. In this configuration, the first column spacer 326 actually serves to maintain a gap between the first substrate 300 and the second substrate 400.

As mentioned in the first embodiment, due to the presence of the second column spacer 326, it is possible to prevent the poor gravity and crushing stain.

Third Embodiment

A feature of the third embodiment of the present invention is that, in the configuration of the second embodiment, the protective film is formed of an inorganic insulating film rather than an organic film.

FIG. 13 is a schematic cross-sectional view of a configuration of a liquid crystal display device having a TOC structure according to a third exemplary embodiment of the present invention.

As illustrated, a black matrix 302 is formed on the lower substrate 300 on which the pixel regions P1 and P2 including the switching region S are defined.

Color filters 304a and 304b are formed in the pixel areas P1 and P2. The color filters 304a and 304b sequentially configure red, green, and blue color filters corresponding to the plurality of pixel areas P1 and P2.

The planarization layer 306 is formed on the entire surface of the substrate 300 including the black matrix 302 and the color filters 304a and 304.

The planarization layer 306 is formed by depositing one or more materials selected from the group of organic insulating materials including benzocyclobutene (BCB) and an acrylic resin.

The semiconductor layer 314 and the semiconductor layer 314 with the gate electrode 308 and the gate electrode 308 interposed between the gate electrode 308 and the gate electrode 308 on the planarization film 306 corresponding to the switching region S. A thin film transistor T including a source electrode 316 and a drain electrode 318 is formed on the upper side of the top surface.                     

In addition, a gate line 310 and a data line (not shown) are formed on one side of the pixel areas P1 and P2 and the other side perpendicular thereto.

The protective layer 320 is deposited by depositing one or more materials selected from the group of inorganic insulating materials including silicon nitride (SiN _X ) and silicon oxide (SiO ₂ ) on the entire surface of the substrate 300 on which the thin film transistor T is formed. The pixel electrode 322 in contact with the drain electrode 318 is formed on the passivation layer 320.

In this case, since the passivation layer 320 is formed of an inorganic insulating layer, a stepped portion protruding by the thin film transistor T is formed.

In this configuration, since it is not meaningful to form the column spacer on the array substrate 300, the first and second column spacers 406 and 408 should be formed on the upper substrate 400.

To this end, a transparent common electrode 404 is formed on one surface of the upper substrate 400 bonded to the lower substrate 300, and an alignment layer 406 is formed under the transparent common electrode 404. In this case, the alignment layer 406 may not be formed.

Next, a first column spacer 408 and a second column spacer 410 are formed under the alignment layer 406.

In this case, as shown in the drawing, the first column spacer 408 is formed corresponding to the thin film transistor T, and serves to maintain gaps between the first and second substrates 300 and 400. The second column spacer 410 may be formed to have a predetermined distance from the first substrate 300.

As described above, the liquid crystal display according to the present invention may be manufactured through the first to third embodiments.

Therefore, the liquid crystal display according to the present invention has the following effects because it is composed of a COT and TOC structure including a dual column spacer.

First, since the color filter and the black matrix are configured on the array substrate, it is not necessary to design a bonding margin to reduce the bonding error, so that the opening area as much as the bonding margin can be secured, thereby improving the aperture ratio and thereby improving luminance.

Second, when the liquid crystal is filled by applying the dual column spacer configuration, the liquid crystal may be filled into a spaced area between the spacer and the substrate spaced apart from the substrate, thereby preventing gravity defects in which the lower part of the panel is bulged due to overfilling of the liquid crystal. It can work.

In addition, there is an effect that the margin width of the liquid crystal in relation to the filling amount of the liquid crystal can be more secured.

Third, the column spacer formed with a gap with the substrate may act as a resistance component when a pressure is applied to the panel, thereby preventing the crushing of the liquid crystal due to the pressure.

Claims (27)

A first substrate and a second substrate; A gate wiring and a data wiring defining a pixel area by vertically crossing each other on one surface of the first substrate facing the second substrate; A switching element configured at an intersection point of the gate line and the data line; A black matrix formed at an upper portion corresponding to the switching element; A color filter configured in the pixel region; A planarization film formed on the color filter and having a flat surface; A transparent pixel electrode positioned over the planarization layer and in contact with the switching element; A first column spacer configured to correspond to the switching element, a second column spacer configured to correspond to a part of the pixel region; A black pattern configured to correspond to the first column spacer or the second column spacer on one surface of the second substrate facing the first substrate; And a transparent common electrode formed on an entire surface of the second substrate including the black pattern, wherein the first and second column spacers have the same height, and correspond to the black pattern of the first and second column spacers. And a column spacer formed at a portion thereof to be in contact with a component provided on an uppermost layer of an inner surface of the second substrate. The method of claim 1, The color filter is a COT structure liquid crystal display device which is a color filter of red, green, and blue sequentially formed corresponding to a pixel area. The method of claim 1, The switching element includes a gate electrode, an active layer disposed over the gate electrode with an insulating layer interposed therebetween, and a source and drain electrode spaced apart from the upper portion of the active layer. The method of claim 1, The black matrix is a COT structure liquid crystal display device formed at an upper portion corresponding to a gate line and a data line. The method of claim 1, The column spacer configured to correspond to the black pattern among the first column spacer and the second column spacer serves to maintain a gap between the first substrate and the second substrate, and the other column spacer is formed with the second substrate. COT structure liquid crystal display device having a spaced area. The method of claim 1, The height of the black pattern is a COT (COT) structure liquid crystal display device composed of a value in the range of 0.1㎛ ~ 0.4㎛. Preparing a first substrate and a second substrate; Forming gate lines and data lines on one surface of the first substrate facing the second substrate to vertically cross each other to define pixel regions; Forming a switching element configured at an intersection point of the gate line and the data line; Forming a black matrix formed thereon corresponding to the switching element; Forming a color filter in the pixel region; Forming a planarization film having a flat surface on the color filter; Forming a transparent pixel electrode on the planarization layer and above the color filter and in contact with the switching element; Forming a first column spacer and a second column spacer corresponding to a portion of the pixel region in correspondence with the switching element; Forming a black pattern on one surface of the second substrate facing the first substrate, corresponding to the first column spacer or the second column spacer; And forming a transparent common electrode on a front surface of the second substrate including the black pattern, wherein the first and second column spacers are formed to have the same height, and the black of the first and second column spacers is formed. A method of manufacturing a COT structure liquid crystal display device wherein the column spacer formed on a portion corresponding to the pattern is formed to contact a component provided on the uppermost layer of the inner surface of the second substrate. The method of claim 7, wherein The switching element includes a gate electrode, an active layer disposed over the gate electrode with an insulating layer interposed therebetween, and a source and drain electrode spaced apart from the upper portion of the active layer. The method of claim 7, wherein And the black matrix is formed on a top of a gate line and a data line. The method of claim 7, wherein The column spacer configured to correspond to the black pattern among the first column spacer and the second column spacer serves to maintain a gap between the first substrate and the second substrate, and the other column spacer is formed with the second substrate. Method of manufacturing a COT structure liquid crystal display device having a spaced area. The method of claim 7, wherein And the black pattern has a height in a range of 0.1 μm to 0.4 μm. A first substrate and a second substrate on which a switching region and a plurality of pixel regions are defined; A black matrix configured in the switching region of the first substrate facing the second substrate; A color filter configured in the pixel region; Gate wiring and data wiring formed on one side of the pixel region including the color filter and the other side perpendicular to the pixel region; A switching element configured on the black matrix; An organic insulating film having a flat surface over the switching element; A transparent pixel electrode in contact with the switching element over the organic insulating layer; A first column spacer configured to correspond to the switching element, a second column spacer configured to correspond to a part of the pixel region; A black pattern formed on an inner surface of the second substrate facing the first substrate, the black pattern corresponding to the first column spacer or the second column spacer; A transparent common electrode configured to cover the black pattern on the front surface of the second substrate including the black pattern, wherein the first and second column spacers are formed to have the same height, and the first and second columns A column spacer formed on a portion of the spacer corresponding to the black pattern is formed in contact with the components provided on the uppermost layer of the inner surface of the second substrate (TOC) structure liquid crystal display device. 13. The method of claim 12, And the color filter is a red, green, and blue color filter configured to correspond to the pixel region sequentially. 13. The method of claim 12, The switching device includes a gate electrode, an active layer positioned over the gate electrode with an insulating layer interposed therebetween, and a source and drain electrode spaced apart from the upper portion of the active layer. 13. The method of claim 12, The black matrix is a TOC (TOC) structure liquid crystal display device formed at a lower portion corresponding to the gate wiring and the data wiring. 13. The method of claim 12, The column spacer configured to correspond to the black pattern among the first column spacer and the second column spacer serves to maintain a gap between the first substrate and the second substrate, and the other column spacer is formed with the second substrate. TOC structured liquid crystal display device having a spaced area. 13. The method of claim 12, The height of the black pattern is a TOC (TOC) structure liquid crystal display device composed of a value in the range of 0.1㎛ ~ 0.4㎛. 13. The method of claim 12, And a planarization film formed between the switching element, the gate and the data line, and the color filter. Defining a switching region and a plurality of pixel regions in the first substrate and the second substrate; Forming a black matrix in a switching region of the first substrate facing the second substrate; Forming a color filter in the pixel region; Forming a gate line and a data line on one side of the pixel area where the color filter is formed and the other side perpendicular thereto; Forming a switching element on top of the black matrix; Forming an organic insulating film having a flat surface over the switching element; Forming a transparent pixel electrode on the organic insulating layer and in contact with the switching element corresponding to the pixel region; Forming a first column spacer corresponding to the switching element and a second column spacer corresponding to a portion of the pixel region; Forming a black pattern on an inner surface of the second substrate facing the first substrate corresponding to the first column spacer or the second column spacer; Forming a transparent common electrode covering the black pattern on the entire surface of the second substrate including the black pattern, wherein the first and second column spacers are formed to have the same height, and the first and second 2. The method of manufacturing a TOS structure liquid crystal display device, wherein the column spacer formed on a portion of the column spacer corresponding to the black pattern is in contact with a component provided on the uppermost layer of the inner surface of the second substrate. The method of claim 1, Components provided on the top layer, The common electrode; Or a COT structure liquid crystal display which covers the common electrode and is an alignment layer when an alignment layer is formed. The method of claim 1, And the black pattern is one selected from a group of metals including chromium (Cr) or chromium oxide (CrOx). The method of claim 7, wherein Components provided on the top layer, The common electrode; Or covering the common electrode and forming an alignment layer, wherein the alignment layer is the alignment layer. The method of claim 7, wherein And the black pattern is one selected from a group of metals including chromium (Cr) or chromium oxide (CrOx). 13. The method of claim 12, Components provided on the top layer, The common electrode; Or an alignment layer covering the common electrode, wherein the alignment layer is the alignment layer. 13. The method of claim 12, And the black pattern is one selected from a group of metals including chromium (Cr) or chromium oxide (CrOx). The method of claim 19, Components provided on the top layer, The common electrode; Or covering the common electrode and forming an alignment layer, wherein the alignment layer is the alignment layer. The method of claim 19, And the black pattern is one selected from a group of metals including chromium (Cr) or chromium oxide (CrOx).

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