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KR101015852B1 - Pad structure of TFT LCD - Google Patents

Pad structure of TFT LCD Download PDF

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KR101015852B1
KR101015852B1 KR1020030089446A KR20030089446A KR101015852B1 KR 101015852 B1 KR101015852 B1 KR 101015852B1 KR 1020030089446 A KR1020030089446 A KR 1020030089446A KR 20030089446 A KR20030089446 A KR 20030089446A KR 101015852 B1 KR101015852 B1 KR 101015852B1
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metal layer
ito electrode
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pad structure
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KR20050056431A (en
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박윤철
박동진
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삼성모바일디스플레이주식회사
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13458—Terminal pads
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K30/00—Organic devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation
    • H10K30/80—Constructional details
    • H10K30/81—Electrodes
    • H10K30/82—Transparent electrodes, e.g. indium tin oxide [ITO] electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K30/00—Organic devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation
    • H10K30/80—Constructional details
    • H10K30/88—Passivation; Containers; Encapsulations
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    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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    • Y02E10/549—Organic PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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Abstract

본 발명은 티에프티 액정표시장치의 패드 구조에 관한 것으로, 특히 불투명 메탈층에 의해 가려지는 영역을 최소화하여 ACF의 압착 상태를 일반 현미경으로도 용이하게 분석 및 확인할 수 있도록 하기 위한 목적에서, 유리기판 상에 메탈층을 형성하고, 상기 메탈층을 덮도록 패시베이션을 형성하며, 상기 메탈층과 패시베이션의 경계부가 수평하게 되도록 패시베이션을 식각하고, 상기 메탈층 일부와 패시베이션 일부를 포함하는 상측에 ITO 전극을 형성하며, 상기 ITO 전극 상에 ACF와 범프를 개재하여 드라이드 IC 칩을 탑재하고, 최외곽의 ITO 전극 상에 ACF와 리이드라인을 개재하여 FPC 필름을 전기적으로 연결하여 구성한다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pad structure of a TFT LCD, and in particular, to minimize the area covered by an opaque metal layer so as to easily analyze and confirm the ACF crimped state using a general microscope. A metal layer is formed on the passivation layer, the passivation layer is formed to cover the metal layer, and the passivation layer is etched so that the boundary between the metal layer layer and the passivation layer is horizontal. And a dry IC chip is mounted on the ITO electrode via the ACF and the bump, and the FPC film is electrically connected to the outermost ITO electrode via the ACF and the lead line.

액정표시장치, TFT 기판, 메탈층, ACF, 범프, 리이드라인, ITO 전극LCD, TFT Substrate, Metal Layer, ACF, Bump, Lead Line, ITO Electrode

Description

티에프티 액정표시장치의 패드 구조{Pad of TFT-LCD}Pad structure of TF LCD device {Pad of TFT-LCD}

도 1은 종래 공지된 티에프티 액정표시장치의 패드 구조를 도시한 단면도이다.1 is a cross-sectional view illustrating a pad structure of a conventionally known TFT LCD.

도 2는 본 발명에 의한 티에프티 액정표시장치의 패드 구조를 도시한 단면도이다.2 is a cross-sectional view illustrating a pad structure of a TFT LCD according to the present invention.

본 발명은 티에프티(이하 'TFT'로 약칭함) 액정표시장치의 패드 구조에 관한 것으로, 특히 TFT 기판의 패드부 구조에서 불투명 메탈층 영역을 최소화하여 ACF(Anisotropic conductive film)의 압착 상태를 일반 현미경으로 용이하게 분석 및 확인할 수 있도록 한 것에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pad structure of a TFT (hereinafter, abbreviated as 'TFT') liquid crystal display device. In particular, the compression state of an anisotropic conductive film (ACF) is minimized by minimizing an opaque metal layer region in a pad structure of a TFT substrate. It is about what made it easy to analyze and confirm with a microscope.

TFT 액정표시장치는 경량, 박형, 저소비 전력구동 등의 특징과 함께 액정 재료의 개량 및 미세화소 가공기술의 개발에 의해 화질이 지속적으로 개선되고 있으며, 그 응용범위가 점차 넓어지고 있는 추세이다. TFT liquid crystal display devices are characterized by light weight, thinness, low power consumption, and the like, and the image quality is continuously improved by the improvement of liquid crystal materials and the development of micropixel processing technology, and the application range is gradually increasing.

이러한 TFT 액정표시장치는 전압에 따라 광의 투과도가 변화하는 액정의 특성을 이용하여 문자나 숫자 혹은 기타 임의의 아이콘을 표시하는 것으로서, 일반적 으로 액정이 주입된 화소들이 매트릭스 형태로 배열되어진 화상표시부와, 화상표시부를 구동하기 위한 드라이브 IC 칩들을 포함하여 이루어진다.Such a TFT liquid crystal display device displays letters, numbers, or other arbitrary icons by using characteristics of liquid crystals in which light transmittance changes with voltage, and generally includes an image display unit in which pixels injected with liquid crystal are arranged in a matrix form; Drive IC chips for driving the image display unit.

화상표시부는 유리기판 상에 상호 교차되도록 게이트라인 및 데이타라인을 형성하고 있으며, 상기 게이트라인 및 데이타라인이 교차하는 화소 영역에는 스위칭소자인 박막트랜지스터를 형성하고, 상기 게이트라인 및 데이타라인의 끝부분에는 패드부를 형성하고 있다.The image display unit forms a gate line and a data line to cross each other on a glass substrate. A thin film transistor, which is a switching element, is formed in a pixel area where the gate line and the data line intersect, and an end portion of the gate line and the data line is formed. The pad portion is formed.

이와 같이 구성되는 TFT 기판의 패드부는 드라이브 IC 칩들이 직접 탑재되는 COG(Chip On Glass) 형태로 제작되고, 또한 드라이브 IC 칩들에게 신호들을 제공하기 위한 FPC 필름(Flexible Printed Circuit Film)이 부착되게 된다.The pad portion of the TFT substrate configured as described above is manufactured in the form of a chip on glass (COG) in which the drive IC chips are directly mounted, and a FPC film (Flexible Printed Circuit Film) for providing signals to the drive IC chips is attached.

도 1은 종래 TFT 액정표시장치의 패드부를 도시한 것이다. 도시한 바와 같이 TFT 기판의 패드부는 유리기판(1) 상에 게이트 및 소스 메탈층(3)을 형성하고, 게이트 및 소스 메탈층(3)의 상부에 패시베이션(passivation; 5)을 형성하며, 패시베이션(5)에 홀을 형성하여 ITO 전극(7)을 형성하고 있다. 또한 드라이드 IC 칩(9)과 FPC 필름(11)을 포함하되, 상기 드라이드 IC 칩(9)은 입, 출력 ITO 전극(7) 상에 ACF(13)와 범프(bump; 15)에 의해 탑재되고, 상기 FPC 필름(11)은 ACF(13)와 리이드라인(17)에 의해 전기적으로 접속되어 있다.1 shows a pad portion of a conventional TFT liquid crystal display device. As illustrated, the pad portion of the TFT substrate forms a gate and source metal layer 3 on the glass substrate 1, forms a passivation 5 on the gate and source metal layer 3, and passivates it. Holes are formed in (5) to form ITO electrodes 7. It also includes a drive IC chip (9) and FPC film (11), the drive IC chip (9) is mounted on the input and output ITO electrode (7) by the ACF 13 and bump (15) The FPC film 11 is electrically connected by the ACF 13 and the lead line 17.

FPC 필름(11)은 도시하지 않은 제어회로부로부터의 전기신호들 드라이브 IC 칩들(9)쪽으로 전송한다.The FPC film 11 transmits the electric signals from the control circuit portion (not shown) toward the drive IC chips 9.

상술한 액정표시장치용 TFT 기판의 패드부 구조에서는 ACF(13)의 압착을 용 이하게 하기 위해, 드라이드 IC 칩(9)의 범프(15)와 FPC 필름(11)의 리이드라인(17)의 크기 보다 메탈층(3) 및 ITO 전극(7)의 이중층 크기를 더 크게 설계하고 있다.In the pad structure of the TFT substrate for a liquid crystal display device described above, the bump 15 of the drive IC chip 9 and the lead line 17 of the FPC film 11 are used to facilitate the crimping of the ACF 13. The double layer size of the metal layer 3 and the ITO electrode 7 is designed larger than the size.

그러나 상술한 종래 패드부 구조에서는 드라이드 IC 칩(9)의 탑재후 범프(15) 보다 크게 설계된 메탈층(3)의 반사 특성 때문에, 일반 광학 현미경으로는 ACF(13)가 잘 압착되어 있는지 확인하지 못하는 문제점이 있다. 또한 편광 현미경을 사용하더라도 드라이드 IC 칩(9)의 압착력이 약하여 ACF(13) 비이드의 변형이 약하게 발생한 경우, 즉 미세하게 도전되어 있는 경우에는 ACF(13)의 압착 상태를 정확하게 관찰하지 못하는 문제점이 있다.However, in the conventional pad portion structure described above, due to the reflection characteristics of the metal layer 3 designed to be larger than the bump 15 after the mounting IC chip 9 is mounted, it is not checked whether the ACF 13 is well compressed by a general optical microscope. There is a problem. In addition, even when a polarizing microscope is used, the compression force of the drive IC chip 9 is weak, so that the deformation of the ACF 13 beads is weak, that is, when the conductive state is finely conducted, it is not possible to accurately observe the compression state of the ACF 13. There is this.

이와 같은 종래 기술의 문제점을 해결하기 위한 것으로서, 본 발명에서는 TFT 기판의 패드부 구조에서 범프 및 리이드라인 보다 불투명 메탈층에 의해 가려지는 영역을 최소화하여, 일반 광학 현미경으로도 ACF의 압착 상태를 명확하게 분석 및 확인할 수 있도록 함에 그 목적을 두고 있다.In order to solve the problems of the prior art, the present invention minimizes the area covered by the opaque metal layer rather than the bump and lead line in the pad structure of the TFT substrate, and thus clearly squeezes the ACF even under a general optical microscope. Its purpose is to make it easy to analyze and verify.

상기 목적에 따라, 본 발명에서는 유리기판 상에 메탈층을 형성하고, 상기 메탈층을 덮도록 패시베이션을 형성하며, 상기 메탈층과 패시베이션의 경계부가 수평하게 되도록 패시베이션을 식각하고, 상기 메탈층 일부와 패시베이션 일부를 포함하는 상측에 ITO 전극을 형성하며, 상기 ITO 전극 상에 ACF와 범프를 개재하여 드라이드 IC 칩을 탑재하고, 최외곽의 ITO 전극 상에 ACF와 리이드라인을 개재하여 FPC 필름을 전기적으로 연결하여 구성된 TFT 액정표시장치의 패드 구조를 제안한 다.According to the above object, in the present invention, a metal layer is formed on a glass substrate, and a passivation is formed to cover the metal layer, the passivation is etched so that the boundary between the metal layer and the passivation is horizontal, and a portion of the metal layer is formed. An ITO electrode is formed on the upper side including a portion of the passivation, a dry IC chip is mounted on the ITO electrode through an ACF and a bump, and the FPC film is electrically connected to the outermost ITO electrode via an ACF and a lead line. A pad structure of a TFT liquid crystal display device constructed by connecting is proposed.

바람직하게 상기 ITO 전극과 접속되는 메탈층의 크기는 범프 및 리이드라인 보다 작게 형성하는 것이 좋다.Preferably, the size of the metal layer connected to the ITO electrode may be smaller than the bump and lead lines.

보다 구체적으로 본 발명에서 ITO 전극과 메탈층의 접속 면적은 최소 폭 30㎛ 그리고 길이 30㎛ 이상으로 형성하고, ITO 전극과 패시베이션의 접촉 면적은 최소 폭 30㎛ 그리고 길이 10㎛ 이상으로 형성하는 것이 바람직하다.More specifically, in the present invention, the connection area between the ITO electrode and the metal layer is formed with a minimum width of 30 μm and a length of 30 μm or more, and the contact area between the ITO electrode and the passivation is formed with a minimum width of 30 μm and a length of 10 μm or more. Do.

이하, 본 발명의 바람직한 실시예를 첨부 도면에 의거하여 설명하기로 한다.Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

도 2는 본 발명에 의한 TFT 액정표시장치의 패드 구조를 보여주고 있다. 도면에서 종래 기술과 동일한 구성에 대하여는 동일 번호를 부여하기로 한다.2 shows a pad structure of a TFT liquid crystal display according to the present invention. In the drawings, the same components as in the prior art will be denoted by the same reference numerals.

도시한 바와 같이 본 발명의 TFT 액정표시장치의 패드부는 유리기판(1) 상에 게이트 및 소스 메탈층(3)을 형성하고, 게이트 및 소스 메탈층(3)의 상부에 패시베이션(50)을 형성하며, 패시베이션(50)을 식각하여 메탈층(3)의 일부를 노출시킨후 상기 메탈층(3) 상에 ITO 전극(70)을 접촉 형성함으로써 TFT 기판을 형성하고 있다.As shown, the pad portion of the TFT liquid crystal display device of the present invention forms the gate and source metal layer 3 on the glass substrate 1, and the passivation 50 is formed on the gate and source metal layer 3. The TFT substrate is formed by etching the passivation 50 to expose a part of the metal layer 3 and then forming an ITO electrode 70 on the metal layer 3 by contact.

이러한 TFT 기판의 패드부 구조에서, 본 발명의 특징적인 구성은 메탈층(3)과 수평하게 패시베이션(50)의 테두리를 식각 형성한 것이며, 특히 수평한 메탈층(3) 일부와 패시베이션(50) 일부의 상측에 동시에 ITO 전극(70)을 형성한 것에 있다. In the pad structure of the TFT substrate, a characteristic configuration of the present invention is that the edge of the passivation 50 is etched horizontally with the metal layer 3, and in particular, a part of the horizontal metal layer 3 and the passivation 50 are formed. The ITO electrode 70 is formed at the same time on a part of the upper side.

또한 상기 ITO 전극(70) 상에 ACF(13)와 범프(15)를 개재하여 드라이드 IC 칩(9)을 탑재하고, 최외곽의 ITO 전극(70) 상에 ACF(13)와 리이드라인(17)을 개재 하여 FPC 필름(11)을 전기적으로 연결한다.In addition, the drive IC chip 9 is mounted on the ITO electrode 70 via the ACF 13 and the bump 15, and the ACF 13 and the lead line 17 are disposed on the outermost ITO electrode 70. ) To electrically connect the FPC film (11).

이때 본 발명에서는 ITO 전극(70)과 접속되는 메탈층(3)의 크기를 범프(15) 및 리이드라인(17) 보다 작게 형성한다.In this case, the size of the metal layer 3 connected to the ITO electrode 70 is smaller than the bump 15 and the lead line 17.

이와 같은 구성에 따라 본 발명의 TFT 기판의 패드부 구조에서는 투명한 ITO 전극(70)을 통하여 ACF(13)의 압착 상태를 명확하게 분석 및 확인할 수 있다.According to such a configuration, in the pad structure of the TFT substrate of the present invention, the crimping state of the ACF 13 can be clearly analyzed and confirmed through the transparent ITO electrode 70.

바람직한 실시예로서, 보통 범프(15)의 크기는 폭 40㎛ 그리고 길이 70㎛이며, 이때 ITO 전극(70)과 메탈층(3)의 저항을 300Ω 이하라고 하면, 본 발명에서 ITO 전극(70)과 메탈층(3)의 접촉 면적은 최소 폭 30㎛ 그리고 길이 30㎛ 이상으로 형성하는 것이 적당하다. 또한 ACF(13)의 비이드 크기를 4㎛라고 할 때, 메탈층(13)이 없는 영역을 최소 폭 30㎛ 그리고 길이 10㎛ 이상으로 확보하는 것이 바람직하다.As a preferred embodiment, the bumps 15 are usually 40 mu m in width and 70 mu m in length, wherein the resistance of the ITO electrode 70 and the metal layer 3 is 300 kPa or less. The contact area between the metal layer 3 and the metal layer 3 is preferably formed to have a minimum width of 30 μm and a length of 30 μm or more. In addition, when the bead size of ACF 13 is 4 micrometers, it is preferable to ensure the area | region without the metal layer 13 to minimum width 30 micrometers, and length 10 micrometers or more.

여기서 리이드라인(17)의 크기는 메탈층(3)의 크기 보다 크거나 같다.Here, the size of the lead line 17 is greater than or equal to the size of the metal layer 3.

상기에서는 본 발명의 바람직한 실시예에 대하여 설명하였지만, 본 발명은 이에 한정되는 것이 아니고 특허청구범위와 발명의 상세한 설명 및 첨부한 도면의 범위 안에서 여러 가지로 변형하여 실시하는 것이 가능하고 이 또한 본 발명의 범위에 속하는 것은 당연하다.While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, Of course.

이상에서 살펴 본 바람직한 실시 형태를 통하여 알 수 있는 바와 같이, 본 발명에 의한 TFT 액정표시장치의 패드 구조는 드라이드 IC 칩의 범프 및 FPC 필름의 리이드라인의 크기 보다 불투명 메탈층과 ITO 전극의 접촉 면적을 작게 형성하 여, 투명한 ITO 전극을 통하여 ACF의 압착 상태를 명확하게 분석 및 확인할 수 있도록 하는 효과를 얻을 수 있다.As can be seen through the preferred embodiment described above, the pad structure of the TFT liquid crystal display device according to the present invention is the contact area between the opaque metal layer and the ITO electrode than the bump of the drive IC chip and the size of the lead line of the FPC film. By forming a smaller size, it is possible to obtain an effect that can clearly analyze and confirm the crimping state of the ACF through the transparent ITO electrode.

또한 본 발명에 의하면 ACF의 압착 불균일을 사전에 분석 및 확인하므로, 도전성 오픈 불량을 방지할 수 있으며, 그 결과 ACF의 가압 조건을 최적화할 수 있다.In addition, according to the present invention, since the criterion non-uniformity of the ACF is analyzed and confirmed in advance, it is possible to prevent defective open conduction, and as a result, it is possible to optimize the pressurization conditions of the ACF.

Claims (5)

유리기판;Glass substrates; 상기 유리기판 상에 형성된 메탈층;A metal layer formed on the glass substrate; 상기 메탈층의 일부와 유리기판의 일부를 덮도록 형성된 패시베이션;Passivation formed to cover a portion of the metal layer and a portion of the glass substrate; 상기 유리기판의 일부를 덮는 패시베이션의 상면과, 상기 메탈층의 상면의 경계부가 수평하게 되도록 형성되어 있고, 상기 메탈층의 일부, 상기 유리기판의 일부를 덮는 패시베이션 일부 및 상기 경계부를 포함하는 상측에 형성되는 ITO 전극;An upper surface of the passivation covering a portion of the glass substrate and a boundary portion of the upper surface of the metal layer are formed to be horizontal, and an upper portion including the portion of the metal layer, a portion of the passivation covering the portion of the glass substrate, and the boundary portion. An ITO electrode formed; 상기 ITO 전극 상에 ACF와 범프를 개재하여 탑재되는 드라이드 IC 칩; 그리고A drive IC chip mounted on the ITO electrode via an ACF and a bump; And 최외곽의 ITO 전극 상에 ACF와 리이드라인을 개재하여 연결되는 FPC 필름을 포함하는 티에프티 액정표시장치의 패드 구조.A pad structure of a TFT LCD comprising an FPC film connected to an outermost ITO electrode via an ACF and a lead line. 제 1 항에 있어서, 상기 ITO 전극과 접속되는 메탈층의 크기를 범프 및 리이드라인 보다 작게 형성한 것을 특징으로 하는 티에프티 액정표시장치의 패드 구조.2. The pad structure of a TFT liquid crystal display device according to claim 1, wherein a size of the metal layer connected to the ITO electrode is smaller than a bump and lead line. 제 1 항에 있어서, 상기 ITO 전극과 메탈층의 접속 면적은 최소 폭 30㎛ 그리고 길이 30㎛ 이상으로 형성한 것을 특징으로 하는 티에프티 액정표시장치의 패드 구조.The pad structure of a TFT liquid crystal display device according to claim 1, wherein the connection area between the ITO electrode and the metal layer is formed to have a minimum width of 30 mu m and a length of 30 mu m or more. 제 1 항에 있어서, 상기 ITO 전극과 패시베이션의 접촉 면적은 최소 폭 30㎛ 그리고 길이 10㎛ 이상으로 형성한 것을 특징으로 하는 티에프티 액정표시장치의 패드 구조.2. The pad structure of a TFT liquid crystal display device according to claim 1, wherein the contact area between the ITO electrode and the passivation is formed with a minimum width of 30 mu m and a length of 10 mu m or more. 삭제delete
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