KR100965158B1 - LCD Display - Google Patents

Abstract

In the LCD, the compensator generates a compensation signal from the first image signal and outputs the second image signal as it is. The source driver generates first and second data signals from the compensation signal and the second image signal, and provides the first and second data signals to the liquid crystal display panel. The LCD panel displays an image including a compensation area including a plurality of first data lines for receiving a first data signal and a plurality of non-compensation areas with a plurality of second data lines for receiving a second data signal. . Therefore, the display characteristic of a liquid crystal display device can be improved.

Description

Liquid Crystal Display {LIQUID CRYSTAL DISPLAY}

1 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a diagram illustrating a compensation area of the liquid crystal display panel illustrated in FIG. 1.

3 is a cross-sectional view illustrating in detail the liquid crystal display panel illustrated in FIG. 2.

4 is a circuit diagram of FIG. 3.

5 is a graph illustrating a result of applying a compensation signal to data lines provided in the first and second compensation areas.

6 is a block diagram illustrating a liquid crystal display according to another exemplary embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

100: timing control unit 200: storage unit

300: compensation logic unit 400: conversion table

500: source driver 600: gate driver

700: liquid crystal display panel 800, 1000: liquid crystal display device

900: adjustment unit

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of improving display characteristics.

In general, the liquid crystal display includes a liquid crystal display panel for displaying an image and a backlight assembly for providing light to the liquid crystal display panel. The liquid crystal display panel includes a lower substrate, an upper substrate, and a liquid crystal layer interposed between the lower substrate and the upper substrate.

The lower substrate is a substrate in which a plurality of pixels consisting of a gate line, a data line, a TFT, and a pixel electrode are formed in a matrix form. The upper substrate is provided with a common electrode facing the pixel electrode with the liquid crystal layer interposed therebetween.

Recently, as the size of the liquid crystal display device increases, the size of the liquid crystal display panel defining the screen of the liquid crystal display device also increases. In addition, as the size of the liquid crystal display panel increases, the size of the lower substrate and the upper substrate forming the liquid crystal display panel also increases.

As such, when the size of the lower substrate is increased, a mask used in a patterning process for forming a plurality of pixels on the lower substrate may not correspond to the lower substrate as a whole. In this case, the mask has a size of 1 / n (n is a natural number of 2 or more) of the lower substrate size, so that the lower substrate has n mask regions sequentially patterned by the mask.

When the lower substrate is patterned while the mask is sequentially moved to the n mask regions, a difference in transmittance occurs for each mask region due to an error generated during the mask movement. In particular, the difference in transmittance is further increased at the boundary where each mask area is adjacent to each other. Such a difference in transmittance acts as a factor for lowering display characteristics of the liquid crystal display.

It is therefore an object of the present invention to provide a liquid crystal display device for improving display characteristics.

A liquid crystal display according to an aspect of the present invention includes a compensator, a gate driver, a data driver, and a liquid crystal display panel.

The compensator generates a compensation signal from the first image signal, outputs the second image signal as it is, and the gate driver generates a gate signal. The source driver generates first and second data signals from the compensation signal and the second image signal, respectively.

The liquid crystal display panel includes a compensation area including a plurality of first data lines for receiving the first data signal, a plurality of gate lines for receiving the gate signal, and a plurality of second data lines for receiving the second data signal. And a plurality of non-compensation regions provided with the plurality of gate lines to display an image.

According to the liquid crystal display device, the liquid crystal display panel includes a compensation area in which a signal compensated by the compensation unit is provided, thereby gradually reducing the difference in transmittance of the non-compensation areas in the compensation area. Therefore, the display characteristic of a liquid crystal display device can be improved.                     

Hereinafter, with reference to the accompanying drawings, it will be described in detail a preferred embodiment of the present invention.

1 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 1, the liquid crystal display 800 according to an exemplary embodiment of the present invention includes a timing controller 100 that receives an original image signal O-DATA and an original control signal OCS from the outside. The timing controller 100 stores the received raw image signal O-DATA in the memory 200. The raw image signal O-DATA is received in a 2-line unit or a frame unit and then stored in the storage unit 200. Here, the storage unit 200 is composed of DRAM or GRAM.

Meanwhile, the timing controller 100 reads the raw image signal O-DATA stored in the storage unit 200 in units of 1-line. The compensation logic unit 300 is further provided between the timing controller 100 and the storage unit 200.

The compensation logic unit 300 receives the raw image signal O-DATA in the 1-line unit output from the storage unit 200, and a part of the received raw image signal O-DATA ( Hereinafter, the first video signal) is compensated. The compensation logic unit 300 is connected to the conversion table 400 that stores the compensation signal, and outputs a compensation signal corresponding to the first image signal from the change table 400. Here, the conversion table 400 is composed of a ROM.

The compensation signal output from the compensation logic unit 300 and the remaining part of the original video signal (hereinafter, referred to as a second video signal) are provided to the timing controller 100. The timing controller 100 outputs the compensation signal and the second image signal in response to the original control signal OCS. In addition, the timing controller outputs horizontal and vertical control signals HCS and VCS.

The liquid crystal display device 800 further includes a liquid crystal display panel 700 displaying an image, a gate driver 600 and a source driver 500 for driving the liquid crystal display panel 700.

The source driver 500 receives the horizontal control signal HCS, the compensation signal, and the second image signal from the timing controller 100. Accordingly, the source driver 500 generates first and second data signals suitable for displaying the image on the liquid crystal display panel 700 from the compensation signal and the second image signal in response to the horizontal control signal HCS. do. Here, the raw video signal, the compensation signal, and the first and second video signals have a digital form, and the first and second data signals have an analog form.

The gate driver 600 receives the vertical control signal VCS from the timing controller 100 and generates the gate signal in response to the resin control signal VCS.

Accordingly, the liquid crystal display panel 700 displays an image in response to the gate signal and the first and second data signals.

FIG. 2 is a diagram illustrating a compensation area of the liquid crystal display panel illustrated in FIG. 1.

Referring to FIG. 2, the liquid crystal display panel 700 includes first to fourth mask regions A-SHOT, B-SHOT, C-SHOT, and D-SHOT, and the first to fourth mask regions It is implemented as one display area.

A mask (not shown) for patterning the layers formed on the liquid crystal display panel 700 is used in the manufacturing process of the liquid crystal display panel 700. The mask has a size 1/4 of the liquid crystal display panel 700. Accordingly, the mask is not used to pattern the entire surface of the liquid crystal display panel 700 at once, but is moved from the first mask area A-SHOT to the fourth mask area D-SHOT to sequentially process each mask area. It is used to pattern.

The first mask area A-SHOT includes a first non-compensation area A-NCA and a first compensation area A-CA. The first compensation area A-CA is provided adjacent to the second mask area B-SHOT. The second mask area B-SHOT includes a second non-compensation area B-NCA, second and third compensation areas B-CA1 and B-CA2. The second compensation area B-CA1 is provided adjacent to the first mask area A-SHOT, and the third compensation area B-CA2 is adjacent to the second mask area B-SHOT. It is provided by. The second non-compensation area B-NCA is provided between the second and third compensation areas B-CA1 and B-CA2.

In addition, the third mask area C-SHOT includes a third non-compensation area C-NCA, fourth and fifth compensation areas C-CA1 and C-CA2. The fourth compensation area C-CA1 is provided adjacent to the second mask area B-SHOT, and the fifth compensation area C-CA2 is adjacent to the fourth mask area D-SHOT. It is provided by. The third non-compensation area C-NCA is provided between the fourth and fifth compensation areas C-CA1 and C-CA2. The fourth mask area D-SHOT includes a fourth non-compensation area D-NCA and a sixth compensation area D-CA. The sixth compensation area D-CA is provided adjacent to the third mask area C-SHOT.

As shown in FIGS. 1 and 2, the compensation signal compensated by the compensation logic unit 300 includes a plurality of data lines provided in the first to sixth compensation areas A-CA to D-CA. Is applied to.

Although not shown in the figure, the mask has sizes 1/2, 1/3, 1/5 ... so that the liquid crystal display panel 700 may include 2, 3, 5. mask areas. .

3 is a cross-sectional view illustrating in detail the liquid crystal display panel illustrated in FIG. 2, and FIG. 4 is a circuit diagram of FIG. 3. 3 and 4 illustrate the configuration of the liquid crystal display panel in a region where the first mask region and the second mask region are adjacent to each other.

3 and 4, the liquid crystal display panel 700 includes a lower substrate 710, an upper substrate 730, and a liquid crystal layer 750 interposed between the lower substrate 710 and the upper substrate 730. )

An i-1 th data line DLi-1 in the first mask area A-SHOT of the lower substrate 710 and an i and i + 1 th data line DLi in the second mask area B-SHOT. DLi + 1) is provided. Gate lines GL1 intersecting the i-1, i, and i + 1 th data lines DLi-1, DLi, DLi + 1 in the first and second mask regions A-SHOT and B-SHOT. Is provided. I is a natural number of two or more.

An insulating film 711 is provided on the i-1, i and i + 1th data lines DLi-1, DLi, and DLi + 1, and indium tin oxide (hereinafter, ITO) is formed on the insulating film 711. ) Or i-1, i and i + 1 pixel electrodes PEi-1, PEi, PEi + 1 formed of Indium Zinc Oxide (IZO).

In an i-1 TFT (Ti-1), a gate electrode is connected to the gate line GL1, a source electrode is connected to the i-1 th data line DLi-1, and a drain electrode is connected to the i-1 pixel. It has a configuration connected to the electrode PEi-1. In addition, i TFT (Ti) has a structure in which a gate electrode is connected to the gate line GL1, a source electrode is connected to the i-th data line DLi, and a drain electrode is connected to the i pixel electrode PEi. Have

The upper substrate 730 includes a black matrix layer 731, a color filter layer 732, and a common electrode CE. The common electrode CE faces the i-1, i, and i + 1 th pixel electrodes PEi-1, PEi, PEi + 1 with the liquid crystal layer 750 interposed therebetween. Thus, the i-1 pixel electrode PEi-1 and the common electrode CE form an i-1 liquid crystal capacitor Ci-1, and the i pixel electrode PEi and the common electrode CE i forms a liquid crystal capacitor Ci.

A first parasitic capacitor Ca is formed between the i-1 th data line DLi-1 and the i-1 pixel electrode PEi-1, and the i-1 th data line DLi-1. ) And a second parasitic capacitor Cb is formed between the i pixel electrode PEi. In addition, a third parasitic capacitor Cc is formed between the i th data line DLi and the i pixel electrode PEi, and the i th data line DLi and the i + 1 pixel electrode PEi. A fourth parasitic capacitor Cd is formed between +1).

As shown in FIG. 3, the i-1 th data line DLi-1 and the i-1 pixel electrode PEi-1 are spaced apart from each other by a first horizontal distance Da and the i-1 th data. The line DLi-1 and the i pixel electrode PEi are spaced apart from each other by a second horizontal distance Db. In addition, the i-th data line DLi and the i-pixel electrode PEi are spaced apart from each other by a third horizontal distance Dc, and the i-th data line DLi and the i + 1 pixel electrode PEi are separated from each other. 4 It is separated by the horizontal distance Dd.

During the manufacturing process of the liquid crystal display panel 700, the mask used to pattern the first mask area A-SHOT is moved to the second mask area B-SHOT to form the second mask area B-. SHOT) is patterned. In this case, when an error occurs during the movement of the mask, the first and third horizontal distances Da and Dc are different from each other, thereby causing an error between the charge capacities of the first and third parasitic capacitors Ca and Cc. Occurs. In addition, for the same reason, the second and fourth horizontal distances Db and Dd are different from each other, whereby an error occurs between the charge capacities of the second and fourth parasitic capacitors Cb and Cd.

Therefore, the charging capacity of the i-1 th liquid crystal capacitor Ci-1 of the first mask area A-SHOT and the charging capacity of the i th liquid crystal capacitor Ci of the second mask area B-SHOT An error occurs between.

5 is a graph illustrating a result of applying a compensation signal to data lines provided in the first and second compensation areas. In FIG. 5, the x-axis is a data line and the y-axis is a gray scale amount.

1 and 5, the first compensation area A-CA includes the i-100 th to i-1 th data lines DLi-100 to DLi-1, and the second compensation area B is provided. CA includes the i-th to i + 99th data lines DLi to DLi + 99.

Meanwhile, 200 compensation signals are stored in the conversion table 400. The compensation logic unit 300 outputs the 200 compensation signals from the conversion table 400 and provides them to the source driver 500 through the timing controller 100. The source driver 500 converts the compensation signal into an analog data type and outputs the first data signal. Referring to FIG. 5, the operation of the source driver 500 in the first and second compensation areas is described, but the source driver 500 is not compensated in the first and second non-compensation areas. The second data signal is generated from the two image signals.

The first data signal is the i-100 th to i th data lines DLi-100 to DLi-1 and the i th th second of the second compensation area B-CA of the first compensation area A-CA. It is applied to the i + 99th data lines DLi to DLi + 99.

In the first graph G1, the gray level of the first data signal applied to the i-100 th to i + 99 th data lines DLi-100 to DLi + 99 is decreased by a certain amount. The compensation logic unit 300 applies the compensated first data signal to the first and second compensation areas A-CA and B-CA, thereby adjusting the gray level of the first mask area A-SHOT. The difference from the gray level of the second mask area B-SHOT is compensated for.

Therefore, it is possible to prevent the gray level from falling sharply at the boundary between the first mask area A-SHOT and the second mask area B-SHOT.

On the other hand, the second graph G2 has a structure in which the first section in which the gradation amount gradually increases and the second section in which the gradation amount gradually decreases appear repeatedly. In this case, the increase in the first section is not constant but gradually increases, and the decrease in the second section is not constant but gradually increases.

The compensation logic unit 300 applies the compensated first data signal to the first and second compensation areas A-CA and B-CA, thereby adjusting the gray level of the first mask area A-SHOT. The difference from the gray level of the second mask area B-SHOT is compensated for. Therefore, it is possible to prevent the gray level from falling sharply at the boundary between the first mask area A-SHOT and the second mask area B-SHOT.

6 is a block diagram illustrating a liquid crystal display according to another exemplary embodiment of the present invention. In FIG. 6, the same reference numerals are given to the same components as those illustrated in FIG. 1, and descriptions of the functions will be omitted.

Referring to FIG. 6, the liquid crystal display 1000 according to another exemplary embodiment receives an error generated during a manufacturing process of the liquid crystal display panel 700, and the compensation logic unit 300 compensates according to the error. An adjusting unit 900 is provided to adjust the compensation logic unit 300 to vary the amount.

The adjusting unit 900 may determine the degree to which the first image signal is converted into the compensation signal by the compensation logic unit 300, or determine the number of the first image signals to be compensated. The compensation logic unit 300 may be controlled according to the size of the liquid crystal display panel 700 and the number of mask regions of the liquid crystal display panel 700.

The compensation logic unit 300 converts the first image signal output from the storage unit 200 into a compensation signal stored in the conversion table 400 and outputs the compensation signal. The compensation signal and the second image signal output from the compensation logic unit 300 are provided to the timing controller 100. The timing controller 100 outputs the compensation signal and the second image signal in response to the original control signal OCS. In addition, the timing controller outputs horizontal and vertical control signals HCS and VCS.

The source driver 500 generates first and second data signals suitable for displaying the image by the liquid crystal display panel 700 from the compensation signal and the second image signal provided from the timing controller 100. The gate driver 600 generates the gate signal. Thereafter, the liquid crystal display panel 700 displays an image in response to the gate signal and the first and second data signals.

According to the liquid crystal display device as described above, the liquid crystal display panel includes a compensation area including a plurality of first data lines for receiving a first data signal and a plurality of ratios having a plurality of second data lines for receiving a second data signal. Compensation area is provided. Before the source driver generates the first data signal and the second data signal, the source driver receives the compensated compensation signal from the compensator and converts the compensation signal into the first data signal.

Therefore, in the compensation region, the difference in transmittance of the non-compensation regions may be gradually reduced, thereby improving display characteristics of the liquid crystal display.

Although described with reference to the embodiments above, those skilled in the art will understand that the present invention can be variously modified and changed without departing from the spirit and scope of the invention as set forth in the claims below. Could be.

Claims (4)

A compensator for generating a compensation signal from the first image signal and outputting the second image signal as it is; A gate driver generating a gate signal; A data driver for generating first and second data signals from the compensation signal and the second image signal, respectively; And A compensation area including a plurality of first data lines for receiving the first data signal and a plurality of gate lines for receiving the gate signal, and a plurality of second data lines and the plurality of second data signals for receiving the second data signal. And a liquid crystal display panel comprising a plurality of non-compensation regions provided with gate lines to display an image. The method of claim 1, wherein the compensation area is formed between the non-compensation areas, And the transmittance of the compensation region is linearly increased or decreased within the range of the transmittance between the non-compensation regions adjacent to each other. The method of claim 1, wherein the compensation unit, A conversion table for storing the compensation signal; And And a compensation logic unit configured to read and output the compensation signal corresponding to the first image signal from the conversion table. The method of claim 1, wherein the compensation unit, And an adjusting unit connected to the compensation logic unit to adjust the number of the first data lines in the compensation signal and the compensation area.

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