KR100871389B1 - Fuse of Semiconductor Device and Formation Method - Google Patents

Abstract

The fuse of the semiconductor device and a method of forming the same are provided to improve the process margin by forming the fuse line of the thickness which is suitable for repair process without changing the processing condition. The fuse of the semiconductor device comprises as follows. The semiconductor substrate(100) has the fuse regions including the blowing region. The etch stopping layer(106) is formed in the semiconductor substrate. A plurality of conductive patterns(110) is formed on the etch stopping layer and is arranged in the fuse regions part of the either sides of the blowing region. The insulating layer(104, 114) is formed to expose the blowing region and the adjacent conductive pattern part. The etch stopping layer are formed in order to contact the exposed conductive pattern part on the insulating layer and etch stopping layer. The fuse line has a thinner thickness than both sides of the blowing region in the blowing domain(FL).

Description

Fuse of semiconductor device and method for forming thereof {FUSE OF SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fuse of a semiconductor device and a method of forming the same, and more particularly, to a fuse of a semiconductor device and a method of forming the same that can improve process margins and improve repair efficiency.

In recent years, with the rapid spread of information media such as computers, semiconductor devices are also rapidly developing. In terms of its function, the semiconductor device is required to operate at a high speed and to have a large storage capacity. Accordingly, the manufacturing technology of semiconductor devices has been developed to improve the degree of integration, reliability, and response speed.

A semiconductor device mainly includes a fabrication (FAB) process of repeatedly forming a circuit pattern set on a silicon substrate to form cells having an integrated circuit, and packaging the substrate on which the cells are formed in a chip unit (Chip). Packaging and assembly process. In addition, a process for inspecting electrical characteristics of cells formed on the substrate is performed between the fabrication process and the assembly process.

The inspection step is a step of determining whether the cells formed on the substrate have an electrically good state or a bad state. This is to reduce the effort and cost consumed in the assembly process by removing the cells having a bad state through the inspection process before performing the assembly process. In order to detect the cells having the defective state at an early stage and regenerate them through a repair process.

Here, the repair process will be described in more detail as follows.

Redundancy cells are added to replace defective devices or circuits in the design of devices for the purpose of improving the yield of devices in the event of defects in the semiconductor device manufacturing process, and to connect these redundant cells to integrated circuits. The fuse is designed together, and the repair process is a process in which a cell, which has been found to be defective through an inspection process, is connected to a spare cell embedded in a chip using the fuse to be regenerated. That is, by cutting only specific fuses, location information of cells to be repaired is generated.

Hereinafter, a repair method of a semiconductor device according to the prior art will be briefly described.

First, an interlayer insulating film having a flattened surface is deposited on a fuse area of a semiconductor substrate, and then a plurality of fuses are formed on the interlayer insulating film. The fuses are formed in a line type having a uniform width and thickness, and are generally formed of a metal film in order to improve the step area and the process margin of the fuse area.

Then, an insulating film and a protective film are sequentially deposited on the resultant of the semiconductor substrate so as to cover the fuses. Subsequently, a partial thickness of the passivation layer and the insulating layer is repair-etched to form a trench for repairing an insulating layer having a predetermined thickness on the fuse formed in the blown region.

Then, a known inspection and repair process including a fuse blowing process of cutting a specific fuse by irradiating a laser to a fuse region of the semiconductor substrate on which the repair trench is formed is sequentially performed.

However, in the above-described prior art, a large amount of energy is required to cut the fuse because the fuse formed of the metal film forms a thick thickness in order to realize a low resistance of the semiconductor device. In the process, a large amount of stress is applied to the fuse itself, and a stress is applied to another fuse adjacent thereto.

Therefore, there is a limit in controlling the size of the fuse to obtain the optimal repair efficiency without the fail, the thickness of the insulating film remaining under the repair trench, the laser spot size and energy conditions during the repair process, and the result. This reduces process margins and reduces repair efficiency.

The present invention provides a fuse of a semiconductor device and a method of forming the same that can improve process margins and improve repair efficiency.

A fuse of a semiconductor device according to the present invention includes a semiconductor substrate having a fuse region including a blowing region; An etch stop layer formed on the semiconductor substrate; A plurality of conductive patterns formed on the etch stop layer and disposed on portions of the fuse region on both sides of the blowing region; An insulating layer formed to expose the blowing region and a portion of the conductive pattern adjacent thereto; And a fuse line formed on the insulating layer and the etch stop layer to contact the exposed conductive pattern portion, the fuse line having a thickness thinner than both sides of the blowing region in the blowing region.

Here, the fuse line has a width of 50 to 200% of the fuse line thickness of the blowing region in the blowing region.

The fuse line has a barrier film on its surface.

The barrier film is made of a Ti film or a TiN film.

The fuse line is made of a metal film.

The metal film is an aluminum film.

In addition, a fuse forming method of a semiconductor device according to the present invention may include forming an etch stop layer on a semiconductor substrate having a fuse region including a blowing region; Forming an insulating film on the etch stop film; Etching the insulating layer to form a trench for exposing an etch stop layer portion of the fuse region including the blowing region; Forming a conductive film on the insulating film to fill the trench; And etching the conductive layer to form a fuse line having a thickness smaller than that of the remaining fuse regions on both sides of the blowing region.

Here, the etch stop film is formed of a nitride film.

And forming a barrier film on the insulating film including the surface of the trench after forming the trench and before forming the conductive film to fill the trench.

The barrier film is formed of a Ti film or a TiN film.

The conductive film is formed of a metal film.

The metal film is an aluminum film.

The fuse line is formed to have a width of 50 to 200% of a thickness of the fuse line of the blowing region in the blowing region.

According to the present invention, by forming a fuse line by depositing a metal film on the etch stop layer and adjusting the over-etch amount of the metal film, the blowing area portion of the fuse line can be effectively adjusted to have a thickness suitable for the repair process. Through this, the repair efficiency can be improved.

In addition, according to the present invention, by forming the fuse line while controlling the excessive etching amount when forming the metal wiring of the cell region, it is possible to form a fuse line having a thickness suitable for the repair process without changing the process conditions without additional process, Process margins can be improved.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

1 is a cross-sectional view illustrating a fuse of a semiconductor device in accordance with an embodiment of the present invention.

As shown in FIG. 1, the first metal wiring 102 is covered on a semiconductor substrate 100 having a fuse region and a cell region including a blowing region and a first metal wiring 102 formed in the cell region. The first insulating film 104 is formed. An etch stop layer 106 is formed on the first insulating layer 104. A plurality of conductive patterns 110 are formed on the etch stop layer 106 in the fuse region portions on both sides of the blowing region, and a second metal wire 112 is formed on the etch stop layer 106 in the cell region. A first contact plug 108 is formed to contact the first and second metal wires 106 and 112. A second insulating layer 114 is formed on the semiconductor substrate 100 on which the conductive pattern 110 and the second metal wiring 112 are formed, and the second insulating layer 114 has a blowing region and a conductive pattern 110 adjacent thereto. ) Portion is formed to be exposed.
A fuse line FL is formed on the second insulating layer 114 and the etch stop layer 106 to contact the exposed conductive pattern 110 and have a thickness smaller than both sides of the blowing region in the blowing region. The second contact plug 122 and the third metal wire 124 are formed on the second metal wire 112 in the cell region.

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In addition, the fuse line FL is formed to have a width of 50 to 200% of the thickness of the fuse line FL of the blowing region in the blowing region, and is formed of a Ti film or a TiN film on the surface thereof. And first and second barrier films 116 and 120. In addition, the fuse line FL is formed of a metal film, for example, an aluminum film, of the same material as the third metal wire 124.

Here, since the fuse line FL is formed to have a thickness thinner than that of the fuse area on both sides of the blowing area, the fuse line FL has a form suitable for a repair process. As a result, repair efficiency can be improved and process margins can be improved.

2A through 2G are cross-sectional views illustrating processes of forming a fuse of a semiconductor device according to an exemplary embodiment of the present invention.

Referring to FIG. 2A, after forming predetermined lower structures (not shown) on a semiconductor substrate 100 having a fuse region and a cell region including a blowing region, a first metal wiring 102 is formed in the cell region. do. Then, the first insulating layer 104 is deposited by, for example, an oxide layer to cover the lower structures and the first metal interconnection 102.

Then, the surface of the first insulating film 104 is preferably planarized, and an etch stop film 106 is formed on the first insulating film 104 of each planarized region. The etch stop film 106 is formed of a film having an etch selectivity with the first insulating film 104, for example, a nitride film.

Referring to FIG. 2B, a conductive film, preferably a metal film, is deposited on the etch stop film 106, and then the metal film is patterned to form a second metal interconnection line in the cell region of the semiconductor substrate 100. 112 and a plurality of conductive patterns 110 are formed in the fuse region. Meanwhile, a first contact plug 108 is formed in the first insulating layer 104 and the etch stop layer 106 in the cell region to contact the second metal wiring 112 and the first metal wiring 102. This is preferred.

Referring to FIG. 2C, a second insulating layer 114 is deposited on the etch stop layer 106 in each region of the semiconductor substrate 100 to cover the conductive pattern 110 and the second metal wiring 112. It is preferable to planarize the surface of the second insulating layer 114.

Referring to FIG. 2D, the second insulating layer 114 is etched to form a trench T that exposes the first conductive pattern portion and the etch stop layer portion therebetween in the fuse region and the second region in the cell region. A contact hole H exposing the metal wire 112 is formed. In this case, the trench T is formed in the fuse region portions on both sides of the blowing region including the blowing region.

Referring to FIG. 2E, after the first barrier layer 116 is formed on the second insulating layer 114 including the contact hole H and the surface of the trench T, the first barrier layer 116 is formed on the second barrier layer 116. A conductive film, preferably a metal film 118, is formed to fill the contact hole H and the trench T in the trench. Subsequently, a second barrier film 120 is formed on the metal film 118. Preferably, the first and second barrier films 116 and 120 are formed of a Ti film or a TiN film, and the metal film 118 is preferably formed of an aluminum film.

Referring to FIG. 2F, the second barrier layer 120, the metal layer 118, and the first barrier layer 116 are etched to contact the conductive pattern 110 in the fuse region, and a blowing region is formed on both sides of the blowing region. A fuse line FL having a thickness smaller than that of the portion is formed, and a third metal wire 124 is formed in the cell region in contact with the second metal wire 112. In this case, the second contact plug 122 for contacting the second metal wire 112 and the third metal wire 124 is also preferably formed together. In addition, the fuse line FL is formed to have a width of 50 to 200% of the thickness of the fuse line FL of the blowing area in the blowing area.

Here, the present invention forms the fuse line FL by adjusting the over-etch amount of the metal film 118 formed on the etch stop layer 106, whereby the blowing region portion of the fuse line FL is formed. It can be effectively adjusted to have a thin thickness suitable for the repair process, thereby improving the repair efficiency.

Referring to FIG. 2G, a third insulating layer 126 and a passivation layer 128 are sequentially formed on each region of the semiconductor substrate 100 on which the fuse line FL and the third metal wiring 124 are formed, and then a fuse is formed. A portion of the thickness of the passivation layer 128 and the third insulating layer 126 in the region is etched to form a repair trench RT for leaving the third insulating layer 126 having a predetermined thickness on the blowing region of the fuse line FL. .

Subsequently, although not shown, a known inspection and repair including a fuse blowing process of cutting a specific fuse line FL by irradiating a laser to a fuse region of the semiconductor substrate 100 on which the repair trench RT is formed. The process is carried out in sequence.

Meanwhile, in the above-described embodiment of the present invention, a method of forming the fuse line in the same layer as the second metal wiring of the cell region is illustrated and described. However, the fuse line may include the first metal wiring, the third metal wiring, or the like. It can also be formed in the same layer as other metal wiring.

In addition, in the above-described embodiment of the present invention, as the conductive pattern serving to contact the fuse line and the external circuit, the conductive pattern formed of the same layer as the second metal wiring is illustrated and described. It is also possible to form the same layer as other metal wirings, such as a wiring and a 3rd metal wiring.

Here, the present invention can form a fuse line having a thin thickness so that the blowing region portion is suitable for the repair process by etching the metal film while controlling the excessive etching amount of the metal film formed on the etch stop film, and thus, the present invention Can effectively improve the repair efficiency.

In addition, the present invention is to form a fuse line having a thickness suitable for the repair process without changing the process conditions by forming the fuse line while controlling the excessive etching amount of the metal film of the fuse region when forming the metal wiring of the cell region. Since it can form, process margin can be improved.

As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the following claims are not limited to the scope of the present invention without departing from the spirit and scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.

1 is a cross-sectional view illustrating a fuse of a semiconductor device according to an embodiment of the present invention.

2A to 2G are cross-sectional views illustrating processes of a fuse of a semiconductor device in accordance with an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

100 semiconductor substrate 102 first metal wiring

104: first insulating film 106: etch stop film

108: first contact plug 110: conductive pattern

112: second metal wiring 114: second insulating film

T: Trench H: Contact Hole

116: first barrier film 118: metal film

120: second barrier film 122: the second contact plug

124: third metal wiring 126: third insulating film

128: protective film RT: trench for repair

Claims (13)

A semiconductor substrate having a fuse region including a blowing region; An etch stop layer formed on the semiconductor substrate; A plurality of conductive patterns formed on the etch stop layer and disposed on portions of the fuse region on both sides of the blowing region; An insulating layer formed to expose the blowing region and a portion of the conductive pattern adjacent thereto; And A fuse line formed on the insulating layer and the etch stop layer to contact the exposed conductive pattern portion, the fuse line having a thickness thinner than both sides of the blowing region in the blowing region; A fuse of the semiconductor device comprising a. The method of claim 1, And the fuse line has a width of 50 to 200% of a thickness of the fuse line of the blowing region in the blowing region. The method of claim 1, The fuse line has a barrier film on the surface of the fuse of the semiconductor device. The method of claim 3, wherein The barrier film is a fuse of the semiconductor device, characterized in that consisting of a Ti film or a TiN film. The method of claim 1, The fuse line is a fuse of the semiconductor device, characterized in that made of a metal film. The method of claim 5, wherein And the metal film is an aluminum film. Forming an etch stop layer on the semiconductor substrate having a fuse region including a blowing region; Forming an insulating film on the etch stop film; Etching the insulating layer to form a trench for exposing an etch stop layer portion of the fuse region including the blowing region; Forming a conductive film on the insulating film to fill the trench; And Etching the conductive layer to form a fuse line having a thickness thinner than the remaining fuse regions on both sides of the blowing region; A fuse forming method of a semiconductor device comprising a. The method of claim 7, wherein The etch stop layer is a fuse forming method of a semiconductor device, characterized in that formed as a nitride film. The method of claim 7, wherein After forming the trench and before forming a conductive film to fill the trench, Forming a barrier film on the insulating film including the surface of the trench; A fuse forming method of a semiconductor device, characterized in that it further comprises. The method of claim 9, And the barrier film is formed of a Ti film or a TiN film. The method of claim 7, wherein And the conductive film is formed of a metal film. The method of claim 11, And the metal film is an aluminum film. The method of claim 7, wherein And the fuse line is formed to have a width of 50 to 200% of a thickness of the fuse line in the blowing region in the blowing region.

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