KR100840327B1 - Liquid crystal display - Google Patents

Abstract

The present invention relates to a liquid crystal display device.

A liquid crystal display device according to the present invention comprises: a liquid crystal panel having a plurality of gate lines and data lines formed to cross each other perpendicularly, and pixels formed at intersections thereof; A printed circuit board on which a plurality of circuits for generating a plurality of signals including a gate signal and an image signal are mounted; A plurality of data transfer integrated circuits configured to receive the image signal and apply the data signals to data lines on the liquid crystal panel, and connect the printed circuit board and the liquid crystal panel; First to Nth (where n is an integer greater than 0) gate driving integrated circuits are mounted to receive the gate signal and apply it to a gate line on the liquid crystal panel. 2 transfer film; And a dummy pad attached between the printed circuit board and the liquid crystal panel to form a connection line for transferring the gate signal to one of the second transfer films. In particular, first to Nth gate signal wires are formed on the liquid crystal panel to transfer the gate signals to the plurality of gate integrated circuits, and the first to Nth gate signal wires have different volumes.

According to the present invention, the signal level difference generated for each gate driving integrated circuit is compensated. As a result, the display quality of the liquid crystal display device is improved.

Gate voltage, gate wiring resistance, liquid crystal display

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

1 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a schematic view of the liquid crystal display shown in FIG. 1 to indicate a wiring state.

3 is a schematic view of a liquid crystal display according to another exemplary embodiment of the present invention.

4 is a cross-sectional view illustrating a wiring state according to another embodiment of the present invention.

The present invention relates to a thin film transistor liquid crystal display (TFT LCD). More specifically, the present invention relates to a liquid crystal display device having a Mont Blanc structure.

In recent years, with the lightening and thinning of personal computers and televisions, the display device field has been required to be lighter and thinner. In order to satisfy such demands, a liquid crystal display (LCD: liquid) instead of a cathode-ray tube (CRT) is required. Flat panel displays such as crystal displays have been developed and used in various fields.

In a liquid crystal display device, an electric field is applied to a liquid crystal material having an anisotropic dielectric constant injected between two substrates, and the amount of light transmitted to the substrate is controlled by adjusting the intensity of the electric field so that a display of a desired image is obtained. Is done.

Such a liquid crystal display is largely comprised of a liquid crystal panel, a gate driver, a source driver, and a printed circuit board on which circuits for supplying signals necessary for these drivers are mounted.

The gate driver includes a plurality of gate driver ICs, each of which generates a signal for driving a gate line on the liquid crystal panel using a signal provided from a circuit on the printed circuit board and applies the signal to an assigned gate line. . Signal transmission from the printed circuit board to each gate driving IC is performed through a wiring formed on the liquid crystal panel via a dummy pad formed on the source driver side to support the printed circuit board and the liquid crystal panel.

In addition, the plurality of gate driving ICs may be mounted on a tape carrier package (TCP) and attached to either side of the liquid crystal panel or directly formed on the liquid crystal panel by a chip on glass (COG) method. In both cases, the respective gate drive ICs are connected to each other by wiring for transmitting a signal provided from a circuit on a printed circuit board. The signal transmitted to each gate driver IC through the wiring is a carry signal for signal transmission between the gate driver ICs and a gate on / off voltage signal for driving a pixel connected to the gate line of the liquid crystal panel.                         

However, when the liquid crystal panel is manufactured in a large size, the wiring connecting the gate driving IC also becomes long, and the influence of the wiring resistance due to the length of the wiring cannot be ignored. That is, a difference occurs in the gate on / off voltage signal applied to the uppermost gate line and the lowest gate line of the liquid crystal panel. That is, a difference in voltage level due to the wiring resistance occurs in the voltage signals supplied to the gate driving IC positioned at the top of the liquid crystal panel and the gate driving IC positioned at the top thereof.

This difference in voltage level causes on / off difference between pixels connected to the gate lines in the upper region and the lower region of the liquid crystal panel, and as a result, this degrades the display quality of the liquid crystal display. In addition, when a significant difference in voltage occurs, a problem occurs that the gate driving IC located in the lower region of the liquid crystal panel malfunctions.

This phenomenon is more serious in a liquid crystal display device in which the Mont Blanc method, in which the gate driving ICs are grouped and driven in a predetermined number of groups, is applied.

SUMMARY OF THE INVENTION The present invention has been made in an effort to solve a problem occurring in the related art, and by adjusting wiring resistances for transmitting signals to a plurality of gate driving ICs, the same level of signals may be transmitted to each gate driving IC. have.

According to an aspect of the present invention, there is provided a liquid crystal display device including: a liquid crystal panel having a plurality of gate lines and data lines formed perpendicularly to each other, and pixels formed at intersections thereof; A printed circuit board on which a plurality of circuits for generating a plurality of signals including a gate signal and an image signal are mounted; A plurality of data transfer integrated circuits configured to receive the image signal and apply the data signals to data lines on the liquid crystal panel, and connect the printed circuit board and the liquid crystal panel; First to Nth (where N is an integer greater than 0) gate driving integrated circuits are mounted to receive the gate signal and apply it to a gate line on the liquid crystal panel, and a plurality of agents connected to side surfaces of the liquid crystal panel. 2 transfer film; And a dummy pad attached between the printed circuit board and the liquid crystal panel to form a connection line for transferring the gate signal to one of the second transfer films, wherein the plurality of gates transmit the gate signal on the liquid crystal panel. First to Nth gate signal wires are formed to transfer to the integrated circuit, and the first to Nth gate signal wires have different volumes.

According to a second aspect of the present invention, there is provided a liquid crystal display including: a liquid crystal panel having a plurality of gate lines and data lines formed to cross each other perpendicularly, and pixels formed at intersections thereof; A printed circuit board on which a plurality of circuits for generating a plurality of signals including a gate signal and an image signal are mounted; A plurality of data driving integrated circuits formed on the liquid crystal panel and receiving an image signal from the printed circuit board and applying the image signals to the data lines on the liquid crystal panel; First to Nth gate driving integrated circuits formed in the liquid crystal panel and receiving the gate signals from the printed circuit board and applying the gate signals to the gate lines on the liquid crystal panel; And first through N-th gate signal wires for transmitting the gate signals from the printed circuit board to the first through N-th gate driving integrated circuits, respectively, wherein the first through N-th gate signal wires have different volumes. different.

In particular, the width of each wiring increases as the first through N-th gate signal wirings increases, or the height of each wiring increases as the first through N-th gate signal wirings increases, so that the volume of the wiring varies.

Further, in the liquid crystal display according to the first aspect, the first to Nth gate signal wires are respectively connected to one side of the connection line and the other of the gate direct drive circuits corresponding to the other side, so that the gate signal is driven to the corresponding gate. Each can be delivered to an integrated circuit.

In addition, one side of the first gate signal line is connected to the connection line and the other side is connected to the first gate direct drive circuit, and the remaining gate signal lines except for the first gate signal line are directly connected to the gate direct drive circuit. The gate signal formed between the driving circuits and shifted and output from the previous gate direct driving circuit may be transferred to the corresponding gate driving integrated circuit.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

1 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention.                     

In the liquid crystal display according to the exemplary embodiment of the present invention, as shown in FIG. 1, a plurality of gate lines 21 are formed on the insulating substrate 10 in the horizontal direction, and are insulated from and cross the gate lines 21 to cross the vertical direction. A plurality of data lines 61 are formed.

The gate line 21 and the data line 61 intersect to define a plurality of pixel regions P, and the plurality of pixel regions P form a display screen D for displaying an image. In each pixel area P, a thin film transistor TFT connected to the gate line 21 and the data line 61 is formed, and a pixel electrode PE connected to the thin film transistor TFT is formed. have. The black matrix 11 is formed outside the display area D to block light leaking out of the display area D.

Above the substrate 10 is a printed circuit board 100 for outputting an electrical signal for gates and data for driving the liquid crystal display device, and the substrate 10 and the printed circuit board 100 are for data signal transmission. The film 110 is electrically connected to each other. A data driving integrated circuit 130 for outputting an image signal to each pixel area P is mounted on the data signal transmitting film 110, and is connected to the data line 61 through a contact part c2 to drive the data. A plurality of data signal lines 114 for transmitting image signals from the integrated circuit 130 to the data lines 61 are formed. In addition, a plurality of gate signal input wirings 115 are formed in the film 110 for data signal transmission.

A plurality of gate signal transmission films 120 are electrically connected to the substrate 10 at the left side of the substrate 10.

Each gate signal transmission film 120 is provided with a gate driving integrated circuit 140 for outputting a gate signal (also referred to as a scan signal), and a plurality of gate signal wirings are provided on the gate signal transmission film 120. A gate signal line 126 is formed on the gate line 21 for a gate signal connected to the gate line 21 through the connection part or the contact part c1 and output from the gate driving integrated circuit 140.

A gate signal connection wire 134 is formed at the left corner outside the display area D, and the gate signal connection wire 134 is an input for the gate signal of the data signal transmission film 110 through the contact portions c3 and c4. The wiring 115 and the gate signal wiring 124 of the first gate signal transmission film 120 are electrically and physically connected to each other.

In addition, a gate signal connection line 136 is formed between the respective gate driving integrated circuits in the left substrate 10 outside the display area D, and each gate signal connection line 136 has a contact portion or a pad portion c5. is connected to the gate signal wire 124 of the gate signal transmission film 120 through c6 to transfer a signal output from the gate driving integrated circuit of the previous stage to the gate driving integrated circuit of the next stage. .

In the liquid crystal display device having such a structure, the electrical signal for the gate output from the printed circuit board 100 is transferred to the gate signal connection wiring 134 through the gate signal input wiring 115 as shown in the arrow direction of the drawing, and thus the gate. The signal is input to the first gate driving integrated circuit 140 positioned at the uppermost position through the signal line 124. Next, some of the gate electrical signals are converted into gate signals by the gate driving integrated circuit 140 and output to the gate lines 21 through the gate signal lines 126. That is, a part of the gate electrical signal applied from the printed circuit board 100 is applied to the gate line 21 through the gate signal lines 124 and 115 and the gate signal line 126.

In addition, a part of the signal input to the first gate driving integrated circuit 140 is transferred to the second gate driving integrated circuit 141 of the next stage through the connection signal 136 for the gate signal, and the second gate driving integrated circuit ( A portion of the signal input to the 141 is applied to the gate line 21 through the gate signal line 124 and the gate signal line 126 as described above, and is also applied to the next stage through the gate signal connection line 136. It is delivered to the gate drive integrated circuit.

Therefore, the electrical signal for the gate output from the printed circuit board 100 is the Nth gate drive integrated at the lowest position from the first gate drive integrated circuit through the connection wiring 136 formed between the respective gate drive integrated circuits. Passed up to the circuit.

On the other hand, in the embodiment of the present invention, in order to compensate for the voltage drop of the gate signal transmitted from the printed circuit board 100 by the wiring resistance, a plurality of gate driving arranged in the vertical direction from the printed circuit board 100 in order The widths of the individual wires that transmit signals to the integrated circuits are different from each other.

That is, the gate signal wires 134 and 124 connected to the gate signal connection wires 115 connected to the printed circuit board 100 and transferring the signals to the first gate driving integrated circuit 140, hereinafter, referred to as “first” for convenience of description. Gate signal wiring " and wirings 136 and 124 connected to the wiring 124 to transfer a signal shifted by the first gate driving integrated circuit 140 to the second gate driving integrated circuit 141, hereinafter, The widths of the " second gate signal wiring lines " At this time, since the second gate driving integrated circuit 141 is disposed at a position farther from the printed circuit board 100 than the first gate driving integrated circuit 140, the second gate driving integrated circuit 141 is larger than the width of the first gate signal wiring line. The width of the signal wiring is made wider to reduce the wiring resistance.

In order to more easily understand the concept according to the embodiment of the present invention, Fig. 2 schematically shows the wiring relationship between the gate driving integrated circuits.

As shown in FIG. 2, for example, a gate voltage generator 150 for generating a gate signal, a driving signal, and the like for driving the gate driving integrated circuit is mounted on the printed circuit board 100. A plurality of signals generated by the gate voltage generator 150 are input to the first gate driving integrated circuit 140 through the input wiring 115 and the first gate signal wiring B1, and also, the first gate driving integrated circuit. Shifted by the circuit 140 and input to the second gate driver integrated circuit 141 through the second gate signal interconnection B1, and also shifted by the second gate driver integrated circuit 141 to interconnect the third gate signal. It is input to the third gate driver integrated circuit 142 through B3.

At this time, as shown in FIG. 2, the widths of the first gate signal wire B1, the second gate signal wire B2, and the third gate signal wire B3 are different from each other. The width of the third gate signal line B3 is increased.                     

As described above, when the width of the wiring increases, the resistance generated on the wiring decreases, and thus the amount of voltage dropped from the first gate driving integrated circuit 140 to the third gate driving integrated circuit 142 is compensated. Thus, the same level of signal can be supplied to each gate driving integrated circuit.

As the above embodiment, the signals for the gate driving integrated circuit transmitted from the printed circuit board are input to the first gate driving integrated circuit, and then transferred to the Nth gate driving integrated circuit by the shift operation of each gate driving integrated circuit. Unlike the structure, the signals transmitted from the printed circuit board to each gate driving integrated circuit are transmitted through independent wirings, and the widths of the wirings are adjusted in the same way so that the upper and lower sides of the liquid crystal panel are moved by the wiring resistance. To compensate for the voltage drop.

In FIG. 3, in the liquid crystal display according to another exemplary embodiment, a wiring relationship between a printed circuit board and each gate driving integrated circuit is schematically illustrated.

Wirings B1 to B3 in which a plurality of signals generated by the gate voltage generator 150 on the printed circuit board 100 are independently connected to the respective gate driving integrated circuits 140 to 142 through the input wiring 115. Delivered through).

That is, the plurality of signals are transmitted to the first gate driving integrated circuit 140 through the first gate signal wiring B1 connected to the input wiring 115, and also the second gate signal wiring connected to the input wiring 115. The signal is transferred to the second gate driver integrated circuit 141 through B2, and also to the third gate driver integrated circuit 142 through the third gate signal wire 142 connected to the input wire 115.

As described above, even when signals transmitted from the printed circuit board 100 are transmitted to the respective gate driving integrated circuits 140 to 142 through the independent wirings B1 to B2, the first gate signals are used as shown in FIG. 3. Since the width is made wider from the wiring B1 to the third gate signal wiring B3, the amount of voltage dropped from the first gate driving integrated circuit to the third gate driving integrated circuit by the wiring resistance is compensated for. do.

Meanwhile, although the embodiments described with reference to FIGS. 2 and 3 have described the adjustment of the wiring resistance by varying the width of the wiring, the height of the wiring may be adjusted to control the wiring resistance.

4 is a cross-sectional view showing a wiring state according to another embodiment of the present invention.

As shown in FIG. 4, in order to adjust the wiring resistance, the height of the wiring increases from the first gate signal wiring to the third gate signal wiring so as to substantially increase the volume of the wiring.

That is, the following relationship holds for the heights H1 to H3 of the respective wirings.

H1 <H2 <H3

Here, H1 represents the height of the first gate signal wiring B1, H2 represents the height of the second gate signal wiring B2, and H3 represents the height of the third gate signal wiring B3.                     

In this way, when the height of the wiring increases, the wiring volume increases so that the resistance of the wiring decreases substantially. Thus, the amount of voltage falling from the first gate driving integrated circuit to the Nth gate driving integrated circuit by the wiring resistance is compensated for. .

On the other hand, in the above embodiment has been described to adjust the volume of the wiring for transmitting the gate signal applied from the gate voltage generator, the present invention is not limited to this, but all wiring for transmitting the signal to a plurality of gate driving integrated circuits The same applies to (for example, power supply wiring and the like).

In addition, in the above-described embodiments, it is described that the gate signal of the same level can be transmitted to each gate driving integrated circuit based on the structure in which the gate driving integrated circuit is mounted on the transfer film. Is a liquid crystal display having a chip on glass (COG) structure in which a data driving integrated circuit and a gate driving integrated circuit are directly mounted on an insulating substrate, that is, a thin film transistor substrate, and the integrated circuit and the printed circuit board are connected using a transfer film. The same can be applied to.

In such a COG structure, a plurality of gate signals, which transfer the gate signals transmitted from the printed circuit board to each gate driving integrated circuit, that is, the first to Nth gate signal wires connect the liquid crystal panel or the printed circuit board to the driving integrated circuit. It can be formed on the film. Even in this case, as described above, the volume of each gate signal line is made different so that the gate signal of the same level is transmitted to each gate driving integrated circuit.

On the other hand, even in the COG structure, the data signal wiring for transferring the image signal from the printed circuit board to the data driving integrated circuit may also be formed on the liquid crystal panel or the transfer film connecting the printed circuit board and the driving integrated circuit. Since the liquid crystal display of the COG structure is a known technique, a detailed description of the COG structure is omitted here.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, in the present invention, in order to compensate for the effect due to the resistance of the wiring for transmitting the gate voltage signal, the volume of the wiring is adjusted differently according to the position of the gate driving integrated circuit, so that each gate driving integrated circuit has the same level. By allowing the signal to be delivered, the signal level difference generated for each gate driving integrated circuit is compensated. As a result, the display quality of the liquid crystal display device is improved.

Claims (6)

A liquid crystal panel having a plurality of gate lines and data lines formed perpendicular to each other and pixels formed at intersections thereof; A printed circuit board on which a plurality of circuits for generating a plurality of signals including a gate signal and an image signal are mounted; A plurality of data driving integrated circuits electrically connected to the liquid crystal panel and the printed circuit board to receive the image signal and apply the image signal to a data line on the liquid crystal panel; First to N-th gate driving integrated circuits receiving the gate signal and applying the gate signal to a gate line on the liquid crystal panel; And First to Nth (N is a natural number) connecting wires for respectively transmitting gate signals from the printed circuit board to first to Nth (N is a natural number) gate driving integrated circuits, The liquid crystal display device having different volumes of the connection wirings. The method of claim 1, The length of the connection wiring from the printed circuit board to the gate driving integrated circuit increases as the width of the connection wiring increases. The method of claim 1, The longer the length of the connection wiring from the printed circuit board to the gate driving integrated circuit increases the height of the connection wiring. delete delete delete

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