KR100774157B1 - Clock Generation Circuit for Code Division Multiple Access Phones - Google Patents

Abstract

The present invention relates to a clock generation circuit of a code division multiple access (CDMA) phone, which makes it easier to variably implement 1 to 4 MHZ, which is the SIM clock frequency required by the T0 protocol of the IS-7816. The present invention relates to a SIM card for storing subscriber identification information for personal information protection and roaming between operators, and a digital device for driving control for communication with the SIM card while generating and outputting a clock for communication with the SIM card. A processor (MSM), a clock doubler that provides the clock to the SIM card by doubling the clock output from the digital processor, an auxiliary input terminal (Aux _ PCM _ Din) and an auxiliary output terminal ( Aux _ PCM _ Dout), which includes a level converter that binds and buffers the code, provides clocks up to 4.92 MHZ. The support can be a multiple access phone up the communication speed of the T0 protocol for IS-7816 is employed, and also does not require the use of SIM-only controllers, so it provides an effect that can be achieved by reduction of the product cost and simplicity of the circuit.

Code Division Multiple Access (CDMA) phones, clock doublers, and SIM cards

Description

Clock generation circuit in code division multiple access phone

1 is a block diagram of a conventional SIM card driving circuit of a code division multiple access phone.

2 is a block diagram of a clock generation circuit for driving a SIM card of a code division multiple access phone according to the present invention;

3 is a circuit diagram of an embodiment of the clock doubler of FIG.

* Description of the symbols for the main parts of the drawings *

1: Digital Processor (MSM; Mobile Station Modem)

2: Level Transfer

3: SIM card

4: power supply

5: Clock Doubler

R1: variable resistor

C1: variable capacitor

ST: Schmitt trigger

EX1: Exclusive NOR gate

The present invention relates to Code Division Multiple Access (CDMA) phones, and more particularly to 1 to 4 MHZ, which is a Subscriber Identification Module (SIM) clock frequency required by the T0 protocol of the IS-7816. The present invention relates to a clock generation circuit of a code division multiple access phone so that it can be easily and variably implemented.

SIM card means the IC card specified in IS-7816.3.

The conventional SIM card driving circuit of a code division multiple access phone includes a digital processor (MSM) 1 for controlling driving of an SIM card, and the digital processor 1 as shown in FIG. Auxiliary input terminal (Aux _ PCM _ Din) and auxiliary output terminal (Aux _ PCM _ Dout) of the) and the level converter (2) which acts as a buffer, and the SIM card (3) storing various information And a power supply device 4 for supplying power to each circuit portion.

The operation of the conventional SIM card driving circuit configured as described above is as follows.

First, the SIM card 3 stores various information for protecting personal information of a mobile communication terminal and roaming between operators.

Therefore, without the SIM card 3, it is impossible to use the terminal. In this case, the faster the communication speed between the SIM card 3 and the digital processor 1 is, the faster it can be processed in initial operation and practical use.                         

The IS-7816 only specifies that a baud rate of 2688 to 1052 can be achieved for such a baud rate, but the actual service provider wants to use a high baud rate.

However, the maximum clock that can be generated inside the conventional digital processor 1 is a baud rate of 2.46 MHZ because one board defined in IS-7816 is defined as 372 bits. ) Is only 6613, so it was impossible to cope when the user requested high baud rate service.

In particular, the use voltage of the digital processor 1 is 2.8V, which may cause data error and damage to the internal communication port of the digital processor 1 when matching with 3V or 5V, which is the use voltage of the SIM card 3. In order to prevent this, a level converter 2 serving as a buffer is provided between the digital processor 1 and the SIM card 3.

On the other hand, the power supply 4 is a device for supplying the necessary power to drive the digital processor 1 and the SIM card 3, when the SIM card 3 operates at 5V, and supplies a voltage of 5V, 3V In operation, a 3V voltage is supplied.

However, the above-mentioned conventional technology cannot satisfy the communication speed of the T0 protocol of the IS-7816 applied to the code division multiple access phone, and as described above, the maximum communication rate is only 6613. In the case of requesting a baud rate, it was difficult to cope with this problem.

Accordingly, an object of the present invention has been proposed to solve the above problems of the prior art, and is suitable for raising the clock to a certain level in order to increase the baud rate to satisfy the communication speed of a communication protocol applied to a code division multiple access phone. The present invention provides a clock generation circuit of a code division multiple access phone.
Another object of the present invention is to provide a clock doubler by adding a clock doubler to the clock portion between the digital processor and the SIM card to generate a double output clock output from the digital processor, which is capable of clocking up to 4.92 MHZ. It provides a clock generation circuit for code division multiple access phones that can support up to the maximum communication speed of the 7816's T0 protocol.

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A clock generation circuit according to the present invention for achieving the above object, generates and outputs a memory card for storing subscriber identification information for privacy protection and roaming between operators, and a clock for communication with the memory card, A digital processor for driving control for communication with the memory card, a clock doubler for providing a corresponding clock to the memory card by doubling the clock output from the digital processor, and an auxiliary input terminal of the digital processor; And a level converter which binds the auxiliary output terminals and performs buffering for input and output of the digital processor.
More preferably, the clock doubler includes an exclusive NOR gate, a Schmitt trigger, a variable resistor, and a variable capacitor, and the exclusive NOR gate inputs a clock output of the digital processor and an output of the Schmitt trigger. Outputs the double clock to the memory card, and the Schmitt trigger inputs a parallel output of the value of the variable resistor and the value of the variable capacitor grounded to the clock output of the digital processor. Convert the signal waveform, and the variable resistor and the variable capacitor adjust the clock output of the digital processor to a desired frequency.
In addition, the clock doubler is characterized by outputting a clock frequency of up to 4.92 MHZ.
Hereinafter, the present invention will be described with reference to the accompanying drawings.

2 is a block diagram of a clock generation circuit for driving a SIM card of a code division multiple access phone according to the present invention, wherein the clock generation circuit of the present invention is a digital processor 1 and a level converter 2; And a SIM card (3), a power supply (4) and a clock doubler (10).
The digital processor 1 generates and outputs a clock for communication with the SIM card 3 and also controls the driving of the 3 for communication with the SIM card 3.
The level converter 2 binds the auxiliary input terminal Aux _ PCM _ Din and the auxiliary output terminal Aux _ PCM _ Dout of the digital processor 1, and acts as a buffer to buffer the input and output of the digital processor. Do this.
The subscriber identification module (SIM) card 3 is an integrated circuit (IC) card, which is a type of memory card, in which subscriber identification information for protecting personal information of a mobile communication terminal and roaming between operators is stored.
The power supply 4 supplies the power required for driving to the components of the circuit of the present invention.
The clock doubler 10 is connected between the clock terminal (Aux _ PCM _ Clk) of the digital processor 1 and the clock terminal (Clock) of the SIM card 3 to output a clock output from the digital processor 1. Create by ship. Then, the double clock is provided to the SIM card 3.

FIG. 3 is a circuit diagram of an embodiment of the clock doubler 10 of FIG. 2, wherein the clock doubler 10 includes an exclusive NOR gate EX1, a schmitt trigger ST, and a variable resistor. R1) and variable capacitor C1. Variable resistor (R1) and variable capacitor (C1) for adjusting the clock (IN) output from the digital processor 1 to the desired frequency, and the signal waveform through the variable resistor (R1) and variable capacitor (C1) A Schmitt trigger (ST) for converting the signal into a predetermined waveform, and an Exclusive NOR gate that logically exclusive negates and receives the output clock (IN) of the digital processor (1) and the output of the Schmitt trigger (ST). It comprises a (EX1). More specifically, the exclusive NOR gate EX1 outputs the double clock to the SIM card 3 by inputting the clock output of the digital processor 1 and the output of the Schmitt trigger ST. do. In addition, the Schmitt trigger ST inputs the output of the parallel connection between the value of the variable resistor R1 and the value of the variable capacitor C1 grounded with respect to the clock output of the digital processor 1. Convert the input signal waveform.

In addition, the clock doubler 10 is configured to output a clock frequency of up to 4.92 MHZ.                     

The operation of the present invention configured as described above will be described with reference to FIGS. 2 and 3.

As shown in FIG. 2, the clock doubler 10 is connected between the clock terminal Aux _ PCM _ Clk of the digital processor 1 and the clock terminal Clock of the SIM card 3, so that the digital processor 1 is connected. Will generate twice the clock output.

As shown in FIG. 3, the clock doubler 10 variably adjusts the values of the variable resistor R1 and the variable capacitor C1 and outputs them from the clock terminal Aux _ PCM _ Clk of the digital processor 1. Since the clock IN is adjusted to the desired frequency, the distortion of the output waveform can be adjusted.

 The signal waveform through the variable resistor R1 and the variable capacitor C1 is converted into a predetermined waveform through the Schmitt trigger ST and then applied to one input terminal of the exclusive NOR gate EX1.

At this time, since the output clock IN of the digital processor 1 is applied to the other input terminal of the exclusive NOR gate EX1, the output of the Schmitt trigger ST and the digital output of the Schmitt trigger ST are generated at the exclusive NOR gate EX1. The output clock Aux _ PCM _ Clk of the processor 1, that is, the input IN of the clock doubler 10 is exclusively negated and input to the clock terminal Clock of the SIM card 3.

For example, assuming that the operator wants to operate at 9600 baud rate, a clock having a frequency of 9600 x 372 = 3.5712 MHZ should be input to the clock terminal (Clock) of the SIM card 3.

Therefore, in this case, the output terminal Aux _ PCM _ Clk of the digital processor 1 generates only the clock frequency of 1.7856 MHZ, which is 1/2 of 3.5712 MHZ, and inputs it to the input terminal IN of the clock doubler 10. In this case, the clock doubler 10 may generate 3.5712 MHZ, which is twice the clock frequency output from the digital processor 1, 1.7856 MHZ, and input the same to the clock terminal of the SIM card 3.

As a result, the digital processor 1 and the SIM card 3 can communicate at a 9600 baud rate which has not been possible in the past.

In particular, the clock doubler 10 may output a clock frequency of 3.5 to 4 MHZ bands preferred by the service provider as well as a maximum clock frequency of 4.92 MHZ.

As described above, the present invention provides a clock capable of up to 4.92 MHZ by doubling the clock output from the digital processor by installing a clock doubler in a clock portion between the digital processor and the SIM card. It can support up to the maximum communication speed of the IS-7816's T0 protocol, which is adopted in code division multiple access phones, and it can simplify the circuit and reduce the product cost by eliminating the need for a dedicated SIM controller. .

Claims (4)

In the clock generation circuit of a code division multiple access phone, A memory card storing subscriber identification information for roaming between personal information protection and communication service providers; A digital processor which generates and outputs a clock for communication with the memory card and performs drive control for communication with the memory card; A clock doubler for providing a clock having a corresponding clock frequency to the memory card by increasing a clock output from the digital processor to a multiple determined according to the baud rate in order to increase the baud rate according to a communication speed required for the phone; And a level converter which binds the auxiliary input terminal and the auxiliary output terminal of the digital processor and buffers the input and output of the digital processor. Claim 2 was abandoned when the setup registration fee was paid. The clock circuit of claim 1, wherein the clock doubler includes an exclusive NOR gate, a Schmitt trigger, a variable resistor, and a variable capacitor, and the exclusive NOR gate includes a clock output of the digital processor and an output of the Schmitt trigger. Outputs the double clock to the memory card, and the Schmitt trigger inputs a parallel output of the value of the variable capacitor and the grounded variable capacitor with respect to the clock output of the digital processor. And converting the input signal waveform, and the variable resistor and the variable capacitor adjust the clock output of the digital processor to a desired frequency. Claim 3 was abandoned when the setup registration fee was paid. 2. The clock generation of a code division multiple access phone as set forth in claim 1, wherein said clock is further configured to provide a clock having a clock frequency of up to 4.92 MHZ to the memory card by setting a clock output from the digital processor in a predetermined multiple. Circuit. Claim 4 was abandoned when the registration fee was paid. The clock generation circuit of claim 1, wherein the clock doubler doubles a clock output from the digital processor.

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