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KR100755560B1 - Reference voltage generator of liquid crystal display - Google Patents

Reference voltage generator of liquid crystal display Download PDF

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KR100755560B1
KR100755560B1 KR1020030014828A KR20030014828A KR100755560B1 KR 100755560 B1 KR100755560 B1 KR 100755560B1 KR 1020030014828 A KR1020030014828 A KR 1020030014828A KR 20030014828 A KR20030014828 A KR 20030014828A KR 100755560 B1 KR100755560 B1 KR 100755560B1
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reference voltage
voltage
liquid crystal
source driver
crystal display
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KR20040079784A (en
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조규춘
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비오이 하이디스 테크놀로지 주식회사
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3406Control of illumination source
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3685Details of drivers for data electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3696Generation of voltages supplied to electrode drivers

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

본 발명은 액정표시장치를 개시한다. 개시된 본 발명에 따른 액정표시장치는, 전원전압을 인가받아 기준전압 분배부의 각 기준전압을 동일하게 유지될수 있도록 스위칭조절을 하는 기준전압보정부;The present invention discloses a liquid crystal display device. According to an exemplary embodiment of the present invention, there is provided a liquid crystal display device comprising: a reference voltage compensator configured to control switching so that each reference voltage of a reference voltage divider may be kept the same by receiving a power supply voltage;

상기 기준전압 보정부와 접지전압사이에 직렬로 결합되어 상기 기준전압 보정부가 인가하는 전압에 따라 복수의 기준전압이 일정하게 분배시키는 기준전압 분배부; 및 상기 기준전압 분배부에서 출력된 기준전압을 소오스 드라이버에 전달하는 출력부를 구비하여 액정에 동일한 기준전압을 인가하는 것을 목적으로 한다.A reference voltage divider coupled in series between the reference voltage corrector and a ground voltage to uniformly distribute a plurality of reference voltages according to a voltage applied by the reference voltage corrector; And an output unit configured to transfer the reference voltage output from the reference voltage divider to a source driver, thereby applying the same reference voltage to the liquid crystal.

Description

액정표시장치의 기준전압 발생기{Referent Voltage Generating Curcuit Of Liquid Crystal Display device}Reference voltage generator for liquid crystal display device {Referent Voltage Generating Curcuit Of Liquid Crystal Display device}

도 1은 일반적인 칩 온 글래스방식의 액정표시장치를 나타낸 블럭도.1 is a block diagram showing a typical chip on glass type liquid crystal display device.

도 2는 기준전압이 액정패널부로 출력되는 과정을 설명하기 위한 블럭도.2 is a block diagram illustrating a process of outputting a reference voltage to the liquid crystal panel unit.

도 3은 종래의 기준전압 발생기를 설명하기 위한 회로도.3 is a circuit diagram for explaining a conventional reference voltage generator.

도 4는 본 발명에 따른 기준전압 발생기를 설명하기 위한 회로도.4 is a circuit diagram illustrating a reference voltage generator according to the present invention.

도 5는 본 발명에 따른 스위칭 소자의 구동방법을 설명하기 위한 회로도.5 is a circuit diagram for explaining a method of driving a switching device according to the present invention.

본 발명은 액정표시장치에 관한 것으로서, 특히 칩 온 글래스 방식으로 액정표시장치를 구성시, 소오스 드라이버부에 기준전압을 인가하는 기준전압 분배부를 포함한 액정표시장치에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device including a reference voltage distribution unit for applying a reference voltage to a source driver unit when the liquid crystal display device is configured in a chip on glass method.

일반적으로 액정표시장치는 직접 영상을 디스플레이하는 액정패널부와, 외부신호를 통해 RGB 디지털 데이터 신호를 인가받아 소오스 드라이버 아이시로 데이터를 분배하고 게이트 드라이버 아이시를 제어하는 타이밍 제어부와, 상기 타이밍 ㅣ제어부에서 인가한 RGB디지털 데이터를 아날로그 데이터로 변환하여 데이터 라인으 로 출력하는 소오스 드라이버부와, 상기 소오스 드라이버부가 구동할 수 있도록 주사신호를 인가하여 길을 열어주는 게이트 드라이버부로 크게 나뉜다. In general, a liquid crystal display device includes a liquid crystal panel unit which directly displays an image, a timing controller which receives an RGB digital data signal through an external signal, distributes data to a source driver IC, and controls a gate driver IC, and the timing controller A source driver unit converts the applied RGB digital data into analog data and outputs the data to a data line, and a gate driver unit applies a scan signal to drive the source driver unit to open a road.

이하, 첨부된 도면을 이용하여 일반적인 칩 온 글래스 방식의 액정표시장치를 설명하면 다음과 같다.Hereinafter, a liquid crystal display of a general chip on glass method will be described with reference to the accompanying drawings.

도 1은 일반적인 액정표시장치를 나타낸 블럭도이다. 도시된 바와 같이, 본 발명에 따른 액정표시장치는 액정패널부(100), 게이트 드라이버부(미도시), 소오스 드라이버부(110), 기준전압 발생기(미도시)및 타이밍 제어부(120)로 구성된다.1 is a block diagram showing a general liquid crystal display device. As shown, the liquid crystal display according to the present invention includes a liquid crystal panel unit 100, a gate driver unit (not shown), a source driver unit 110, a reference voltage generator (not shown), and a timing controller 120. do.

액정패널부(100)는 복수의 박막 트랜지스터가 매트릭스 형상으로 종횡 배치된 기판 사이에 RGB 액정이 주입되어 형성되며, 동일한 가로 라인에 배치된 박막트랜지스터는 동일한 스캔 라인을 공유하고 동일한 세로 라인에 배치된 박막트랜지스터는 동일한 컬럼 라인을 공유하도록 형성된다.The liquid crystal panel unit 100 is formed by injecting RGB liquid crystals between substrates in which a plurality of thin film transistors are vertically and horizontally disposed in a matrix shape, and the thin film transistors disposed on the same horizontal line share the same scan line and are disposed on the same vertical line. The thin film transistors are formed to share the same column line.

기준전압 발생기는 상기 전원전압을 인가받아 RGB디지털 데이터 신호의 기준이 되는 전압을 전압 특성에 따른 기준전압으로 분배하여 소오스 드라이버부에 상기 기준전압을 인가한다.The reference voltage generator receives the power supply voltage and distributes the reference voltage of the RGB digital data signal to the reference voltage according to the voltage characteristics to apply the reference voltage to the source driver.

타이밍 제어부(120)는, 액정표시장치 외부 신호에 의해 R,G,B데이터 신호들과, 프레임 구별신호인 수직동기 신호와, 라인 구별신호인 수평동기 신호및 기타 신호를 각각 제공 받아 소오스 드라이버부(110)및 게이트 드라이버부를 구동하기 위한 디지털 신호및 상기 기준전압 발생기의 전원전압으로 사용되는 아날로그 전압(AVDD)을 출력한다.The timing controller 120 receives R, G, and B data signals, a vertical synchronization signal as a frame discrimination signal, a horizontal synchronization signal as a line discrimination signal, and other signals by external signals of the liquid crystal display, respectively. A digital signal for driving the gate driver 110 and an analog voltage AVDD used as a power supply voltage of the reference voltage generator are output.

또한 상기 타이밍 제어부(120)에서 발생된 디지털 신호및 아날로그 기준전압(AVDD)을 복수의 소오스 드라이버부(110)에 전달하기 위해 FPC(130 Flexible Printed Circuit)로 연결된다.In addition, the digital signal and the analog reference voltage AVDD generated by the timing controller 120 are connected to a plurality of source driver units 110 by an FPC (130 Flexible Printed Circuit).

게이트 드라이버부는 상기 타이밍 제어부(120)로부터 게이트 클럭신호와 수직라인신호를 제공받고 구동전압 발생기(미도시)로부터 온/오프(On/off) 전압을 제공받아 액정패널상의 각 화소를 1열씩 순차적으로 스캐닝한다. The gate driver receives a gate clock signal and a vertical line signal from the timing controller 120 and receives an on / off voltage from a driving voltage generator (not shown) to sequentially sequence each pixel on the liquid crystal panel by one column. Scan.

소오스 드라이버부(110)는, 복수의 소오스 드라이버 아이시(112)가 장착되며 디지털-아날로그 변환부와, 출력 회로부를 구비하여, 상기 타이밍 제어부(120)에서 인가한 RGB 디지털 데이터신호에 따라 상기 기준전압 발생기에서 인가된 기준전압을 기준으로 상기 디지털-아날로그 변환부에서 아날로그 전압으로 변환하여 출력회로부의 버퍼 증폭부(미도시)에서 증폭된 출력전압을 데이터 라인(114)에 인가한다.The source driver 110 includes a plurality of source driver ICs 112 and includes a digital-to-analog converter and an output circuit, according to the RGB digital data signal applied by the timing controller 120. The digital-to-analog converter converts the analog voltage to an analog voltage based on the reference voltage applied from the voltage generator, and applies the output voltage amplified by the buffer amplifier (not shown) of the output circuit to the data line 114.

이때 상기 기준전압이 각 소오스 드라이버 아이시(112)에 인가되는 과정에서 배선이 가늘어지고 집약됨에 따라 배선저항이 늘어나고 임피던스가 증가하여 각 소오스 드라이버 아이시(112)에 인가되는 기준전압이 상기 배선저항에 따라 감소되는 문제가 발생하게 된다.At this time, as the wiring becomes thinner and aggregated in the process of applying the reference voltage to each source driver IC 112, the wiring resistance increases and the impedance increases, so that the reference voltage applied to each source driver IC 112 becomes the wiring resistance. As a result, a problem occurs that is reduced.

여기서 참조부호 AVDD는 상기 타이밍 제어부(120)에서 인가되는 아날로그전원전압을, AVDD1은 첫 번째 소오스드라이버아이시(X1)의 기준전압을, AVDD2는 두번째 소오스 드라이버 아이시(X2)의 기준전압을, AVDDn은 n번째 소오스 드라이버 아이시(Xn)의 기준전압을 나타낸다. 또한 r1은 상기 기준전압을 각각의 소오스 드라이버 아이시에 전달하는 배선에 있어서 상기 타이밍 제어부(130)에서 X1까지의 배선 저항을 나타내고, r2는 X1에서 X2까지의 배선저항을, rn은 Xn-1에서 Xn까지의 배선저항을 나타낸다. Here, reference numeral AVDD denotes an analog power supply voltage applied by the timing controller 120, AVDD 1 denotes a reference voltage of the first source driver Icy X1, and AVDD 2 denotes a reference voltage of the second source driver Icy X2. Is the reference voltage of the nth source driver IC Xn. In addition, r 1 represents wiring resistance from the timing controller 130 to X1 in the wiring for transmitting the reference voltage to each source driver IC, r 2 represents wiring resistance from X1 to X2, and r n represents Xn. Wiring resistance from -1 to Xn is shown.

상기와 같의 방식의 액정표시장치에서 각각의 배선저항에 따른 기준전압 강하량을 계산하면 아래의 수학식 1로 표현된다.In the above-described liquid crystal display device, when the reference voltage drop according to the wiring resistance is calculated, it is represented by Equation 1 below.

Figure 112003008323788-pat00001
Figure 112003008323788-pat00001

Figure 112003008323788-pat00002
,
Figure 112003008323788-pat00002
,

Figure 112003008323788-pat00003
Figure 112003008323788-pat00003

여기서 D1은 r1에 의한 기준전압 강하량을, D2는 r1, r2 에의한 기준전압 강하량을, Dn은 r1,r2,...rn에 의한 기준전압 강하량을 나타낸다. Wherein D 1 is the reference voltage drop by r 1, D 2 is r 1, the reference voltage drop by r 2, D n is r 1, r 2, ... indicate the reference voltage drop by r n.

상술한 바와같이, 타이밍 제어부(120)에서 출력된 전원전압(AVDD)과 n번째 소오스 드라이버 아이시(Xn)의 전원전압(AVDD)의 차이는 배선저항에 의해 D_n의 차이가 남을 알 수 있다.As described above, the difference between the power supply voltage AVDD output from the timing controller 120 and the power supply voltage AVDD of the n-th source driver Icy Xn may indicate a difference in D_n due to the wiring resistance.

이러한 기준전압 강하량이 소오스 드라이버부(110)의 출력전압에 미치는 영향을 상세히 설명하기 위해 도면을 참조하면 다음과 같다.Referring to the drawings to describe in detail the effect of the reference voltage drop on the output voltage of the source driver unit 110 as follows.

도 2는 기준전압 발생기와 소오스 드라이버부(110)와의 연결관계를 나타낸 블럭도이다. 도시된 바와 같이, 소오스 드라이버부(110)는 상기 타이밍 제어부(120)에서 인가하는 전원전압(AVDD)을 기준으로 복수의 기준전압을 생성하는 기준전압 발생기(202)와, 상기 기준전압 발생기(202)에서 인가하는 기준전압및 RGB각각의 디지털 데이터를 아날로그 전압으로 바꾸는 디지털-아날로그 변환부(204)와, 상기 디지털/아날로그 변환부(204)에서 전환된 아날로그 전압(OUT1~OUT2)을 데이터 라인으로 인가하는 출력회로부(206)로 구성된다. 2 is a block diagram illustrating a connection relationship between a reference voltage generator and the source driver unit 110. As illustrated, the source driver 110 may include a reference voltage generator 202 for generating a plurality of reference voltages based on the power voltage AVDD applied by the timing controller 120, and the reference voltage generator 202. The analog-to-analog converter 204 converts the digital data of the reference voltage and RGB applied to the analog voltage into an analog voltage, and the analog voltages OUT1 to OUT2 converted by the digital / analog converter 204 into data lines. It consists of an output circuit part 206 to apply.

여기서 전압강하와 관련된 기준전압 발생기(202)를 좀 더 상세히 설명하면 다음과 같다.Here, the reference voltage generator 202 related to the voltage drop will be described in more detail.

도 3은 종래의 기준전압 발생기(202)를 나타낸 회로도이다. 3 is a circuit diagram illustrating a conventional reference voltage generator 202.

도시된 바와 같이, 기준전압 발생기(202)는 상기 타이밍 제어부(120)에서 인가한 전원전압(AVDD)과 접지단자(GND)사이에 복수의 분할저항회로(R1~R8)가 직렬로 연결되어 있으며, 상기 각 저항과 저항사이에서 기준전압(GAMMA1~GAMMA10)을 생성한다.As illustrated, the reference voltage generator 202 has a plurality of split resistance circuits R1 to R8 connected in series between the power voltage AVDD applied by the timing controller 120 and the ground terminal GND. The reference voltages GAMMA1 to GAMMA10 are generated between the resistors and the resistors.

상기 기준 전압(GAMMA1~GAMMA10)은 복수의 저항(R1~R8)의 비에 따라 결정된다. The reference voltages GAMMA1 to GAMMA10 are determined according to the ratio of the plurality of resistors R1 to R8.

여기서 상기 복수의 저항(R1~R8)은 소오스 드라이버아이시마다 동일하므로 결국 기준전압(GAMMA1~GAMMA10)의 차이는 수학식 1에서의 배선저항에 따른 기준전압 강하량(D_1~D_n)의 차이에 의해 달라지게 된다. Here, since the plurality of resistors R1 to R8 are the same for each source driver IC, the difference in the reference voltages GAMMA1 to GAMMA10 is different depending on the difference in the reference voltage drops D_1 to D_n according to the wiring resistance in Equation 1. You lose.

즉, 동일한 RGB 디지털 데이터를 소오스 드라이버아이시(112)에 입력했음에도 불구하고, 상기 배선저항(r_1~r_n)에 따른 기준전압 강하량(D_1~D_n)에 따라 소오스드라이브 아이시(112)에 인가되는 기준전압이 달라지게 되므로 결국 액정으로 출력되는 아날로그 전압값에 차이가 발생하는 것이다. That is, even though the same RGB digital data is input to the source driver IC 112, the source drive IC 112 is applied to the source drive IC 112 according to the reference voltage drop amounts D_1 to D_n corresponding to the wiring resistances r_1 to r_n. Since the reference voltage is changed, a difference occurs in the analog voltage value output to the liquid crystal.

기준전압 강하량에 따른 각 소오스 드라이버 아이시(112)의 제1 기준전압(GAMMA1)을 계산해보면 다음의 수학식 2와 같다.The first reference voltage GAMMA1 of each source driver IC 112 according to the reference voltage drop amount is calculated as shown in Equation 2 below.

Figure 112003008323788-pat00004
Figure 112003008323788-pat00004

Figure 112003008323788-pat00005
Figure 112003008323788-pat00005

Figure 112003008323788-pat00006
Figure 112003008323788-pat00006

위의 식에서 보는바와 같이, 각각 소오스 드라이버 아이시(112)마다 배선저항(r_1~r_n)에 따른 기준전압 강하량(D_1~D_n)만큼의 제1 기준전압(GAMMA1)값에 차이가 발생하게 되며, 위와 같은 방식으로 각 기준전압을 계산하면 나머지 기준전압(GAMMA2~GAMMA10)에서도 같은 비율의 차이가 발생하게 되며, 결국, 이러한 현상은 액정표시장치에 있어서 소오스드라이버 아이시간의 블럭현상으로 나타나게 된다.As shown in the above equation, a difference occurs in the first reference voltage GAMMA1 value corresponding to the reference voltage drop amounts D_1 to D_n according to the wiring resistances r_1 to r_n for each source driver IC 112, respectively. When the respective reference voltages are calculated in the above manner, the same ratio difference occurs in the remaining reference voltages GAMMA2 to GAMMA10. As a result, this phenomenon appears as a block phenomenon of the source driver eye time in the LCD.

특히 소오스 드라이버 아이시(112)를 액정패널부(100)에 같이 실장하는 칩 온 글래스(Chip On Glass)방식은, 인가 신호 및 전원라인이 액정패널부에 함께 설치되어야 하므로, 상기 전원전압(AVDD)의 경우, 배선폭이 증가하게 되어 배선저항이 늘어나게 되고, 결국 기준전압 강하의 원인이 된다. In particular, in the chip on glass method in which the source driver IC 112 is mounted on the liquid crystal panel unit 100, since the application signal and the power line must be installed together with the liquid crystal panel unit, the power supply voltage AVDD. ), The wiring width increases, resulting in an increase in wiring resistance, which in turn causes a drop in the reference voltage.

즉,소오스 드라이버아이시에 공급되는 전압 강하량차이로 인해 기준전압이 데이터 라인에 일정한 간격으로 인가 되지 못하여 섬세한 화상을 표시하는데 어려움이 발생하게 된다.That is, the reference voltage is not applied to the data line at regular intervals due to the difference in the voltage drop supplied to the source driver IC, which causes difficulty in displaying a delicate image.

따라서 본 발명은 상기와 같은 종래의 문제점을 해결하기 위하여 안출한 것으로써, 기준전압 발생기의 제1 기준전압과 전원전압(AVDD) 사이에 기준전압보정부를 구비함으로써, 각 소오스 드라이버 아이시에 동일한 기준전압이 공급되게 하는 액정표시장치를 제공하는데 있다. Accordingly, the present invention has been made to solve the above-mentioned conventional problems, and includes a reference voltage compensator between the first reference voltage of the reference voltage generator and the power supply voltage AVDD, thereby providing the same reference voltage at each source driver IC. It is to provide a liquid crystal display device to be supplied.

상기 목적을 달성하기 위한 본 발명은 전원전압을 인가받아 RGB 디지털 데이터 신호의 기준이 되는 기준전압을 복수의 소오스 드라이버로 공급하는 기준전압 발생기에 있어서, 전원전압을 인가받아 상기 소오스 드라이버로 공급되는 기준전압이 동일하게 유지될 수 있도록 스위칭 조절한 보정전압을 출력하는 기준전압 보정부; 상기 기준전압 보정부와 접지 전압 사이에 직렬로 결합되어 상기 보정전압을 기준전압으로 일정하게 분배시키는 기준전압 분배부; 및 상기 기준전압 분배부에서 출력된 기준전압을 상기 소오스 드라이버에 전달하는 출력부를 포함하며, 상기 기준전압 보정부는 상기 전원전압과 상기 기준전압 분배부 사이에 배치되고, 복수의 저항이 병렬로 연결되며, 상기 복수의 저항 각각에는 온/오프를 제어하는 스위칭 소자가 직렬로 결합되어 있는 것을 특징으로 한다.In order to achieve the above object, the present invention provides a reference voltage generator for supplying a reference voltage, which is a reference for an RGB digital data signal, to a plurality of source drivers by receiving a power supply voltage. A reference voltage corrector for outputting a switching voltage adjusted to maintain the same voltage; A reference voltage divider coupled in series between the reference voltage corrector and a ground voltage to uniformly distribute the correction voltage to a reference voltage; And an output unit configured to transfer the reference voltage output from the reference voltage divider to the source driver, wherein the reference voltage corrector is disposed between the power supply voltage and the reference voltage divider, and a plurality of resistors are connected in parallel. Each of the plurality of resistors is characterized in that the switching element for controlling the on / off is coupled in series.

이하 첨부된 도면을 참조하여 상세히 설명하면 다음과 같다. Hereinafter, described in detail with reference to the accompanying drawings.

도 4는 본 발명에 따른 기준전압 발생기를 설명하기 위한 회로도이다. 도시된 바와 같이, 기준전압 발생기는 기준전압 보정부(420)와, 기준전압 분배부(440)를 구비한다.4 is a circuit diagram illustrating a reference voltage generator according to the present invention. As shown, the reference voltage generator includes a reference voltage corrector 420 and a reference voltage divider 440.

상기 기준전압 보정부(420)는 전원전압과 제 1기준전압 사이에 연결되며, 복수의 저항(R0,Ra,Rb,Rc..Rn)이 병렬로 연결되어 있으며, 첫번째 저항(R0)을 제외한 복수의 저항(Ra,Rb,Rc..Rn)에 각각 직렬로 연결된 스위칭 소자(SW1~SWn)가 연결되어 있다.The reference voltage corrector 420 is connected between the power supply voltage and the first reference voltage, and a plurality of resistors R0, Ra, Rb, Rc..Rn are connected in parallel, except for the first resistor R0. Switching elements SW1 to SWn connected in series to a plurality of resistors Ra, Rb, and Rc..Rn are respectively connected.

상기 스위칭 소자(SW1~SWn)는 외부에서 온/오프(On/Off) 조절이 가능하도록 구성된다. 여기서 참조부호 I는 전원전압(AVDD)을 인가할 때 상기 기준전압 발생회로에 흐르는 전체전류이며, 참조부호 Va는 상기 기준전압 보정부(420)에 흐르는 전압이다. The switching elements SW1 to SWn are configured to be controlled on / off from the outside. Here, reference numeral I is a total current flowing through the reference voltage generating circuit when the power supply voltage AVDD is applied, and reference numeral Va is a voltage flowing through the reference voltage corrector 420.

상기 발명에 따른 방법을 상기 수학식 1과 수학식 2와 비교하여 설명하면, 상기 기준전압 보정부(420)가 없을 경우에, Xn번째 소오스 드라이버 아이시의 아날로그전압강하량

Figure 112003008323788-pat00007
이고, 이때 제1감마전압은
Figure 112003008323788-pat00008
이므로, 상기 전압강하량을 보상하기 위해선 결국, 제 1기준전압(GAMMA1)에 흐르는 전압은
Figure 112003008323788-pat00009
이 되어야 한다.When the method according to the present invention is described in comparison with Equation 1 and Equation 2, the analog voltage drop amount of the Xn-th source driver Icy when the reference voltage corrector 420 is not present
Figure 112003008323788-pat00007
Where the first gamma voltage is
Figure 112003008323788-pat00008
In order to compensate for the voltage drop, the voltage flowing in the first reference voltage GAMMA1 is eventually
Figure 112003008323788-pat00009
Should be

그러므로 제1 감마전압(GAMMA1)에 흐르는 전압강하량 D_n을 없애기 위해서 기준전압 보정부(420)의Va값이 D_n의 값과 같고 부호가 반대가 되면 된다. 이때, R0이외의 스위칭 소자는 오프(OFF)시킨다.Therefore, in order to eliminate the voltage drop amount D_n flowing in the first gamma voltage GAMMA1, the value of Va of the reference voltage corrector 420 is equal to the value of D_n and the sign is reversed. At this time, the switching elements other than R0 are turned off.

여기서 Va=R0*I이므로 저항 R0를 적절히 설정함으로써 조절이 가능하다. Since Va = R0 * I, adjustment can be made by appropriately setting the resistor R0.

다음으로 X2의 소오스 드라이버 아이시의 경우, 기준전압 강하량이

Figure 112003008323788-pat00010
이므로, 이때 제1 기준전압은
Figure 112003008323788-pat00011
이므로 ,
Figure 112003008323788-pat00012
이 되어 회로의 제 1기준전압에 흐르는 전압강하량 D_2를 없애기 위해서는 결국 D_2=Va가 되어야 한다. 그러므로 상기 기준 전압 보정부(420)의 Ra저항을 온(ON)시킨후 Ra값을 조절한다. 이때 상기 기준 전압 보정부(420)에 흐르는 전압은Va=(R0*Ra)/(R0+Ra))*I가된다. 상기 식에서 R0저항 값은 앞서 계산한 상기 X_n번째 소오스 드라이브 아이시에서 정해진 저항값이다.Next, for the source driver IC of X2, the reference voltage drop is
Figure 112003008323788-pat00010
In this case, the first reference voltage is
Figure 112003008323788-pat00011
Because of ,
Figure 112003008323788-pat00012
Thus, in order to eliminate the voltage drop amount D_2 flowing to the first reference voltage of the circuit, it should be D_2 = Va. Therefore, after the Ra resistance of the reference voltage corrector 420 is turned on, the Ra value is adjusted. At this time, the voltage flowing through the reference voltage corrector 420 becomes Va = (R0 * Ra) / (R0 + Ra)) * I. In the above formula, the R0 resistance value is a resistance value determined in the X_n-th source drive IC.

위와 같은 방법으로 각 소오스 드라이버 아이시마다 스위칭 소자를 차례로 온/오프 시켜 기준전압값을 일정하게 구성할 수 있다. 이때 상기 스위칭 소자의 온/오프 조절은 외부에서 선택할 수 있도록 구성한다. As described above, the reference voltage value can be configured to be constant by sequentially turning on / off the switching element for each source driver IC. At this time, the on / off control of the switching element is configured to be selected from the outside.

다음으로 도 5는 상기 스위칭 회로를 설명 하기 위한 회로도이다. 도시된 바와 같이, 세 개의 스위칭 회로를 설치하여 차례로 온/오프 시킬 경우, 두개의 입력신호단자(A,B)를 이용하여, 하나의 오아 게이트(OR1)로 SW1을 조절하고, 하나의 앤드게이트(AND1)와 하나의 오아 게이트(OR2)를 상기 입력신호와 병렬로 연결하여 SW2신호를 조절하며, 마찬가지로 하나의 앤드게이트(AND2)를 상기 입력신호와 병렬로 연결하여 SW3신호를 조절한다. 상술한 바와 같이, 회로를 연결한 후 입력 신호에 따라 A,B의 입력신호를 인가하게 되면, 표 1과 같은 진리표를 얻을 수 있다.5 is a circuit diagram for explaining the switching circuit. As shown in the drawing, when three switching circuits are installed to turn on / off one by one, two input signal terminals A and B are used to control SW1 with one OR gate OR1 and one AND gate. The AND1 and one OR gate OR2 are connected in parallel with the input signal to adjust the SW2 signal, and similarly, the one AND gate AND2 is connected in parallel with the input signal to adjust the SW3 signal. As described above, if the input signal of A and B is applied according to the input signal after connecting the circuit, the truth table shown in Table 1 can be obtained.

(표 1)Table 1

Figure 112003008323788-pat00013
Figure 112003008323788-pat00013

한편, 소오스 드라이버아이시의 개수에 따라 스위칭 소자를 더 확장할 경우, 도 5의 오아 및 앤드 게이트를 적절히 증가시킬 수 있도록 구성한다.On the other hand, when the switching element is further extended according to the number of source driver ICs, the ora and end gates of FIG. 5 may be appropriately increased.

이상에서와 같이, 본 발명에 따른 액정표시장치의 기준전압 발생기에 의하면, 칩 온 글래스 타입(Chip On Glass Type)으로 액정표시장치를 구성하였을 경우, 배선 저항에 의한 기준전압 강하량의 차이로 인하여 소오스드라이버 아이시에 입력되는 기준전압레벨의 차이가 발생할 경우,상기 기준전압 발생기에 구비된 기준전압 보정부에 의해 동일한 레벨의 기준전압을 액정셀에 출력할 수 있으므로 매끄러운 영상표시가 가능하여 깨끗한 화질을 얻을 수 있는 효과가 있다.As described above, according to the reference voltage generator of the liquid crystal display device according to the present invention, when the liquid crystal display device is configured as a chip on glass type, the source voltage drop due to the wiring resistance causes a difference in source. When a difference in the reference voltage level input to the driver is generated, the reference voltage compensator provided in the reference voltage generator can output the same level of the reference voltage to the liquid crystal cell, so that a smooth image can be displayed and a clean image can be obtained. It can be effective.

한편, 본 발명은 상술한 특정의 바람직한 실시예에 한정되지 아니하며, 청구 범위에서 청구하는 본 발명의 요지를 벗어남이 없이 당해 발명이 속하는 분야에서 통상의 지식을 가진 자라면 누구든지 다양한 변경 실시가 가능 할 것이다.On the other hand, the present invention is not limited to the above-described specific preferred embodiment, and any person having ordinary skill in the art to which the invention pertains can make various changes without departing from the gist of the invention claimed in the claims. something to do.

Claims (3)

삭제delete 전원전압을 인가받아 RGB 디지털 데이터 신호의 기준이 되는 기준전압을 복수의 소오스 드라이버로 공급하는 기준전압 발생기에 있어서:In a reference voltage generator for supplying a reference voltage, which is a reference of an RGB digital data signal, to a plurality of source drivers by receiving a power supply voltage: 전원전압을 인가받아 상기 소오스 드라이버로 공급되는 기준전압이 동일하게 유지될 수 있도록 스위칭 조절한 보정전압을 출력하는 기준전압 보정부;A reference voltage corrector configured to receive a power supply voltage and output a correction voltage that is switched and adjusted so that the reference voltage supplied to the source driver is maintained the same; 상기 기준전압 보정부와 접지 전압 사이에 직렬로 결합되어 상기 보정전압을 기준전압으로 일정하게 분배시키는 기준전압 분배부; 및 A reference voltage divider coupled in series between the reference voltage corrector and a ground voltage to uniformly distribute the correction voltage to a reference voltage; And 상기 기준전압 분배부에서 출력된 기준전압을 상기 소오스 드라이버에 전달하는 출력부를 포함하며, An output unit which transfers the reference voltage output from the reference voltage divider to the source driver, 상기 기준전압 보정부는 상기 전원전압과 상기 기준전압 분배부 사이에 배치되고, 복수의 저항이 병렬로 연결되며, 상기 복수의 저항 각각에는 온/오프를 제어하는 스위칭 소자가 직렬로 결합되어 있는 것The reference voltage corrector is disposed between the power supply voltage and the reference voltage divider, a plurality of resistors are connected in parallel, and each of the plurality of resistors has a switching element for controlling on / off in series. 을 특징으로 하는 액정표시장치의 기준전압 발생기.Reference voltage generator of the liquid crystal display device characterized in that. 제 1항에 있어서,The method of claim 1, 상기 기준전압 분배부는 복수의 분할 저항회로로 구성되며, 상기 기준전압 보정부와 접지단자 사이에 연결되어 있는 것을 특징으로 하는 액정표시장치의 기준전압 발생기.And the reference voltage divider comprises a plurality of split resistor circuits and is connected between the reference voltage corrector and a ground terminal.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06175610A (en) * 1992-12-02 1994-06-24 Hitachi Ltd X-driving circuit
JPH0854602A (en) * 1994-08-12 1996-02-27 Sharp Corp Display driving device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06175610A (en) * 1992-12-02 1994-06-24 Hitachi Ltd X-driving circuit
JPH0854602A (en) * 1994-08-12 1996-02-27 Sharp Corp Display driving device

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