KR100733767B1 - Time deinterleaving apparatus and method - Google Patents

Abstract

The present invention relates to a method of designing a time deinterleaver device for use in terrestrial mobile multimedia broadcasting (DMB). The main operation of the temporal deinterleaver on the DMB channel is to distribute the error so that the Viterbi decoder located at the rear end effectively corrects the error by outputting the received data in an input order according to a given algorithm. To do this, a large amount of memory is required to store the received data. Generally, a memory having a size of about 4M bits is used outside the chip. In addition, since random addressing operation occurs when performing memory read / write, SRAM is generally implemented.

In order to achieve the above object, a deinterleaving apparatus to which the idea of the present invention is applied comprises: an input buffer capable of recording in symbol units; An input buffer addresser for creating a predetermined recording data transfer block in which the respective symbols of the input demapping metric data are rearranged and written in the input buffer; An output buffer that can be read symbolically; An output buffer addresser for rearranging each symbol constituting the predetermined read data transfer block stored in the output buffer and outputting the de-puncture stream; And a memory controller for transferring the write data transfer block to an external memory and receiving the read data transfer block from the external memory.

The deinterleaving apparatus of the present invention has the effect of reducing the memory size required for deinterleaving and / or the effective bandwidth of the DRAM of the burst input / output system having a low cost and high input / output speed.

Deinterleaver, DMB, Deinterleaver, CIF, Mobile Multimedia Broadcasting

Description

Time De-Interleaving Device and Method

1 is a conceptual diagram illustrating the operation of time deinterleaving for a DMB channel.

2 is a circuit diagram illustrating a time deinterleaving apparatus according to the prior art.

3 is a circuit diagram illustrating an improved prior art deinterleaving apparatus.

4 is a conceptual diagram illustrating a memory addressing structure of the time deinterleaving device of FIG. 3.

5 is a circuit diagram illustrating a time deinterleaving apparatus according to an embodiment of the present invention.

6 is a conceptual diagram illustrating the operation of an input buffer when the burst length is 4 and the word length is 32 bits.

FIG. 7 is a conceptual diagram illustrating a method in which 16 CIFs store or read memory for each block when the burst length is 4 and the word length is 32 bits. FIG.

8 is a conceptual diagram illustrating a method of reading data from a memory and outputting the data when the burst length is 4 and the word length is 32 bits.

* Explanation of symbols for the main parts of the drawings

20: deinterleaving apparatus 21: demapper

22: input buffer 23: buffering controller

24: memory interface 25: deinterleaving memory

26: output buffer 27: depuncture

28: input buffer addresser 29: output buffer addresser

The present invention relates to a time deinterleaver for use in a digital multimedia broadcasting receiver. The basic operation of the temporal deinterleaver is to mix the received data signals with each other in time, thereby converting the clustering error generated on the channel into a random error, which helps the later Viterbi decoder perform more effectively when correcting the error.

The time deinterleaver used in digital multimedia broadcasting (also called DMB) receivers follows the ETSI EN 300 401 standard and performs operations in units of common interleaved frames (CIFs). 1 illustrates a CIF block structure according to the above standard, and as shown, all 16 CIF data are required for the first output. Here, the length of 1 CIF is 55,296 bits.

In general, a DMB receiver adopts a soft decision method to improve reception performance more than a hard decision method of outputting 1 bit when performing DQPSK demodulation. At this time, four bits are allocated to one bit, which is called a metric. Therefore, the amount of memory required for deinterleaving is calculated as in Equation 1.

(16 CIFs) (55,296 metrics) (4 bits) = 3,538,944 bits

Referring to FIG. 1, the operation concept of basic time deinterleaving will be described. One CIF frame consists of 55,296 metrics, where one metric consists of four bits. R represents a temporal order. Only 16 total CIF sequences from r to r + 15 have to be input for output. In addition, the delay length determined according to the input order in each CIF sequence is different. The sequence of input and output vectors is In FIG. 1, data is output in the same order as the shaded portions. Accordingly, the input / output sequence is represented by Equation 2 below.

Input sequence = (b _{r, 0} , b _{r, 1} , b _{r, 2} , b _{r, 3} , b _{r, 4} , b _{r, 5} , b _{r, 6} , b _{r, 7} ,... , b _{r, 55296} }

Output sequence = (b _{r, 0} , b _{r + 8,1} , b _{r + 4,2} , b _{r + 12,3} , b _{r + 2,4} , b _{r + 10,5} ,... , b _{r + 15,55296} }

When the circuit is constructed based on the concept shown in FIG. 1, the circuit is configured as shown in FIG. 2. Receives the soft decision data in 4 bits from the de-mapper block. These data are stored in SRAM for each CIF, and the size of the SRAM used here requires an SRAM having a size of about 4M bits according to Equation (1). Among the 16 stored CIFs, each data is read in the same manner as in FIG. 1 and transferred to the de-puncture block. The deinterleaving apparatus according to the prior art as described above has a problem that a considerable size of memory is required.

Korean Patent Publication No. 10-2005-70337 has been proposed as a prior art for solving the above problems. 3 is a schematic block diagram of a deinterleaving apparatus for a digital broadcast receiver according to the proposed technique. The illustrated deinterleaving apparatus includes a memory 310, an address generator 320, a read unit 330, a write unit 340, a buffer 350, and a controller 360. The memory 310 has a structure in which a plurality of convolutional interleavers corresponding to the convolutional interleaver structure of the transmitting side are used. That is, in order to perform convolutional deinterleaving, 3456 (1CIF / 16 = 55296/16) convolutional deinterleavers using 16 modules are used. Since one convolutional deinterleaver has 136 registers, it has a memory space capable of storing 136 data correspondingly. Accordingly, the memory size for performing convolutional deinterleaving using the 16 received CIFs has a size of approximately 2 Mbits (> 1,880,064 bits) when the soft decision level is 136 × 3456 × 4 bits.

On the other hand, when a large memory such as DRAM is used in the receiving chip, it will be more efficient if the memory is shared with other blocks. However, recently, a memory employing a burst data input / output method such as SDRAM, which is widely used at low cost, has been used as a large memory of a receiving chip. Therefore, even in the case of deinterleaving, it is advantageous to transmit data in the form of burst as much as possible in order to use the bandwidth as much as possible, and it is necessary to minimize the memory usage.

4 shows the structure of the deinterleaver memory 310 based on the convolutional deinterleaver structure of the proposed technique. As shown in FIG. 4, a deinterleaving unit (DU) is deinterleaved by one convolutional deinterleaver having 16 branches and a maximum depth of 16 registers. Thus, considering that input data is input in (I, Q) pairs, a memory size for processing one deinterleaving unit (DU) is 8 bits x (16/16) x 136. Here, one deinterleaving unit DU performs deinterleaving on 16 predetermined data groups including 16 18-bit data.

According to the proposed technique, for a data group CIF having 55296 data (4 bits), the size of a memory for performing deinterleaving on 16 CIFs requires 4 bits x (55296/16) x 136, approximately 2 Mbits. Applying the point where the input data are (I, Q) pairs, the deinterleaver memory has a width of 8 bits and a total memory address of 1728 x 136, 2 Mbit.

Since each 8-bit unit data of one interleaving unit has different read / write timing for each branch to which it belongs, only I / O can be input / output in 8-bit unit, and 32-bit channel, which is the actual standardized data width of the current memory, or We can see that the same burst input and output cannot be used as in SDRAM.

SUMMARY OF THE INVENTION An object of the present invention devised to solve the above problems is to provide a deinterleaving apparatus capable of reducing the memory size required for deinterleaving.

In addition, another object of the present invention is to provide a deinterleaving apparatus using a DRAM of a burst input / output method which is inexpensive and has a high input / output speed.

In order to achieve the above object, a deinterleaving apparatus to which the idea of the present invention is applied comprises: an input buffer capable of recording in symbol units; An input buffer addresser for creating a predetermined recording data transfer block in which the respective symbols of the input demapping metric data are rearranged and written in the input buffer; An output buffer that can be read symbolically; An output buffer addresser for rearranging each symbol constituting the predetermined read data transfer block stored in the output buffer and outputting the de-puncture stream; And a memory controller for transferring the write data transfer block to an external memory and receiving the read data transfer block from the external memory. The memory controller may include a memory interface for accessing a system memory according to an assigned predetermined access right; And a buffering controller for selectively connecting the input buffer or the output buffer to the memory interface.

In the deinterleaving method applying the spirit of the present invention to achieve the above object, a first deinterleaving grouping step of classifying each symbol constituting the input metric data stream according to a delay value given according to a predetermined deinterleaving algorithm ; A burst grouping step of collecting symbols as unit transmission data when symbols having the same delay value are input by a predetermined transmission unit; Storing the unit transmission data in a deinterleaving memory; A second deinterleaving grouping step of collecting the buffered ones of the respective unit transmission data stored in the deinterleaving memory during a given delay value; And extracting each symbol included in the collected unit transmission data one by one according to a given delay value and a sequence of symbols in a packet to generate an output metric data stream.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the embodiments of the present invention illustrated in the following may be modified in many different forms, and the embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. .

For example, the following embodiment is specifically described as an implementation using SDRAM supporting burst input / output as a deinterleaving memory, and the term naming of each component is also adopted to be suitable for the above embodiment, but this is consistent and understood in the description. As merely for convenience of, it is irrelevant to the scope of the invention.

In addition, in the accompanying drawings, a demapper block and a defunct block are connected to an input and an output side of the deinterleaving device. The terminology for input / output terminal components is also adopted to be suitable for the above embodiment. And, this is also merely for convenience of explanation and understanding of the description, it is irrelevant to the scope of the present invention.

(Example)

5 illustrates a data input / output structure of the deinterleaving apparatus 20, the demapper block 21, the depuncture block 27, and the deinterleaving memory 25 according to the present embodiment. The illustrated components are for processing a CIF block consisting of a 4-bit symbol metric of the size as shown in Figs. The illustrated deinterleaving memory 25 is a burst RAM (eg, SDRAM, DDR-RAM) for inputting / outputting data in a burst manner. The deinterleaving memory 25 may be a deinterleaving dedicated memory that is implemented integrally with or separately from the deinterleaving device 20. May be the main memory of the receiver system. The illustrated demapper block 21 outputs metric data consisting of 4 bits while data input from the DQPSK demodulator passes through the demapper block 11. The illustrated depuncture block 27 outputs the deinterleaved four-bit symbol metric to a Viterbi decoder (not shown).

The illustrated deinterleaving apparatus 20 includes: a burst RAM interface 24 for reading or writing a burst RAM, which provides a storage space for performing deinterleaving; An input buffer 22 for receiving the demapped metric data and creating a predetermined block of data for writing; An output buffer 26 for receiving a predetermined read data block and outputting the deinterleaving metric data; An input buffer addresser (28) for creating a predetermined write data transfer block in which the respective symbols of the demapping metric data are rearranged and written in the input buffer (22); An output buffer addresser (29) for rearranging each symbol constituting the predetermined read data transfer block stored in the output buffer (26) and outputting it as a depuncture stream; And addressing the burst RAM 25 to a position suitable for recording each transmission unit data constituting the reading data block according to a deinterleaving algorithm, and each transmission unit data necessary for constructing the recording data block A burst buffering controller 23 for designating the address on the burst RAM 25 that has been recorded. Here, the input buffer 22 may be written in symbol units, and the output buffer 26 may be implemented in an SRAM that can be read in symbol units.

The metric data supplied from the demapper block 11 is temporarily stored in the input buffer 22. The input buffer 22 may be composed of two SRAM banks, each of which is determined according to the burst length and the word length of the burst RAM 25. In FIG. 5, BL represents a burst length. WL represents the word length.) The reason why the input buffer 22 is composed of two SRAM banks is that it is necessary to ensure that data that is continuously input is not missed. May have Each of the SRAM banks stores a write data block consisting of 16 unit transfer data. The unit transfer data has a burst length of 4 and a word length of 32 bits, as shown in FIG. Also called burst transmission data.

The input buffer addresser 28 reorders (ie, changes the order of each other) each symbol included in the symbol metric data input from the demapper block 21 according to the deinterleaving order according to the present invention. A data transfer block is created and stored in one SRAM bank connected between two banks forming the input buffer 22.

Here, according to the spirit of the present invention, one CIF block is converted into 1728 unit transmission data, and each unit transmission data is divided into 16 groups (groups 0 to 15) according to a delay value given by the deinterleaving algorithm. Each group includes 108 unit transmission data.

The demapping symbol metric may be regarded that the delay values are input in units of 16 symbols different from each other, and the symbol reordering as shown in FIG. 6 requires receiving the 16 symbol units in an amount necessary for the same burst transmission of FIG. 6. Since this is possible, one SRAM bank should be large enough to store 16 unit transfer data.

Accordingly, 16 unit burst transmission data are composed of metric data stored in the connected SARM bank. The unit transmission data are stored in the deinterleaving memory 25. The burst buffering controller 23 stores the deinterleaving memory for each burst transmission unit data so that the unit transmission data can be recorded according to the rules as shown in FIG. Specify the appropriate storage location address on (25).

The burst RAM interface 24 transmits the symbol burst blocks to the deinterleaving memory 25 through a burst transmission channel having a burst length of 4 and a word length of 32 bits in the order defined by the deinterleaving controller 23. send. It can be implemented with a general burst ram interface circuit.

Further, upon reading out of the deinterleaving memory 25, the burst buffering controller 23 reads data in the order as shown in FIG. 7 in the form of a read transfer data block to the output buffer 26. Specify the address to save. Thereafter, the output buffer address 29 outputs a read transmission data block stored in the output buffer 26 as a depuncture stream as shown in FIG. Accordingly, the deinterleaved data becomes metric data in which symbols of the CIF input at different times are rearranged by the rules as shown in FIG. 1.

Hereinafter, a deinterleaving method according to the spirit of the present invention will be described. The deinterleaving method of the present embodiment includes: a first deinterleaving grouping step of classifying each symbol constituting the input metric data stream according to a delay value given according to a predetermined deinterleaving algorithm; A burst grouping step of collecting symbols as unit transmission data when symbols having the same delay value are input by a predetermined transmission unit; Storing the unit transmission data in a deinterleaving memory; A second deinterleaving grouping step of collecting the buffered ones of the respective unit transmission data stored in the deinterleaving memory during a given delay value; And a degrouping step of extracting each symbol included in the collected unit transmission data one by one according to a given delay value and a sequence of symbols in a packet to generate an output metric data stream.

6 illustrates a detailed operation of the first deinterleaving grouping step performed using the input buffer 22. Assume that the CIF data consists of a 4-bit symbol metric, burst length BL = 4, and word length WL = 32 bits. The input CIF data is divided into 16 groups according to each index and stored in the input buffer. The equation for this is shown in Equation 3.

Group (i mod 16) = br, i (0 ≦ i ≦ 55295)

Since the word size is 32 bits and each metric symbol is 4 bits, eight metric symbols are stored in each word. Each group consists of 3456 metrics and 432 words. Since the metric data inputted from the preceding stage is sequentially inputted from the 0th to 55295th, the size of the input buffer is (16BL) WL.

7 illustrates performing the burst grouping step by storing each word in an SDRAM supporting burst input / output. Since each group has a different delay length, group 0 has a size of 432 words (that is, 108 symbol sizes), and group 1 has a size of 432 * 9. The other groups likewise have their size by the length of each delay.

In the deinterleaving memory storing step, the order of storing from the input buffer 22 to the deinterleaving memory 25 is stored in the same order as in FIG. 7, and the flowchart of reading the deinterleaving memory in the second deinterleaving grouping step. Similarly, it is as shown in FIG. In this way, the position stored or read in the deinterleaving memory 25 has a form that is circulated according to each CIF because the data must be maintained by each given delay value once stored. In FIG. 7, the order of writing and reading data is specified in the deinterleaving memory 25. After each group processes one CIF, the address value of the reading and writing memory is circulated in each group. For example, if four words from group 0 to group 15 are stored in memory in burst form, then the next input data from group 0 to group 15 are stored in burst form. This operation is repeated until all of one CIF data is stored. If the next CIF data is input after all data is stored, the address value of the memory is circulated for each group. Since group 0 is composed of 1 block, it does not change. Group 1 is composed of 9 blocks, and therefore, moves to the second block. The order of reading from the memory is similarly circulated among blocks in each group. In the case of group 0, it does not cycle as if it is stored in memory. In the case of group 1, after reading in block 8, the next CIF reads in block 0.

8 illustrates the detailed operation of the degrouping step performed using output buffer 26. As in the case of the input buffer 22, the burst length BL is assumed to be 4 and the word length WL is assumed to be 32 bits. Two SRAM banks of size 64 × 32 are arranged to read data continuously and output data without interruption. Reads 16 units of burst data consisting of 4 words into the first memory corresponding to bank 0, fills all the memory, stores the data in burst form again in the second memory, and simultaneously outputs the data stored in bank 0. The form is defined as {B _{r, 0} , B _{r-8, 432} ,... As depicted on the right side of FIG. 6. , B _r-15,6480 } from columns {b _{r, 0} , b _r-8,1 , b _r-4,2 ... b _r-15,127 } will read and print the data in the same order.

The present invention has been described in detail with reference to preferred embodiments, but the present invention is not limited to the above embodiments, and various modifications can be made by those skilled in the art within the scope of the technical idea of the present invention. Do.

According to the deinterleaving apparatus or the deinterleaving method according to the present invention having the above structure, it is possible to reduce the memory size required for deinterleaving.

In addition, the deinterleaving apparatus or the deinterleaving method of the present invention has an effect that the bandwidth of the DRAM of the burst input / output system can be efficiently used, which is inexpensive and the input / output speed is high.

In addition, the device or the deinterleaving method of the present invention can be implemented to share and use inexpensive system memory.

In addition, by optimizing the use of memory to 2-M bits, it is possible to maximize the memory utilization of time deinterleaving.

Claims (14)

An input buffer capable of recording in symbol units; An input buffer addresser for creating a predetermined recording data transfer block in which the respective symbols of the input demapping metric data are rearranged and written in the input buffer; An output buffer that can be read symbolically; An output buffer addresser for rearranging each symbol constituting the predetermined read data transfer block stored in the output buffer and outputting the de-puncture stream; A memory controller for transferring the write data transfer block to an external memory and receiving the read data transfer block from the external memory; Deinterleaving apparatus comprising a. The method of claim 1, wherein the memory control unit, A memory interface for accessing system memory in accordance with an assigned predetermined access right; And A buffering controller for selectively coupling said input buffer or output buffer to said memory interface Deinterleaving apparatus comprising a. The method of claim 1, The input buffer has two or more banks capable of storing the write data transfer block, And the input buffer addresser and the memory controller are connected to different banks at the same time. The method of claim 1, The output buffer includes two or more banks capable of storing the read data transfer block. And the output buffer addresser and the memory controller are connected to different banks at the same time. The method of claim 1, And said write data transfer block and read data transfer block comprise a set of transfer unit data of said external memory. The method of claim 5, The external memory is a memory that supports burst transfer, And the transmission unit data is burst transmission unit data multiplied by a burst length of a transmission word length of the external memory. The method of claim 1, The input buffer addresser, Deinterleaving grouping for classifying each symbol of the demapping metric data according to a delay value given by a deinterleaving algorithm; And And a burst grouping for collecting the deinterleaved grouped symbols into the recording data transmission blocks according to an input order. The method of claim 5, The memory control unit, Each storage unit data constituting the recording data transmission block is given a storage location on the external memory according to a group value given according to a delay value given by a deinterleaving algorithm, And de-interleaving the data output block for extracting the same output stream according to a deinterleaving algorithm among the transmission unit data stored at different times in the external memory. The method of claim 1, The output buffer addresser, Regarding the read data transmission block, each symbol belonging to a group classified according to a delay value is extracted one by one according to a group order according to each delay value and an order of symbols in each group to form a depuncture symbol stream. Deinterleaving apparatus. The method of claim 1, Each unit transmission data stored in the external memory is buffered for a given delay value. A first deinterleaving grouping step of classifying each symbol constituting the input metric data stream according to a delay value given according to a predetermined deinterleaving algorithm; A burst grouping step of collecting symbols as unit transmission data when symbols having the same delay value are input by a predetermined transmission unit; Storing the unit transmission data in a deinterleaving memory; A second deinterleaving grouping step of collecting the buffered ones of the respective unit transmission data stored in the deinterleaving memory during a given delay value; A degrouping step of extracting each symbol included in the collected unit transmission data one by one according to a given delay value and a sequence of symbols in a packet to generate an output metric data stream Deinterleaving method comprising a. The method of claim 11, And the first deinterleaving grouping step and the burst grouping step are performed integrally. The method of claim 12, The first deinterleaving step, the burst grouping step and the memory storing step, A deinterleaving method, comprising: at least two banks capable of recording in symbol units, wherein the banks in which the operations are performed are simultaneously performed by a buffer having a circulating structure. The method of claim 11, The second deinterleaving step and the degrouping step, A deinterleaving method comprising at least two banks that can be read in symbol units, wherein the banks in which the operations are performed are simultaneously performed by a buffer having a circulating structure.

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