KR100645188B1 - Method of forming an isolation region of a semiconductor device - Google Patents

Abstract

The present invention relates to a method of forming an isolation region of a semiconductor device which simplifies the process and prevents the reliability of the device from being degraded by a polymer. Forming a first pad nitride film in sequence, removing the first pad nitride film formed in the cell region of the semiconductor substrate, forming a second pad nitride film on the entire surface of the semiconductor substrate, and forming the second pad nitride film on the second pad nitride film. Forming a second pad nitride layer pattern by selectively removing the second pad nitride layer using the patterned photoresist as a mask by applying a pattern to the photoresist and patterning the device isolation region; The pad oxide film and the first pad nitride film using the second pad nitride film pattern as a mask. Selectively removing the semiconductor substrate to simultaneously form first and second trenches having different depths in the cell region and the ferry region, removing the first and second pad nitride films and the pad oxide film, and And forming an isolation layer by filling an insulating layer in the first and second trenches.

DTI, STI, Device Isolators

Description

Method for forming isolation region semiconductor device

1A to 1C are cross-sectional views illustrating a method of forming an isolation region of a conventional semiconductor device.

2A through 2E are cross-sectional views illustrating a method of forming an isolation region of a semiconductor device according to the present invention.

Explanation of symbols for the main parts of the drawings

21 semiconductor substrate 22 pad oxide film

23: first pad nitride film 24: second pad nitride film

25 photosensitive film 26 first trench

27: second trench 28: device isolation film

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming an isolation region of a semiconductor device suitable for isolating devices by forming trench depths different from each other.                         

In general, as semiconductor devices are increasingly integrated, methods for reducing the size of device isolation regions and device formation regions, that is, active regions, have been proposed.

As the formation technology of the device isolation region as described above, a LOCOS (LOCal Oxidation of Silicon) process was used. The isolation region forming process using the LOCOS process has been widely used because of its advantages that the process is simple and excellent in reproducibility.

However, as the device is gradually integrated, the area of the active region is reduced due to the occurrence of Bird's Beak at the edge of the isolation oxide that extends into the active region, which is characteristic of the isolation oxide formed by the LOCOS process. It is not suitable for use in DRAMs of more than 64MB.

Therefore, in the conventional method of forming an isolation region using LOCOS, an advanced LOCOS process is proposed such as preventing the generation of buzz big or removing the buzz big to reduce the isolation area and increase the active area. Or in the manufacturing process of 256MB DRAM.

However, in the process of forming the isolation region using the advanced advanced process, the area of the isolation region is large in the GIGA class or more DRAM which requires the cell area of 0.2 μm ² or less and the field oxide film formed by the LOCOS process. As the silicon substrate is formed at the interface with the silicon substrate, the concentration of the silicon substrate is lowered due to the coupling with the field oxide film, and as a result, a problem such as leakage current occurs, resulting in poor isolation characteristics. As a method, a method of forming an isolation region using a trench that can easily control the thickness of the isolation region and enhance the isolation effect has been proposed.

On the other hand, the NAND-type flash device is advantageous than the NOR-type in terms of integration, but since the peripheral circuit portion requires a relatively high voltage, there is a disadvantage in that unstable device driving and power consumption are increased.

As a solution to this, there is a method of halving the gate voltage by using triple P-wells separated from cells in a cell region.

However, the ferry region does not need to separate triple P-wells, and the ESD (Electro Static Discharge) region has to use punch-through between wells, making it difficult to apply deep trench isolation (DTI).

Hereinafter, a method of forming an isolation region of a conventional semiconductor device will be described with reference to the accompanying drawings.

1A to 1C are cross-sectional views illustrating a method of forming an isolation region of a conventional semiconductor device.

As shown in FIG. 1A, after the first photosensitive film 12 is coated on a semiconductor substrate 11 defined as a cell region and a peri region, an element isolation film may be formed by an exposure and development process. The first trench 13 having the deep trench isolation (DTI) is formed only in the cell region of the semiconductor substrate 11 by a photolithography process.                         

As shown in FIG. 1B, the first photoresist film 12 is removed, the second photoresist film 14 is applied to the entire surface of the semiconductor substrate 11, and a semiconductor in which the device isolation film is formed by an exposure and development process. A second trench 15 having shallow trench isolation (STI) is formed only in the ferry region of the substrate 11 by a photolithography process.

As shown in FIG. 1C, the second photoresist film 14 is removed, and an insulating film for isolation of an element is stacked on the entire surface of the semiconductor substrate 11 including the first and second trenches 13 and 15 to form CMP ( Chemical Mechanical Polishing) to form the device isolation layer 16 filling the first and second trenches 13 and 15.

However, the conventional method of forming an isolation region of a semiconductor device as described above has the following problems.

That is, by forming a DTI in the cell region and then applying a photoresist film and forming an STI in the ferry region, the process is complicated and it is difficult to avoid direct contact of the photoresist film of the polymer component with the substrate. Decreases the reliability of the device.

An object of the present invention is to provide a method for forming an isolation region of a semiconductor device to simplify the process and to prevent the reliability of the device from being degraded by a polymer.

The method of forming an isolation region of a semiconductor device according to the present invention for achieving the above object comprises the steps of sequentially forming a pad oxide film and a first pad nitride film on a front surface of a semiconductor substrate defined by a cell region and a ferry region; Removing the first pad nitride film formed in the cell region of the semiconductor substrate, forming a second pad nitride film on the entire surface of the semiconductor substrate, and applying a photoresist film on the second pad nitride film to pattern the device isolation region. And selectively removing the second pad nitride film using the patterned photoresist film as a mask to form a second pad nitride film pattern, removing the photosensitive film and using the second pad nitride film pattern as a mask. The pad oxide film, the first pad nitride film, and the semiconductor substrate are selectively removed to remove each other in the cell region and the ferry region. Simultaneously forming first and second trenches having different depths, removing the first and second pad nitride films and pad oxide films, and filling an insulating film in the first and second trenches to form an isolation layer. Forming comprising the step of forming.

Hereinafter, a method of forming a ringing region of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

2A to 2E are cross-sectional views illustrating a method of forming an isolation region of a semiconductor device according to the present invention.

As shown in FIG. 2A, a pad oxide film 22 is formed on the entire surface of the semiconductor substrate 21 defined as a cell region and a ferry region to have a thickness of 200 to 500 GPa, and a first pad nitride film is formed on the pad oxide film 22. (23) to form a thickness of 200 ~ 2000Å.

Subsequently, only the first pad nitride layer 23 formed in the cell region is selectively etched through the photo and etching processes.

As shown in FIG. 2B, the second pad nitride film 24 is formed to a thickness of 200 to 2000 에 on the entire surface of the semiconductor substrate 21 including the first pad nitride film 23 formed only in the ferry region.

In this case, only the second pad nitride layer 24 is formed in the cell region of the semiconductor substrate 21, and the first and second pad nitride layers 23 and 24 are stacked in the ferry region of the semiconductor substrate 21. The thickness of the nitride film formed in the region and the ferry region is different.

As shown in FIG. 2C, after the photoresist film 25 is coated on the second pad nitride film 24, the photoresist film 25 is patterned so that the region where the device isolation film is to be formed is opened by an exposure and development process.

Subsequently, the second pad nitride layer 24 is selectively removed using the patterned photosensitive layer 25 as a mask to form a second pad nitride layer pattern 24a.

As shown in FIG. 2D, the photoresist layer 25 is removed, and the pad oxide layer 22, the first pad nitride layer 23, and the semiconductor substrate 21 are formed using the second pad nitride layer pattern 24a as a mask. ) Are selectively removed to form first trenches 26 and second trenches 27 having different depths.

Here, the first trench 26 is a DTI having a depth of 1 μm to 2 μm, and the second trench 27 is formed to form a current path for protecting the device against an external high voltage input signal. It is an STI with a depth of 2000 ~ 4000Å.                     

As shown in FIG. 2E, the semiconductor substrate 21 including the first and second trenches 26 and 27 is removed by removing the first and second pad nitride films 23 and 24 and the pad oxide film 22. A device isolation layer 28 is formed on the entire surface of the device isolation layer to form a device isolation layer 28 filling the first and second trenches 26 and 27 by performing a chemical mechanical polishing (CMP) process.

As described above, the method for forming the isolation region of the semiconductor device according to the present invention has the following effects.

First, a NAND type flash device having a low voltage stable operation principle may be manufactured by differently forming a thickness of a pad nitride layer of a cell and a ferry region to form a different depth of a trench.

Second, it is possible to simplify the process compared to the conventional process of forming the trench of the cell and the ferry region using the photosensitive film separately, and to improve the reliability of the device by preventing the penetration of impurities into the substrate by the polymer of the photosensitive film.

Claims (3)

Sequentially forming a pad oxide film and a first pad nitride film on the entire surface of the semiconductor substrate defined by the cell region and the ferry region; Removing the first pad nitride film formed in the cell region of the semiconductor substrate; Forming a second pad nitride film over the entire surface of the semiconductor substrate; Applying a photoresist film on the second pad nitride film and then patterning the device isolation region; Selectively removing the second pad nitride layer using the patterned photoresist as a mask to form a second pad nitride layer pattern; By removing the photoresist layer and selectively removing the pad oxide layer, the first pad nitride layer, and the semiconductor substrate using the second pad nitride layer pattern as a mask, first and second trenches having different depths in the cell region and the ferry region are removed. Simultaneously forming; Removing the first and second pad nitride layers and the pad oxide layer; And forming an isolation layer by filling an insulating layer in the first and second trenches. The method of claim 1, wherein the first and second pad nitride layers are formed to have a thickness of 200 to 2000 GPa. The method of claim 1, wherein the pad oxide layer is formed to have a thickness of 200 to 500 GPa.

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