KR100644869B1 - Nonvolatile Memory Using Resistance Change of Crystalline Oxide - Google Patents
Nonvolatile Memory Using Resistance Change of Crystalline Oxide Download PDFInfo
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- 239000013078 crystal Substances 0.000 claims abstract description 20
- 238000010301 surface-oxidation reaction Methods 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims abstract description 17
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 14
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 9
- 239000001301 oxygen Substances 0.000 claims description 9
- 229910052760 oxygen Inorganic materials 0.000 claims description 9
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 claims description 8
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 8
- 239000011787 zinc oxide Substances 0.000 claims description 7
- 238000009832 plasma treatment Methods 0.000 claims description 6
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims description 5
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 claims description 4
- ODUCDPQEXGNKDN-UHFFFAOYSA-N Nitrogen oxide(NO) Natural products O=N ODUCDPQEXGNKDN-UHFFFAOYSA-N 0.000 claims description 4
- 229910002367 SrTiO Inorganic materials 0.000 claims description 4
- 239000001272 nitrous oxide Substances 0.000 claims description 4
- VEALVRVVWBQVSL-UHFFFAOYSA-N strontium titanate Chemical compound [Sr+2].[O-][Ti]([O-])=O VEALVRVVWBQVSL-UHFFFAOYSA-N 0.000 claims description 4
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 238000005516 engineering process Methods 0.000 abstract description 2
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 230000003647 oxidation Effects 0.000 description 7
- 238000007254 oxidation reaction Methods 0.000 description 7
- 239000010408 film Substances 0.000 description 5
- 230000006870 function Effects 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 230000001590 oxidative effect Effects 0.000 description 2
- 238000004549 pulsed laser deposition Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000006213 oxygenation reaction Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
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Abstract
본 발명은 결정성 산화막의 저항변화를 이용한 비휘발성 기억소자에 관한 것으로써, 특히 저항변화를 이용한 저항성 메모리(Resistance RAM, 'ReRAM') 소자의 균일성/안정성을 현저히 개선하기 위하여, 기존의 비정질/다결정 산화물(oxide)대신, 단결정 산화물을 이용하고, 이 단결정 산화물의 계면에 적정 수준의 표면 산화처리 공정을 적용함으로써, 소자의 안정성을 극대화하는 것을 특징으로 하는 비휘발성 반도체 기억소자의 구조 및 제조 공정 기술이다. 본 발명은 기존 ReRAM소자의 불균일한 스위칭을 제거하기 위해, 비정질 또는 다결정대신 단결정 산화물을 사용하고, 표면 산화 처리를 통해 인터페이스 스테이트를 조절함으로써 안정적인 스위치 특성을 확보하는 ReRAM 소자를 제공한다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nonvolatile memory device using a change in resistance of a crystalline oxide film. In particular, in order to significantly improve the uniformity / stability of a resistive memory (Resistance RAM, 'ReRAM') device using a change in resistance, a conventional amorphous The structure and fabrication of a nonvolatile semiconductor memory device characterized by maximizing device stability by using a single crystal oxide instead of polycrystalline oxide and applying an appropriate level of surface oxidation treatment to the interface of the single crystal oxide. Process technology. The present invention provides a ReRAM device that uses a single crystal oxide instead of amorphous or polycrystalline to eliminate non-uniform switching of the existing ReRAM device, and secures stable switch characteristics by adjusting the interface state through surface oxidation treatment.
Description
도 1은 저항변화 메모리의 특성비교1 is a characteristic comparison of resistance change memory.
도 2는 단결정의 계면 처리에 따른 저항변화 메모리 소자의 특성 비교 2 is a comparison of characteristics of a resistance memory device according to the interfacial treatment of a single crystal
도 3은 소자의 스위칭 특성3 is a switching characteristic of the device
도 4는 XPS를 이용하여 산화처리에 따른 표면의 산소 농도 비교 4 is a comparison of the oxygen concentration of the surface according to the oxidation treatment using XPS
본 발명은 결정성 산화막의 저항변화를 이용한 비휘발성 기억소자에 관한 것으로써, 특히 저항변화를 이용한 저항성 메모리(Resistance RAM, 'ReRAM') 소자의 균일성/안정성을 현저히 개선하기 위하여, 기존의 비정질/다결정 산화물(oxide)대신, 단결정 산화물을 이용하고, 이 단결정 산화물의 계면에 적정 수준의 표면 산화처리 공정을 적용함으로써, 소자의 안정성을 극대화하는 것을 특징으로 하는 비휘발성 반도체 기억소자의 구조 및 제조 공정 기술이다. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nonvolatile memory device using a change in resistance of a crystalline oxide film. In particular, in order to significantly improve the uniformity / stability of a resistive memory (Resistance RAM, 'ReRAM') device using a change in resistance, a conventional amorphous The structure and fabrication of a nonvolatile semiconductor memory device characterized by maximizing device stability by using a single crystal oxide instead of polycrystalline oxide and applying an appropriate level of surface oxidation treatment to the interface of the single crystal oxide. Process technology.
현재 비휘발성 메모리로 상용화된 플래시 메모리의 경우, 플로팅 폴리실리콘(floating polysilicon)이나 질화규소(silicon nitride)에 전자를 저장하거나 제거하여 문턱전압 (Vth)을 변화시켜 기억소자로 이용한다. 이에 반해, 최근 연구되고 있는 상변화 메모리(phase change memory, 'PRAM'), 자기저항 메모리(magnetic memory, 'MRAM') 등은 외부에서 인가한 열/자기장을 이용하여 저항변화를 발생시켜서, 기억소자로 사용한다. Flash memory, currently commercially available as a nonvolatile memory, is used as a storage device by changing the threshold voltage (V th ) by storing or removing electrons in floating polysilicon or silicon nitride. On the other hand, recently studied phase change memory (PRAM), magnetic memory (MRAM), etc. generate resistance change by using externally applied heat / magnetic field, Used as an element.
지금까지 연구 결과를 종합하면, 기본적인 스위칭 특성은 다양한 산화물 재료에서 확인하였으나, 구체적인 스위칭 역학에 대해서는 원인 규명이 미흡하고, 제작된 소자의 전기적 특성이 불균일하여, 스위칭 횟수와 셋/리셋 전압, 리셋 전류 등이 차세대 기가/테라-비트급 메모리로 상용화하기에는 많은 문제가 있다. 주로 제작된 소자의 전기적 특성의 불균일성의 원인은 비정형성 및 다결정 구조에 기인한다. To date, the basic switching characteristics have been confirmed in various oxide materials. However, the specific cause of the switching dynamics is insufficient, and the electrical characteristics of the fabricated device are uneven. Therefore, the number of switching, set / reset voltage, reset current There are a lot of problems to commercialize such a next generation giga / tera-bit memory. The reason for the nonuniformity of the electrical characteristics of the fabricated device is mainly due to the amorphous and polycrystalline structure.
즉, ReRAM을 상용화하기 위해서는, 산화물을 이용하여 안정적이고 균일하고, 높은 스위칭 횟수, 저 전력 동작 특성을 가지는 새로운 산화물 제조공정이 필요하다. In other words, in order to commercialize ReRAM, a new oxide manufacturing process using an oxide, which is stable and uniform, has a high switching frequency and low power operation characteristics, is required.
본 발명은 상기와 같은 문제점을 해결하기 위하여 안출된 것으로써, 그 목적은 기존 ReRAM소자의 불균일한 스위칭을 제거하기 위해, 비정질 또는 다결정대신 단결정 산화물을 사용하고, 표면 산화 처리를 통해 인터페이스 스테이트를 조절함으로써 안정적인 스위치 특성을 확보하는 ReRAM 소자를 제공하는 데 있다.The present invention has been made to solve the above problems, the object of which is to use a single crystal oxide instead of amorphous or polycrystalline to remove non-uniform switching of the existing ReRAM device, and to control the interface state through the surface oxidation treatment By providing a ReRAM device that ensures stable switch characteristics.
상기와 같은 목적을 달성하기 위하여 본 발명의 결정성 산화막의 저항변화를 이용한 비휘발성 기억소자는 상부와 하부에 전극을 형성하고, 상기 전극 사이에 표면 산화처리를 적용한 단결정 산화막을 형성하는 것을 특징으로 한다.In order to achieve the above object, the nonvolatile memory device using the resistance change of the crystalline oxide film of the present invention is characterized by forming an electrode on the top and the bottom, and forming a single crystal oxide film by applying a surface oxidation treatment between the electrodes. do.
본 발명에서 상기 단결정 산화막은 니오브가 도핑된 티탄산스트론튬(Nb-doped SrTiO3) 또는 알루미늄이 도핑된 산화아연(Al-doped ZnO)인 것이 바람직하다.In the present invention, the single crystal oxide film is preferably niobium-doped strontium titanate (Nb-doped SrTiO 3 ) or aluminum-doped zinc oxide (Al-doped ZnO).
본 발명에서 상기 표면 산화처리 방법은 과산화수소(H2O2)와 황산(H2SO4)을 포함하는 용액 또는 오존 상에서 이루어지는 것이 바람직하다.In the present invention, the surface oxidation treatment method is preferably performed on a solution or ozone containing hydrogen peroxide (H 2 O 2 ) and sulfuric acid (H 2 SO 4 ).
본 발명에서 상기 표면 산화처리 방법은 산소 플라즈마 처리, 아산화질소(N2O) 분위기에서 플라즈마 처리, 산화질소(NO)분위기에서 플라즈마 처리하는 방법 중 선택되는 1종에 의해서 행해지는 것이 바람직하다.In the present invention, the surface oxidation treatment method is preferably performed by one selected from oxygen plasma treatment, plasma treatment in a nitrous oxide (N 2 O) atmosphere, and plasma treatment in a nitrogen oxide (NO) atmosphere.
본 발명에서 상기 표면 산화처리 방법은 산소분위기에서 열처리, 아산화질소(N2O)분위기에서 열처리, 산화질소(NO)분위기에서 열처리하는 방법 중에서 선택되는 1종의 방법에 의해서 행해지는 것이 바람직하다.In the present invention, the surface oxidation treatment method is preferably performed by one method selected from heat treatment in an oxygen atmosphere, heat treatment in a nitrous oxide (N 2 O) atmosphere, and heat treatment in a nitrogen oxide (NO) atmosphere.
본 발명은 저항변화를 이용하는 측면에서는 종래 2개의 차세대 기억 소자와 유사하지만, 전압 펄스를 이용하여 절연막의 저항변화를 일으키는 것이 특징으로, 상대적으로 PRAM/MRAM보다 간단한 구조와 공정을 가질 수 있다. The present invention is similar to the conventional two next-generation memory devices in terms of the use of resistance change, but it is characterized by causing the resistance change of the insulating film by using a voltage pulse, and can have a relatively simple structure and process than PRAM / MRAM.
본 발명은 ReRAM 산화물의 스위칭 역학의 물리적인 이해를 바탕으로, 이상적인 ReRAM소자의 구조와 공정을 제안한다. 기존 ReRAM 소자의 불균일성을 유발시킨 산화물의 구조적인 문제 즉 비정형 또는 다결정 구조에 기인하는 소자의 스위칭 불안정을 해결하기 위해 본 발명에서는 단결정 산화물과 일함수의 차이가 큰 금속 전극을 이용하여, 소자의 안정적인 스위칭 특성을 도모한다. 또한, 계면에 안정적인 인터페이스 스테이트를 형성하기 위하여, 최적의 산화공정을 적용한다. The present invention proposes an ideal ReRAM device structure and process based on the physical understanding of the switching dynamics of ReRAM oxide. In order to solve the structural problem of the oxide that caused the non-uniformity of the conventional ReRAM device, that is, switching instability due to the amorphous or polycrystalline structure, the present invention uses a metal electrode having a large difference between the single crystal oxide and the work function, thereby ensuring stable device stability. Promote switching characteristics. In addition, an optimal oxidation process is applied to form a stable interface state at the interface.
본 발명은 비휘발성 저항변화 메모리 소자의 안정적인 스위칭 특성을 확보하기 위하여, 기존의 다결정, 비정질구조의 산화물 대신 단결정 도핑된 산화물을 이용함으로써, 안정적인 계면을 확보하여 스위칭 특성의 균일성과 안정성을 개선한다. 특히 계면의 산화 처리 공정을 이용하여, 적정 조건의 계면 전하를 형성함으로써, 소자의 동작 특성을 개선하는 것이 특징이다. The present invention improves the uniformity and stability of switching characteristics by securing a stable interface by using a single crystal doped oxide instead of a conventional polycrystalline and amorphous structure oxide in order to secure stable switching characteristics of the nonvolatile resistance change memory device. In particular, it is characterized by improving the operating characteristics of the device by forming an interface charge under appropriate conditions using an interface oxidation treatment step.
이하, 본 발명의 바람직한 실시예를 첨부한 도면을 참조하여 설명하기로 한다. 하기의 각 도면의 구성 요소들에 참조 부호를 부가함에 있어서, 동일한 구성 요소들에 한해서는 비록 다른 도면상에 표시되더라도 가능한 한 동일한 부호를 가지도록 하며, 본 발명의 요지를 불필요하게 흐릴 수 있다고 판단되는 공지 기능 및 구성에 대한 상세한 설명은 생략한다.Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. In adding reference numerals to components of the following drawings, it is determined that the same components have the same reference numerals as much as possible even if displayed on different drawings, and it is determined that they may unnecessarily obscure the subject matter of the present invention. Detailed descriptions of well-known functions and configurations will be omitted.
<실시예 1><Example 1>
아래와 같은 공정 순서를 이용하여 ReRAM용 소자를 제작한다. A device for ReRAM is manufactured using the following process sequence.
● 니오브가 도핑된 티탄산스트론튬(Nb-doped SrTiO3) 또는 알루미늄이 도핑된 산화아연(Al-doped ZnO) 단결정을 과산화수소(H2O2) 또는 오존을 함유하는 습성 케미컬(wet chemical)을 이용하여 산화시킴으로써, 표면의 산소량을 증가시킨다. • Niobium-doped strontium titanate (Nb-doped SrTiO 3 ) or aluminum-doped zinc oxide (Al-doped ZnO) single crystals were prepared using a wet chemical containing hydrogen peroxide (H 2 O 2 ) or ozone. By oxidizing, the amount of oxygen on the surface is increased.
● 일함수가 큰 금속 전극을 증착하여 쇼트키 장벽을 형성한다. A metal electrode with a large work function is deposited to form a Schottky barrier.
● 계면 전하의 충전/방전을 이용하여 쇼트키 장벽을 조절하여, 흐르는 전류를 조절함으로써, 비휘발성 메모리 소자로 이용한다. The Schottky barrier is controlled by the charge / discharge of interfacial charges and the current flowing therein to be used as a nonvolatile memory device.
<실시예 2><Example 2>
아래와 같은 공정 순서를 이용하여 ReRAM용 소자를 제작한다. A device for ReRAM is manufactured using the following process sequence.
● 실리콘에 고농도 도핑영역을 형성하고, 이곳에 접촉영역을 연다. • Form a heavily doped region in the silicon and open the contact region here.
● 선택적으로 니오브가 도핑된 티탄산스트론튬(Nb-doped SrTiO3) 또는 알루미늄이 도핑된 산화아연(Al-doped ZnO) 단결정 펄스 레이저 증착(Pulsed Laser Deposition , 'PLD') 공정으로 형성한다. Optionally, it is formed by Niobium-doped strontium titanate (Nb-doped SrTiO 3 ) or aluminum-doped Al-doped ZnO (Pulsed Laser Deposition, 'PLD') process.
● 계면을 산소 플라즈마 분위기에서 처리한다. The interface is treated in an oxygen plasma atmosphere.
● 일함수가 큰 금속 전극을 증착하여 쇼트키 장벽을 형성한다. A metal electrode with a large work function is deposited to form a Schottky barrier.
● 계면 전하의 충전을 이용하여 비휘발성 메모리 소자로 이용한다. It is used as a nonvolatile memory device by charging the interfacial charge.
도 1은 본 발명의 일 실시예에 따른 단결정 산화물 박막을 이용한 메모리소자의 전기적 특성을 나타낸 것이다. 기존의 비정질/다결정질 구조와 비교할 때, 월등히 높은 스위칭의 재현성 특성을 보여준다. 또한, 저항의 분포도 매우 좁은 영역에서 나타남으로 메모리 소자 적용을 고려할 때, 우수한 특성을 보인다. 또한, 비정질 및 다결정 대비 단결정 단결정이 안정적인 메모리 특성을 보여준다. 1 illustrates electrical characteristics of a memory device using a single crystal oxide thin film according to an embodiment of the present invention. Compared with the conventional amorphous / polycrystalline structure, it shows a much higher reproducibility characteristic of switching. In addition, since the distribution of resistance also appears in a very narrow region, it shows excellent characteristics when considering the application of memory devices. In addition, single-crystal single crystals exhibit stable memory characteristics compared to amorphous and polycrystals.
도 2는 본 발명의 일 실시예에 따른 단결정의 계면 처리에 따른 저항변화 메모리 소자의 특성 비교한 그래프이다. 도 2를 참조하면, 표면을 산화 분위기에서 처리하며, 저항의 균일도가 현저히 개선됨을 확인하였다. 대표적인 산화 처리 공정으로 과산화수소(H2O2)/황산(H2SO4) 용액에 처리하거나, 산소 플라즈마 분위기에서 처리하는 것이다. 2 is a graph comparing characteristics of a resistance change memory device according to interfacial treatment of a single crystal according to an exemplary embodiment of the present invention. Referring to Figure 2, the surface is treated in an oxidizing atmosphere, it was confirmed that the uniformity of the resistance is significantly improved. Representative oxidation treatment is to treat the hydrogen peroxide (H 2 O 2 ) / sulfuric acid (H 2 SO 4 ) solution, or in an oxygen plasma atmosphere.
도 3a 및 도 3b는 본 발명의 일 실시예에 따른 소자의 스위칭 특성을 나타낸 것이다. 도 3a는 기존 비산화 처리 공정을 나타낸 것이고, 도 3b는 과산화수소(H2O2)+황산(H2SO4) 표면 산화 적용도 3a 및 도 3b를 참조하면, 스위칭에 따른 저항 변화의 안정성이 산화 처리 후 현저히 개선됨을 확인하였다. 3A and 3B illustrate switching characteristics of a device according to an embodiment of the present invention. Figure 3a shows a conventional non-oxidation process, Figure 3b is hydrogen peroxide (H 2 O 2 ) + sulfuric acid (H 2 SO 4 ) surface oxidation application Referring to Figures 3a and 3b, the stability of the resistance change according to the switching is It was found that after the oxidation treatment was significantly improved.
도 4는 산화 처리 후, 산소의 에너지 스테이트를 x-레이 광전자분광기(XPS)로 분석한 결과이다. 산소처리 후, 피크 강도가 개선되고 피크의 위치가 이동한 것으로 관찰되었으며, 이는 좀 더 안정적인 표면 산화물의 형성을 의미한다. 4 shows the results of analyzing the energy state of oxygen with an x-ray photoelectron spectrometer (XPS) after oxidation treatment. After oxygenation, it was observed that the peak intensity improved and the position of the peak shifted, indicating the formation of a more stable surface oxide.
상기와 같이, 본 발명의 바람직한 실시예를 참조하여 설명하였지만 해당 기 술 분야의 숙련된 당업자라면 하기의 특허청구범위에 기재된 본 발명의 사상 및 영역으로부터 벗어나지 않는 범위 내에서 본 발명을 다양하게 수정 및 변경시킬 수 있음을 이해할 수 있을 것이다.As described above, the present invention has been described with reference to the preferred embodiments, but those skilled in the art can variously modify and modify the present invention without departing from the spirit and scope of the present invention as set forth in the claims below. It will be appreciated that it can be changed.
상술한 바와 같이 본 발명에 의하면 비정질 또는 다결정대신 단결정 산화물을 사용하고, 표면 산화 처리를 통해 인터페이스 스테이트를 조절함으로써 안정적인 스위치 특성을 확보하는 ReRAM 소자를 제작할 수 있다. As described above, according to the present invention, it is possible to fabricate a ReRAM device which uses a single crystal oxide instead of amorphous or polycrystal, and secures stable switch characteristics by adjusting the interface state through surface oxidation treatment.
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|---|---|---|---|---|
| KR20030067586A (en) * | 2002-02-07 | 2003-08-14 | 샤프 가부시키가이샤 | Method for fabricating variable resistance device, method for fabricating non-volatile variable resistance memory device, and non-volatile variable resistance memory device |
| KR20040071311A (en) * | 2002-01-15 | 2004-08-11 | 인피네온 테크놀로지스 아게 | Resistive memory elements with reduced roughness |
| KR20050000518A (en) * | 2002-04-18 | 2005-01-05 | 인피네온 테크놀로지스 아게 | Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in mram processing |
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| KR20040071311A (en) * | 2002-01-15 | 2004-08-11 | 인피네온 테크놀로지스 아게 | Resistive memory elements with reduced roughness |
| KR20030067586A (en) * | 2002-02-07 | 2003-08-14 | 샤프 가부시키가이샤 | Method for fabricating variable resistance device, method for fabricating non-volatile variable resistance memory device, and non-volatile variable resistance memory device |
| KR20050000518A (en) * | 2002-04-18 | 2005-01-05 | 인피네온 테크놀로지스 아게 | Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in mram processing |
| JP2005123361A (en) | 2003-10-16 | 2005-05-12 | Sony Corp | Resistance change type nonvolatile memory and its manufacturing method, and method of forming resistance change layer |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102623634A (en) * | 2012-03-29 | 2012-08-01 | 杭州电子科技大学 | A resistive memory based on doped zinc oxide film and its preparation method |
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