KR100628255B1 - Liquid Crystal Display Manufacturing Method - Google Patents

Abstract

The present invention is to provide a method of manufacturing a liquid crystal display device that can reduce the process time and cost by minimizing the number of masks, the liquid crystal display device manufacturing method of the present invention is a first having a gate wiring and a data wiring arranged vertically and horizontally Preparing a second substrate having a substrate and a common electrode, forming a thin film transistor and a pixel electrode on the first substrate, forming a light blocking layer in a region other than the pixel electrode, and Forming a color filter layer on the electrode, and forming a liquid crystal layer between the first substrate and the second substrate.

Thin film transistor, mask

Description

Liquid crystal display manufacturing method {Method for fabricating liquid crystal display}

1A to 1E are cross-sectional views illustrating a manufacturing process of a top plate for explaining a method of manufacturing a liquid crystal display device according to the related art.

2A through 2F are cross-sectional views illustrating a manufacturing process of a lower plate for explaining a method of manufacturing a liquid crystal display device according to the related art.

3A to 3G are plan views for each step of a process for explaining a method of manufacturing a liquid crystal display device according to the present invention.

4A to 4G are cross-sectional views taken along line AA ′ of FIG. 3G.

5A to 5G are cross-sectional views taken along the line BB ′ of FIG. 3G.

Explanation of symbols for the main parts of the drawings

31: insulated substrate 33: gate wiring

33a: gate electrode 35: gate insulating film

37: amorphous silicon layer 39: n ⁺ layer

41 metal layer 41a gate wiring

41b: expansion pattern 41c, 41d: source / drain electrodes

43 photoresist 47 pixel electrode

49: light blocking layer 51: color filter layer

The present invention relates to a display device, and more particularly to a method for manufacturing a liquid crystal display device.

One of the display devices, Cathode Ray Tube (CRT) has been used mainly for monitors such as TVs, measuring devices, information terminal devices, etc., but the size and weight of CRT itself make it necessary to reduce the size and weight of electronic products. Couldn't respond positively.

In order to replace the CRT, Liquid Crystal Display (LCD), which has the advantages of light and thin, has been actively developed, and recently, the liquid crystal display (LCD) has been developed enough to perform a role as a flat panel display device. Demand is on the rise.

In general, a low cost and high performance thin film transistor liquid crystal display (TFT-LCD) uses an amorphous silicon thin film transistor as a switching device. Currently, the liquid crystal display device is a VGA (Video Graphic Array; maximum resolution is 640 x 480 pixels). It aims at high resolution from SVGA (800 × 600) and XVGA (1024 × 768).

The development of the TFT-LCD industry and its application has been accelerated by the increase in size and resolution, and much effort has been made in terms of simplification of the manufacturing process and improvement of yield for increasing productivity and low cost.

Hereinafter, a liquid crystal display device manufacturing method according to the related art will be described with reference to the accompanying drawings.

1A to 1E are cross-sectional views illustrating a manufacturing process of a top plate according to the prior art, and FIGS. 2A to 2F are cross-sectional views illustrating a manufacturing process of a bottom plate.

First, referring to the manufacturing method of the upper plate, as shown in FIG. 1A, a light blocking material is formed on the first insulating substrate 11, and then patterned by a photo process using a first mask (not shown). The black matrix layer 13 is formed. The black matrix layer 13 is formed in a matrix form on the first insulating substrate 11, and typically has a double layer structure in which a chromium compound layer and a chromium layer are stacked, or chromium nitride is disposed between the chromium compound layer and the chromium layer. It has a triple film structure interposed with another chromium compound layer like a layer.

Subsequently, as shown in FIG. 1B, a photo process using a second mask (not shown) as the first color 15a among the three colors R, G, and B for color conversion is performed on the black matrix layer 13. To form selectively.

Thereafter, as shown in FIGS. 1C and 1D, the second color 5b and the third color 15c are selectively formed by the method of forming the first color 15a, and FIG. 1D is a second color. The cross section at the time of forming 15b is shown, and FIG. 1D shows the cross section at the time of forming the 3rd color 15c. Although not shown in the drawing, separate masks (third mask and fourth mask) are required to form the second color 15b and the third color 15c, respectively.

As such, after the black matrix layer 13 and the color filter layers of R, G, and B are formed on the first insulating substrate 11, as shown in FIG. 1E, ITO (Induim Tin Oxide) for the common electrode is formed on the entire surface thereof. (17). In this case, the common electrode ITO 17 is patterned by using a fifth mask (not shown).

As described above, in the manufacture of the conventional top plate, a total of five masks are required since the black matrix layer, the R, G, B color filter layers, and the ITO layer for the common electrode are formed on separate insulating masks, respectively.

Next, the manufacturing method of the lower plate will be described with reference to FIGS. 2A to 2F.

As shown in FIG. 2A, a gate electrode material such as Al, Ta, Cr, or the like is formed on the second insulating substrate 11a, and then the gate is patterned using a first mask (not shown). The electrode 12 is formed.

Subsequently, as shown in FIG. 2B, the gate insulating layer 14 made of silicon nitride or the like is formed on the second insulating substrate 11a including the gate electrode 12, and then the semiconductor layer 16 is formed on the upper portion thereof. Form in turn.

As illustrated in FIG. 2C, the active layer 16a is formed through the patterning process using the second layer (not shown) of the semiconductor layer 16, and then the metal layer 18 is formed on the entire surface.

Subsequently, as shown in FIG. 2D, the metal layer 18 is selectively removed to form a source electrode 18a and a drain electrode 18b, and then includes a source electrode 18a and a drain electrode 18b. The protective film 20 is formed on the entire surface. In this case, the source and drain electrodes are formed by a photo process using a third mask (not shown).

As shown in FIG. 2E, after the protective film 20 is selectively removed using the fourth mask (not shown) to expose the drain electrode 18b, the connection hole 21 is formed. As described above, after the ITO layer for the pixel electrode is formed on the front surface, the pixel electrode electrically connected to the drain electrode 18b through the connection hole 21 in a patterning process using a fifth mask (not shown). 22) to form a lower plate.

After the upper plate and the lower plate are manufactured in this manner, the liquid crystal is encapsulated between the two substrates to complete the manufacturing process of the liquid crystal display device according to the prior art.

However, the conventional liquid crystal display manufacturing method as described above has the following problems.

Since five masks are required for manufacturing the upper plate and five masks are required for the lower plate, at least ten masks are required to manufacture the liquid crystal display, and thus the cost according to the number of masks increases, and thus the photo The process takes longer to process.

The present invention has been made to solve the above problems of the prior art, an object of the present invention is to provide a method of manufacturing a liquid crystal display device that can reduce the process time and cost by minimizing the number of masks.

According to an aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device, the method including preparing a second substrate having a first electrode and a common electrode having gate lines and data lines arranged vertically and horizontally; Forming a thin film transistor and a pixel electrode, forming a light blocking layer in a region other than the pixel electrode, forming a color filter layer on the pixel electrode, between the first substrate and the second substrate It characterized by comprising a step of forming a liquid crystal layer.

Preferably, forming a gate wiring and a gate electrode on an insulating substrate, forming a gate insulating film on the front surface including the gate electrode, and then laminating an amorphous silicon layer, an n ⁺ layer and a metal layer in sequence; Patterning a metal layer to form an extension pattern extending toward the data line and the gate electrode; removing the extension pattern corresponding to the channel region of the thin film transistor to form a source and a drain electrode, and forming the source electrode and the drain. Simultaneously etching the n ⁺ layer between the electrodes and the gate insulating film over the gate pad, forming a pixel electrode connected to the drain electrode, forming a light blocking layer in an area except the pixel electrode; And forming a color filter layer on the pixel electrode.

In the present invention, the color filter layer is formed on the first substrate on which the TFT array is formed, and the active pattern, the source and the drain electrode are patterned in one photo process, thereby minimizing the number of masks, and using the light blocking layer as a protective film. Since a separate protective film forming process is not required, the process can be simplified.

Hereinafter, a method of manufacturing a liquid crystal display of the present invention will be described in detail with reference to the accompanying drawings.

3A to 3G are plan views illustrating process steps for explaining a method of manufacturing a liquid crystal display device according to the present invention.

As shown in FIG. 3A, the gate wiring 33 and the gate electrode 33a are patterned on the insulating substrate 31, and as shown in FIG. 3B, the gate wiring 33 and the gate electrode 33a are patterned. The gate insulating film 35, the amorphous silicon layer 37, the n ⁺ layer 39, and the metal layer 41 are sequentially stacked on the insulating substrate 31. For reference, only the uppermost metal layer 41 is shown in FIG. 3B.

As shown in FIG. 3C, the data line 41a and the expansion pattern 41b extending toward the gate electrode 33a are formed in the direction crossing the gate line 33, and then shown in FIG. 3D. As described above, the extension pattern 41b is selectively removed to form a source electrode 41c and a drain electrode 41d, and a corresponding n ⁺ layer 39 between the source electrode 41c and the drain electrode 41c. Optionally remove). At this time, the gate insulating layer 35 of the gate pad portion is also removed to expose the gate pad portion (not shown).

As shown in FIG. 3E, after forming the pixel electrode 47 to be electrically connected to the drain electrode 41d, as shown in FIG. 3F, light is transmitted to an area except the pixel electrode 47. The light blocking layer 49 is formed to prevent it.

3G, a color filter layer 51 is formed on the pixel electrode 47 on one side of the light blocking layer 49, and the color filter layer 51 and the light blocking layer 49 are formed. Forming a binder (not shown) on the top, and forming a contact hole (not shown) by removing the light blocking layer 49 on the gate pad portion for the gate pad contact to manufacture a liquid crystal display device according to the present invention The process is complete.

According to the present invention, the light blocking layer 49 and the color filter layer 51 are formed on the substrate on which the thin film transistor and the pixel electrode are disposed, and the etching process for forming the source electrode 41c and the drain electrode 41d is performed. The n ⁺ layer 39 and the gate insulating layer 35 on the gate pad portion are simultaneously etched to minimize the number of masks and simplify the process of exposing the gate pad portion.

Thus, the liquid crystal display device manufacturing method of the present invention will be described in more detail with reference to the process cross section as follows.

4A to 4F are cross-sectional views taken along line AA ′ of FIG. 3G, and FIGS. 5A to 5F are cross-sectional views taken along line B-B ′ of FIG. 3G.

First, as shown in FIGS. 4A and 5A, a material for forming a gate wiring and a gate electrode on the insulating substrate 31, for example, Al. After Ta, Cr and the like are formed by the sputtering method, the gate wiring 33 and the gate electrode 33a of the thin film transistor are formed by a patterning process using a first mask (not shown).

4B and 5B, the gate insulating film 35 is formed of silicon nitride (SiN _X ), silicon oxide (SiO _X ), or the like on the insulating substrate 31 including the gate electrode 33a. After that, an amorphous silicon layer 37 and an n ⁺ layer 39 are sequentially stacked on the gate insulating layer 35, and the metal layer for source / drain electrodes of the data line and the thin film transistor is formed on the n ⁺ layer 39. To form 41.

As shown in Fig. 4c and 5c, the second mask by using a (not shown) by bulk etching the metal layer (41), n ⁺ layer 39 and amorphous silicon layer (37) n ⁺ An active pattern made of the layer 39, the amorphous silicon layer 37, a data line 41a made of the metal layer 41, and an expansion pattern 41b extending toward the upper portion of the gate electrode 33a, respectively. do. Here, the expansion pattern 41b is separated into a source electrode and a drain electrode in a subsequent process, but is not separated yet. For reference, the gate lines 33a and the data lines 41a are vertically and horizontally disposed, and the thin film transistors are formed at portions where the gate lines 33a and the data lines 41a cross each other.

As shown in Figs. 4D and 5D, the photoresist 43 is applied to the entire surface including the expansion pattern 41b, and then patterned by an exposure and development process using a third mask (not shown). Thereafter, the extension pattern 41b is selectively removed by an etching process using the patterned photoresist 43 to form a source electrode 41c and a drain electrode 41d, and the source electrode 41c and the drain electrode 41d. Etch n ⁺ layer 39 between In this case, although not shown in the drawing, the gate insulating film on the upper side of the gate pad portion is also etched to expose the gate pad portion. Therefore, the source and drain electrodes 41c and 41d are formed, the n ⁺ layer 39 is etched and the gate pad portion is exposed by an etching process using one mask.

That is, since the gate insulating layer 35 above the gate pad portion is also etched by using the etch selectivity when the n ⁺ layer 39 is etched, the light blocking layer is formed in a subsequent process, and then again in the etching process for gate pad contact. Since only the blocking layer needs to be etched, the process for exposing the gate pad part is much easier. If the gate insulating layer 35 is not simultaneously etched when the n ⁺ layer 39 is etched, since the light blocking layer is formed, the light blocking layer and the gate insulating layer must be sequentially etched for the gate pad contact. The process is complicated.

4E and 5E, after removing the photoresist 43, the pixel electrode 47 is patterned to be electrically connected to the drain electrode 41d. That is, after forming ITO for pixel electrodes on the entire surface including the source and drain electrodes 41c and 41d, the pixel electrode 47 is formed by a patterning process using a fourth mask (not shown). In this case, the pixel electrode 47 extends to the upper portion of the drain electrode 41d on the gate insulating layer 35.

As shown in FIGS. 4F and 5F, after forming a light blocking material layer on the entire surface including the pixel electrode 47, the light blocking material is formed by a photolithography process using a fifth mask (not shown). The layer is selectively removed to form the light blocking layer 49. In this case, the light blocking material uses BCB (Benzocyclobutene), in addition to using a metal film, such as chromium (Cr) or an organic material of carbon (Carbon) system or for the purpose of low reflection of the chromium compound layer and the chromium layer The double film, the chromium compound layer and the chromium layer can be formed into a triple film with another chromium compound layer interposed.

Here, since the light blocking layer 49 serves as a protective film, there is no need to form a separate protective film, and thus a process for forming the protective film may be omitted.

4G and 5G, a color pigment for color filter formation is electrodeposited on the pixel electrode 47 to form a color filter layer 51, and then a color is formed using a binding process. A binder (not shown) is formed on the filter layer 51 and the light blocking layer 49. Although not shown in the drawings, a liquid crystal display according to the present invention may be formed by selectively removing the light blocking layer 49 above the gate pad part using a sixth mask (not shown) to form a gate pad contact (not shown). The display device manufacturing process is completed.

As described above, the liquid crystal display device manufacturing method of the present invention has the following effects.

First, all the patterns necessary for LCD production are formed on one substrate, and the number of masks can be remarkably reduced since the n ⁺ layer etching and the exposure of the gate pad are simultaneously performed during the formation of the source electrode and the drain electrode. Can be saved.

Second, when the n ⁺ layer is etched, the gate insulating layer on the upper side of the gate pad portion is also etched at the same time, thereby making it easier to form the pad contact.

Third, since the light blocking layer is used as a protective film without forming a separate protective film, the process can be simplified.

Claims (9)

Preparing a first substrate having a vertically and laterally arranged gate wiring and a data wiring and a second substrate having a common electrode; Forming a thin film transistor and a pixel electrode on the first substrate; Forming a light blocking layer in a region other than the pixel electrode; Forming a color filter layer on the pixel electrode; And forming a liquid crystal layer between the first substrate and the second substrate, Forming the thin film transistor, Sequentially stacking a gate insulating film, an amorphous silicon layer, an n + layer, and a metal layer on the entire surface including the gate electrode; Collectively etching the metal layer, the n + layer, and the amorphous silicon layer to form an active pattern, an extension pattern extending over the gate electrode, and a data line; Patterning the extension pattern to form a source electrode and a drain electrode, and removing the n + layer between the source electrode and the drain electrode and the gate insulating layer above the gate pad part. Manufacturing method. delete The method of claim 1, further comprising: forming a binder on the color filter layer and the light blocking layer after the color filter layer is formed. The method of claim 1, wherein the light blocking layer is also used as a protective film. The method of claim 1, wherein the forming of the pixel electrode comprises: Forming an ITO layer for the pixel electrode on the first substrate on which the thin film transistor is formed; And patterning the ITO layer on the gate insulating film to extend over the drain electrode of the thin film transistor. Forming a gate wiring and a gate electrode on the insulating substrate; Forming a gate insulating film on the entire surface including the gate electrode, and then sequentially laminating an amorphous silicon layer, an n + layer, and a metal layer; Patterning the metal layer, the n + layer, and the amorphous silicon layer to form an active pattern, an extension pattern extending above the gate electrode, and a data line; Patterning the extension pattern to form a source and a drain electrode and simultaneously etching the n + layer between the source electrode and the drain electrode and the gate insulating layer on the gate pad; Forming a pixel electrode connected to the drain electrode; Forming a light blocking layer in a region other than the pixel electrode; And forming a color filter layer on the pixel electrode. The method of claim 6, wherein the light blocking layer is also used as a protective film. The method of claim 6, further comprising forming a binder on the color filter layer and the light blocking layer after the color filter layer is formed. The method of claim 8, further comprising selectively forming the pad contact by removing the light blocking layer on the upper side of the gate pad part after forming the binder.

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