KR100587279B1 - Timing Correction Device and Method of Digital Broadcast Receiver - Google Patents

Abstract

After setting the fast Fourier transform window timing in the initial acquisition mode, if the correction is required in the tracking mode, the time domain does the same, and the discontinuity of the phases generated therefrom. To provide a timing correction apparatus and method for a digital broadcast receiver for tracking the time through phase re-rotation at the rear end of the fast Fourier transform unit, a timing correction apparatus for a digital broadcast receiver having a frequency correction unit In the present invention, a start point is detected according to a signal output from the frequency corrector, and if a phase offset occurs in the detected start point, the delay is delayed for a predetermined time and a phase offset according to the change of the phase offset. Accumulate to output phase offset A timing synchronizer to output a frequency domain value by performing a fast Fourier transform according to a start point output from the timing synchronizer, and a signal output from the fast Fourier transform unit. It consists of an equalizer to rotate the phase according to the signal output from the interpolated in the time domain to remove the discontinuity of the phase, and to phase-re-rotate the signal divided into interpolated in the frequency domain to eliminate the phase rotation error, After setting the fast Fourier transform window timing in the initial acquisition mode, if correction is required in the tracking mode, do so in the time domain, and discontinuity of the phases generated through the phase rerotation at the rear of the fast Fourier transform unit Tracking by the effect of the correction constant window timing as possible in the normal state by preventing the error generated in the interpolation process of the equalizer.

Timing, correction

Description

Apparatus and method for correcting timing in digital broadcasting receiver

1 shows an example of a DVB-T system according to the prior art.

2 is a diagram illustrating a transmission state of an OFDM symbol of FIG.

3 is a view showing a detailed configuration of the equalizer of FIG.

4 is a diagram illustrating an example of a fast Fourier transform window timing synchronizer for controlling the fast Fourier transform window time of FIG.

5 is a diagram showing the configuration of a timing correction apparatus for a digital sending receiver according to the present invention.

FIG. 6 is a diagram illustrating a detailed configuration of the first and second phase rotators of FIG. 5. FIG.

Explanation of symbols for main parts of the drawings

106: timing synchronizer 106a: timing detector

106b: first delay unit 106c: phase accumulator

107: fast Fourier transform section 108: equalizer section

108a: second delay unit 108b: first phase rotator

108c: time interpolator 108d: second phase rotator

108e: frequency interpolator 108f: divider

The present invention relates to a digital broadcast receiver, and more particularly, to a timing correction apparatus and method of a digital broadcast receiver.

DVB-T (Digital Video Broadcasting-Territorial) method has recently been decided as the next generation terrestrial digital broadcasting method in Europe, and is currently undertaking trial broadcasting and parts development in each country in Europe. It divides the digital market.

The DVB-T standard is similar or the same in DVB-S (Satellite), DVB-C (Cable) and channel coding (for example, Viterbi decoder, Reed-Solomon decoder, etc.).

However, the modulation / demodulation method adopts Orthogoanal Frequency Division Multiplexing (OFDM) in consideration of terrestrial waves, so it is completely different from DVB-S and DVB-C using Quadrature Phase Shift Keying (QPSK) and Quadrature Amplitude Modulation (QAM). .

Unlike the general single carrier modulation / demodulation method that continuously transmits information on the time axis, the OFDM method is a method of distributing information over a plurality of frequencies, and has a particularly strong strength in multipath channels such as terrestrial channel characteristics. have.

However, since the scheme is different from the general modulation scheme, the configuration of the receiver has a completely different configuration accordingly.

Hereinafter, a DVB-T system according to the prior art will be described with reference to the accompanying drawings.

1 is a view showing an example of a DVB-T system according to the prior art, a tuner 1 for converting an orthogonal frequency division multiplexing (OFDM) signal received through an antenna to an intermediate frequency (IF), and the tuner (1). I and Q signals from the analog / digital converter 2 for converting the intermediate frequency IF converted from the digital signal into a digital signal according to a predetermined sampling frequency, and the digital signal converted from the analog / digital converter 2 An I / Q signal generator 3 and a frequency corrector 4 for correcting the I and Q signals generated by the I / Q signal generator 3 according to the feedback frequency; An auto gain control (AGC) unit 5 for automatically controlling gains of the I and Q signals corrected by the frequency corrector 4, and the frequency corrector 4 Tie to generate a start point according to the corrected I and Q signals A fast Fourier transform is performed on the timing synchronizer 6 and the I and Q signals corrected by the frequency corrector 4 according to the start points generated by the timing synchronizer 6. A Fast Fourier Transform (FFT) unit 7 for outputting a frequency domain value, and an equalizer unit 8 for compensating for the distorted carriers included in the signal converted by the FFT unit 7. And a demapper 9 for demapping the signals output from the equalizer 8 in reverse according to a mapping method, and a signal output from the demapper 9. Forward error correction to output MPEG2 TS by correcting the forward error of the signal output from the inner deinterleaver 10 to deinterleave the unit and the inner deinterleaver 10. The clock according to the signal converted by the < RTI ID = 0.0 > (FEC) < / RTI > A clock synchronizing unit 12 for synchronizing, a voltage control oscillator (VCO) unit 13 for generating a sampling frequency according to the clock generated by the clock synchronizing unit 12, and the FFT unit 7 ) Is configured as an Auto Frequency Control (AFC) unit 14 to automatically control the frequency according to the signal converted in the).

FIG. 2 is a diagram illustrating a transmission state of the OFDM symbol of FIG. 1, and FIG. 3 is a diagram illustrating a detailed configuration of the equalizer of FIG. 1 by delaying a complex signal output from the FFT unit 7 by a predetermined time. A delay section 8a for outputting, a time / frequency interpolating section 8b for interpolating and outputting a complex signal output from the FFT section 7 in a time / frequency domain, and the delay section 8a A divider 8c divides the delayed signal into a signal interpolated by the time / frequency interpolation unit 8b and outputs the resultant signal.

The time / frequency interpolator 8b includes a time interpolator 8b-1 for interpolating and outputting a complex signal output from the FFT unit 7 in a time domain, and the time interpolator 8b. And a frequency interpolator 8b-2 for interpolating and outputting the signal output from -1) in the frequency domain.

FIG. 4 is a diagram illustrating an example of a fast Fourier transform window timing synchronizer for controlling the fast Fourier transform window time of FIG. 1, and as shown, the fast Fourier transform window timing synchronizer 15 is configured to perform the I / Q. Control for shifting the timing detector 15a which detects a start point from the signal generated by the signal generator 3, and the timing point detected by the timing detector 15a. It is comprised by the control part 15b which outputs a signal.

The DVB-T system according to the related art configured as described above will be described in detail with reference to the accompanying drawings.

First, when a user selects a predetermined channel, the tuner 1 converts an Orthogonal Frequency Division Multiplexing (OFDM) signal received through an antenna into an intermediate frequency IF and outputs the converted frequency.

The analog / digital converter 2 then converts the intermediate frequency IF converted by the tuner 1 into a digital signal according to a predetermined sampling frequency and outputs the resultant signal.

Subsequently, the I / Q signal generator 3 generates I and Q signals, which are complex signals, from the digital signals converted by the analog / digital converter 2.

The frequency corrector 4 then corrects the I and Q signals generated by the I / Q signal generator 3 according to the fed back frequency and outputs the resultant signal.

Accordingly, the automatic gain control (AGC) unit 5 automatically controls gains of the I and Q signals corrected by the frequency corrector unit 4 to adjust the gain of the tuner 101. To control.

The timing synchronizer 6 also includes a start point as shown in FIG. 2 according to the I and Q signals corrected by the frequency corrector 4 in the initial acquisition mode. Generate a (start point).

The initial acquisition mode (Acquisition mode) is the first synchronization process (synchronization) process performed at the receiver.

As shown in FIG. 2, the concept of an OFDM symbol means a unit composed of samples corresponding to points (usually thousands or more) of the fast Fourier transform (FFT) unit 7, and the FFT unit Timing synchronization for finding the start point of (7) is called FFT window timing recovery.

In order to preserve orthogonality under the multipath channel and useful data intervals corresponding to the size of the fast Fourier transform unit, one OFDM symbol is placed at the front of the usable data. Guard Data: It is composed of sum of 1/4 ~ 1/32 sections of useful data, and Guard Interval section is one of the core standards of OFDM. In the multi-pad environment, which is the most common feature, intersymbol interference (ISI) is removed to maintain orthogonality of OFDM signals.

If the orthogonality of the OFDM signal is impaired, the signal processing after the FFT unit 7 is seriously impaired, which greatly degrades the system performance.

Then, the FFT unit 7 performs fast Fourier transform on the I and Q signals corrected by the frequency corrector 4 according to the start point generated by the timing synchronizer 6 to perform the frequency domain value. Outputs a complex signal.

Accordingly, the equalizer 8 compensates and outputs the distorted carrier included in the signal converted by the FFT 7.

The demapper 9 demapping demaps the signal output from the equalizer 8 in reverse according to the mapping method and outputs the resultant signal.

The inner deinterleaver 10 deinterleaves the signal output from the demapper 9 in symbol units and outputs the resultant signal.

The forward error correction unit (FEC) 11 then corrects the forward error of the signal output from the inner deinterleaver 10 and outputs the MPEG2 TS.

On the other hand, the clock synchronizer 12 outputs the clock in synchronization with the signal converted by the FFT unit 7.

The voltage control oscillator (VCO) unit 13 generates a sampling frequency according to the clock generated by the clock synchronizer 12 and feeds it back to the analog / digital converter 2.

In addition, the Auto Frequency Control (AFC) unit 14 automatically controls the frequency according to the signal converted by the FFT unit 7 to feed back to the Auto Gain Control (AGC) unit 5. do.

The timing synchronizer 6 may include a start point as shown in FIG. 2 according to the I and Q signals corrected by the frequency corrector 4 in the tracking mode. start point).

The tracking mode process is a process in which the system continuously tracks timing in a steady state, and fast Fourier transform window timing tracking in an OFDM scheme is a channel environment. This is to keep track of the fast Fourier transform start point as a function of.

In the tracking mode, as shown in FIG. 4, by controlling the sampling frequency by applying a tracking control signal to the FFT window timing synchronizer 15, the window timing is controlled to be shifted little by little. As shown, the timing detector 15a in the fast Fourier transform widow timing synchronizer 15 detects a start point according to the signal generated by the I / Q signal generator 3. Then, the controller 15b controls the timing point detected by the timing detector 15a to shift the window timing little by little.

Therefore, tracking should be theoretically done in sample units, but if the system corrects the window timing in symbol units during normal operation, it will cause phase discontinuity of the phase rotation at the rear end of the FFT, resulting in error for several OFDM. Will be generated.

That is, when the fast Fourier transform window timing is shifted by the sample unit in the tracking mode, this causes phase rotation as shown in Equation 1 below to the OFDM symbol after the fast Fourier transform unit 7.

은 보정이 일어나지 않을 경우의 신호이며,

은 고속 푸리에 변환 사이즈이고,

는 주파수 인덱스(0~N-1)이며,

는 시프트 값(shift value)이다.here

Is the signal when no correction occurs,

Is the fast Fourier transform size,

Is the frequency index (0 ~ N-1),

Is a shift value.

The Fast Fourier Transform (FFT) section 7 then continuously generates the I, Q signals corrected by the Frequency Corrector section 4 generated by the timing synchronizer 6 continuously. A fast Fourier transform is performed according to an FFT start point to output a complex signal having a frequency domain value.

In addition, the equalizer unit 8 compensates and outputs the distorted carrier included in the signal converted by the FFT unit 7.

That is, as shown in FIG. 3, the delay unit 8a in the equalizer unit 11 delays the complex signal output from the FFT unit 7 for a predetermined time and outputs the delayed signal.

The time / frequency interpolator 8b interpolates and outputs the complex signal output from the FFT unit 7 in the time / frequency domain.

That is, the time interpolator 8b-1 in the time / frequency interpolator 8b interpolates and outputs the complex signal output from the FFT unit 7 in the time domain.

Here, the time interpolator 8b-1 requires the buffering of several OFDM symbols, and the discontinuity of the phase causes a fatal error during the buffering depth (4OFDM symbols in DVB-T).

The frequency interpolator 8b-2 then interpolates the signal output from the time interpolator 8b-1 in the frequency domain and outputs the interpolated signal.

Here, the frequency interpolator 8b-2 performs FIR filtering on the signal output from the time interpolator 8b-1 in the frequency domain to obtain a final channel estimation result. The delayed input signal and the complex division are performed to match the timing in the process.

Accordingly, the divider 8c divides the signal delayed by the delay unit 8a into an interpolated signal by the time / frequency interpolating unit 8b, and outputs the resultant signal to the demapper 9.

The demapper 9 then demaps the signal output from the equalizer 8 in reverse according to the mapping method and outputs the resultant signal.

The inner deinterleaver 10 deinterleaves the signal output from the demapper 9 in symbol units and outputs the resultant signal.

Accordingly, the Forward Error Correction (FEC) unit 11 corrects the forward error of the signal output from the inner deinterleaver 10 and outputs the MPEG2 TS.

However, the timing correction apparatus of the digital broadcasting receiver according to the prior art has the following problems.

First, since the window timing is corrected in units of samples during normal operation of the system, a discontinuous phase rotation occurs at the rear end of the fast Fourier transform unit, thereby causing an error in the time interpolation process of the equalizer.

Second, because the tracking information is applied from the timing detector to the sampling frequency control block to control the window timing, the adaptation speed is very slow and cannot be applied under fast channel fluctuations. It is complicated, making the system difficult to implement.

Therefore, the present invention has been made to solve the above problems, and after setting the fast Fourier transform window timing in the initial acquisition mode (acquisition mode) need to be corrected in the tracking mode (tracking mode) In the case of the time domain, the present invention provides the apparatus and method for correcting the timing of a digital broadcasting receiver so as to track the discontinuity generated from the phase through phase re-rotation at the rear end of the fast Fourier transform unit. Its purpose is to.

A timing correction apparatus for a digital broadcast receiver according to the present invention for achieving the above object is a timing correction apparatus for a digital broadcast receiver having a frequency correction unit, the start point according to the signal output from the frequency correction unit. Detects and delays a phase offset for a predetermined time, accumulates and outputs a phase, and performs fast Fourier transform according to the start point output from the timing synchronizer to perform complex frequency domain values. a fast Fourier transform unit for outputting a complex signal and phase rotation of the signal output from the fast Fourier transform unit according to the signal output from the timing synchronizer to remove discontinuity of the phase and then interpolate in the time domain Rate and phase re- It comprises an equalizer which removes the phase rotation error by dividing into a signal interpolated in the frequency domain by rotating the phase (phase re-rotation).

The timing synchronizer may include a timing detector configured to detect a start point and a phase offset from a signal output from the frequency corrector, and a first delay the predetermined phase offset by a latency of a fast Fourier transform. And a phase accumulator for accumulating a phase offset delayed by the first delay unit and outputting a resultant signal.

The equalizer unit phases the second delay unit for delaying the signal output from the fast Fourier transform unit for a predetermined time, and rotates the signal output from the fast Fourier transform unit according to the signal output from the timing synchronizer. A first phase rotator for outputting a resultant signal after removing the discontinuity of the signal; a time interpolator for interpolating a signal output from the first phase rotator in a time domain; and a signal output from the time interpolator to the timing synchro A second phase rotator for rotating the phase rotated signal from the first phase rotator and outputting the phase rotated signal according to the signal output from the first phaser, and a frequency interpolator for interpolating the signal output from the second phase rotator in a frequency domain; , The second delay In dividing a predetermined time delayed signal with the signal output from the frequency interpolator is composed, including a divider (divider) for outputting a result signal has a further feature.

The first and second phase rotators may include: a phase enhancer for increasing a phase of the signals output from the fast Fourier transform unit and the timing synchronizer with reference to first and second lookup tables, and the fast Fourier transform unit and timing. And a complex multiplier for complex multiplying the signal output from the synchronizer with the signal incremented by the phase enhancer and outputting the resultant signal.

A feature of the timing correction method of a digital broadcast receiver according to the present invention for achieving the above object is to reset the phase accumulator in the initial acquisition mode (acquisition mode) to perform the fast fast Fourier transform window start pulse Converting to a tracking mode after applying to a Fourier transform unit; if a phase offset occurs in the tracking mode, delaying it by a latency of a fast Fourier transform and accumulating the phase offset when the phase offset occurs; Phase rotating the signal output from the fast Fourier transform unit according to the emulated signal to remove the discontinuity of the phase, and interpolating the interpolated signal according to the accumulated signal. Interpol in frequency domain after rotation A byte stage and said interpolated signal to be makin comprises a step of outputting the divided signal output from the fast Fourier transform unit.

The present invention provides a phase rotation between orthogonal frequency division multiplexing (OFDM) symbols during fast Fourier transform window time correction to prevent operation errors of the equalizer. After setting the window timing, the phase discontinuity generated in the tracking mode can be corrected in the normal state through the phase rotation.

Other objects, features and advantages of the present invention will become apparent from the following detailed description of embodiments taken in conjunction with the accompanying drawings.

Hereinafter, a preferred embodiment of a timing correction apparatus and method of a digital broadcast receiver according to the present invention will be described with reference to the accompanying drawings.

FIG. 5 is a diagram showing the configuration of a timing correction apparatus for a digital sending receiver according to the present invention, and descriptions of the same components as those of FIG. 1 will be omitted.

As shown, the timing synchronizer 106 detects a start point according to the signal output from the frequency correction unit 4, delays it for a predetermined time when a phase offset occurs, and accumulates and outputs a phase. A fast Fourier transform unit 107 for performing a fast Fourier transform according to the start point output from the timing synchronizer 106 and outputting a complex signal having a frequency domain value, and the fast Fourier transform unit 107. Phase rotated according to the signal output from the timing synchronizer 106 to remove the discontinuity of the phase, and then interpolated in the time domain and phase re-rotated. The equalizer unit 108 removes the phase rotation error by dividing the interpolated signal by It is sex.

The timing synchronizer 106 includes a timing detector 106a that detects a start point and a phase offset from the signal output from the frequency corrector 4, and the detected phase offset is used to perform a fast Fourier transform. a first delay unit 106b for delaying the predetermined time by a predetermined time and a phase accumulator 106c for accumulating the phase offset delayed by the first delay unit 106b and outputting a resultant signal.

The equalizer 108 may include a second delay unit 108a for delaying a signal output from the fast Fourier transform unit 107 by a predetermined time, and a signal output from the fast Fourier transform unit 107. The first phase rotator 108b that rotates the phase according to the signal output from the timing synchronizer 106 to remove the discontinuity of the phase, and outputs the resultant signal, and the signal output from the first phase rotator 108b time. A phase rotated by the first phase rotator 108b according to a signal output from the timing synchronizer 106 and a time interpolator 108c for interpolating in the region, and a signal output from the time interpolator 108c. The second phase rotator 108d for phase rotating the signal and outputting the signal, and the signal output from the second phase rotator 108d are interpolated in the frequency domain. The frequency interpolator 108e for rate-rate and the divider 108f for dividing the signal delayed by the second delay unit 108a for a predetermined time into the signal output from the frequency interpolator 108e and outputting the resultant signal. It consists of.

FIG. 6 is a diagram illustrating a detailed configuration of the first and second phase rotators of FIG. 5, wherein the signals output from the fast Fourier transform unit 107 and the timing synchronizer 106 are converted into first and second lookup tables 202. A phase enhancer 201 for increasing a phase with reference to 203), a signal output from the fast Fourier transform 107 and a timing synchronizer 106, and an increment from the phase enhancer 201 And a complex multiplier 204 for complex-multiplexing the resultant signals and outputting the resultant signals, respectively.

COS and SIN values are stored in the first and second lookup tables 202 and 203, respectively.

A timing correction apparatus and method for a digital broadcast receiver according to the present invention configured as described above will be described in detail with reference to the accompanying drawings.

First, the timing synchronizer 106 detects and outputs a start point according to a signal output from the frequency corrector 4 as shown in FIG. 1 in an initial acquisition mode and then tracks a tracking mode. mode).

In addition, when the phase offset occurs in the tracking mode, the timing synchronizer 106 delays the phase offset for a predetermined time and accumulates the phase offset according to whether the phase offset is changed to output the phase offset.

That is, the timing detector 106a in the timing synchronizer 106 detects and outputs a start point from the signal output from the frequency compensator 4 in an acquisition mode as shown in FIG. 5. do.

In addition, the first delay unit 106b delays the detected phase offset by a predetermined time by a latency of the fast Fourier transform to output a shift phase offset.

The phase accumulator 106c is then reset according to the signal output from the timing synchronizer 106, and then a phase is generated when a phase offset is delayed by the first delay unit 106b in the converted tracking mode. After accumulating the offset, the resulting signals (-α, α) are output.

Accordingly, the fast Fourier transform unit 107 performs a fast Fourier transform according to the start point output from the timing synchronizer 106 and outputs a complex signal having a frequency domain value.

Then, the equalizer unit 108 rotates the signal output from the fast Fourier transform unit 107 according to the signal (−α) output from the timing synchronizer 106 and then time-domain. To interpolate and output the result signal.

In addition, the equalizer 108 performs phase re-rotation on the signal interpolated in the time domain according to the signal α output from the timing synchronizer 106 to interpolate in the frequency domain. The phase rotation error is eliminated by dividing by the rate signal and the resultant signal is output.

That is, as shown in FIG. 5, the second delay unit 108a in the equalizer unit 108 delays the signal output from the fast Fourier transform unit 107 by a predetermined time and outputs the resultant signal.

Then, the first phase rotator 108b rotates the signal output from the fast Fourier transform unit 107 according to the signal (−α) output from the phase accumulator 106c in the timing synchronizer 106 to perform the phase rotation. After discontinuing is removed, the resulting signal is output.

That is, as shown in FIG. 6, the phase enhancer 201 in the first phase rotator 108b receives the signals output from the fast Fourier transform unit 107 in the first and second lookup tables 202 and 203. Reference is made to increase the phase and output the result signal. In the first and second lookup tables 202 and 203, COS and SIN values are stored in advance. The complex multiplier 204 then complex-multiplies the signal output from the fast Fourier transformer 107 and the timing synchronizer 106 with the signal that is incremented by the phase enhancer 201 and outputs the resultant signal.

The time interpolator 108c then interpolates the signal output from the first phase rotator 108b in the time domain and outputs the resultant signal.

The second phase rotator 108d then outputs the signal output from the time interpolator 108c according to the signal α output from the phase accumulator 106c in the timing synchronizer 106c. Phase rotated signal is outputted by phase rotated again.

That is, as shown in FIG. 6, the phase enhancer 201 in the second phase rotator 108d receives the first and second lookup signals output from the fast Fourier transform 107 and the timing synchronizer 106. The phase is increased with reference to the tables 202 and 203, and the resultant signal is output. In the first and second lookup tables 202 and 203, COS and SIN values are stored in advance. The complex multiplier 204 then complex-multiplies the signal output from the fast Fourier transformer 107 and the timing synchronizer 106 with the signal that is incremented by the phase enhancer 201 and outputs the resultant signal.

Accordingly, the frequency interpolator 108e interpolates the signal output from the second phase rotator 108d in the frequency domain and outputs the resultant signal.

The divider 108f then divides the signal delayed by the second delay unit 108a into a signal output from the frequency interpolator 108e, and divides the resulting signal into a demapper as shown in FIG. Will be printed as 9).

As described above, the timing correction apparatus and method of the digital broadcasting receiver according to the present invention have the following effects.

First, after setting the fast Fourier transform window timing in the initial acquisition mode, if the correction is required in the tracking mode, do so in the time domain. By tracking the discontinuity of the circuit through phase re-rotation at the rear end of the fast Fourier transform unit, it is possible to correct the window timing in a steady state by preventing an error generated during the interpolation process of the equalizer.

Second, in the fast Fourier transform window timing tracking, a simple shift of a sample unit may be performed without linkage with other blocks, thereby correcting a stable performance of a receiver in an environment with a large temporal change in a channel environment.

In addition, the timing correction apparatus and method of the digital broadcast receiver according to the present invention can be applied and applied to all OFDM transmission systems having similar standards.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.                     

Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

Claims (5)

In the timing correction device of a digital broadcast receiver having a frequency correction unit, Detecting a start point according to the signal output from the frequency corrector and delaying it for a predetermined time when a phase offset occurs in the detected start point, accumulating the phase offset according to whether the phase offset changes or not, and offsetting the phase. A timing synchronizer for outputting the timing synchronizer; A fast Fourier transform unit for performing a fast Fourier transform according to the start point output from the timing synchronizer and outputting a complex signal having a frequency domain value; Phase rotation of the signal output from the fast Fourier transform unit according to the signal output from the timing synchronizer to remove discontinuity of the phase, and then interpolate and phase re-rotate in the time domain. And an equalizer for dividing the phase rotation error into signals interpolated in the frequency domain. The method of claim 1, The timing synchronizer A timing detector for detecting a start point and a phase offset from the signal output from the frequency corrector; A first delay unit for delaying the detected phase offset by a predetermined time by a latency of a fast Fourier transform; And a phase accumulator for accumulating the phase offset delayed by the first delay unit and outputting a resultant signal. The method of claim 1, The equalizer part A second delay unit for delaying a signal output from the fast Fourier transform unit by a predetermined time; A first phase rotator for rotating the signal output from the fast Fourier transform unit according to the signal output from the timing synchronizer to remove discontinuity of the phase and outputting the resultant signal; A time interpolator for interpolating a signal output from the first phase rotator in a time domain; A second phase rotator configured to rotate the phase rotated signal from the first phase rotator according to the signal output from the timing synchronizer and output the phase rotated signal; A frequency interpolator for interpolating the signal output from the second phase rotator in a frequency domain; And a divider for dividing the signal delayed by the second delay unit into a signal output from the frequency interpolator and outputting a resultant signal. The method of claim 3, wherein The first and second phase rotators A phase enhancer for incrementing the phases of the signals output from the fast Fourier transform unit and the timing synchronizer with reference to first and second lookup tables, respectively; And a complex multiplier configured to complex-multiply the signal output from the fast Fourier transform unit and the timing synchronizer and the signal incremented by the phase enhancer and output the resultant signal, respectively. Device. Resetting the phase accumulator in the initial acquisition mode and performing the acquisition to apply the fast Fourier transform window start pulse to the fast Fourier transform unit and convert the phase accumulator to the tracking mode; Delaying a phase offset when it occurs in the tracking mode by the latency of the fast Fourier transform and accumulating the phase offset when the phase offset occurs; Phase rotating the signal output from the fast Fourier transform unit according to the accumulated signal to remove discontinuity of the phase and interpolating the time domain; Re-rotating the interpolated signal according to the accumulated signal and interpolating in the frequency domain; And dividing and outputting the signal output from the fast Fourier transform unit by the interpolated signal.

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