KR100577300B1 - Driving Method of LCD - Google Patents

Abstract

It is to provide a method of driving a liquid crystal display device which can improve the problem of deterioration of picture quality due to liquid crystal response speed and afterimage by inserting black data between frames by adjusting SOE (Source Output Enable) signal without additional components. The driving method of the liquid crystal display device is to maintain the source output enable (SOE) signal at a "high" level for more than 1H (1Horizontal) section, so that the screen between the frames and the black state is black. It characterized in that it comprises a step of outputting.

SOE, Black Data, Common Voltage, Timing Controller

Description

Driving method of liquid crystal display device {METHOD FOR DRIVING LIQUID CRYSTAL DISPLAY DEVICE}

1 is a circuit diagram of a general liquid crystal display device

2 is a diagram illustrating input / output signals of a timing controller of a general liquid crystal display device;

Figure 3a is a waveform diagram showing the output of the conventional SOE and source driver section

3B is an experimental data diagram illustrating output waveforms of a SOE and a source driver unit according to the related art.

4 is a diagram illustrating a conventional display screen.

5A is a waveform diagram showing the output of the SOE and source driver section of the present invention;

5B is an experimental data diagram illustrating output waveforms of an SOE and a source driver unit for deriving a black screen of a liquid crystal display according to an exemplary embodiment of the present invention.

6 illustrates a display screen according to the present invention.

Explanation of symbols on the main parts of the drawings

10 liquid crystal module 11 display panel

12: gate driver 13: source driver

14: auxiliary capacitor electrode 20: liquid crystal drive circuit

21: Receiver 22: Timing Controller

23: reference voltage generator 24: gate driving voltage generator

25: storage voltage generator 26: common voltage generator

30: interface circuit 31: multi-scan circuit

32: transmitter

The present invention relates to a liquid crystal display device, and more particularly, to drive a liquid crystal display device which can improve image quality problems due to liquid crystal response speed and afterimage by inserting black data between frames only by adjusting a source output enable (SOE) signal. It is about a method.

As the information society develops, the demand for display devices is gradually increasing in various forms, and in recent years, liquid crystal display devices (LCDs), plasma display panels (PDPs), electro luminescent displays (ELDs), and VFDs (Vacuum) Various flat panel display devices such as fluorescent display have been studied, and some are already used as display devices in various devices.

Among them, LCD is the most used as a substitute for CRT (Cathode Ray Tube) for mobile image display device because of the excellent image quality, light weight, thinness, and low power consumption. In addition to mobile type such as notebook computer monitor, BACKGROUND ART Various developments have been made in televisions and monitors of computers that receive and display room transmission calls.

Although various technical advances have been made in order for such a liquid crystal display device to serve as a screen display device in various fields, the task of improving the image quality as the screen display device is often arranged with the above characteristics and advantages.

Therefore, in order to use a liquid crystal display as a general screen display device in various parts, it is a matter of how high quality images such as high definition, high brightness and large area can be realized while maintaining the characteristics of light weight, thinness and low power consumption. have.

Hereinafter, a general liquid crystal display device will be described with reference to the accompanying drawings.

FIG. 1 is a block diagram for driving a general liquid crystal display, and FIG. 2 is a diagram illustrating input / output signals of a timing controller of a general liquid crystal display.

As shown in FIG. 1, a general liquid crystal display device converts a liquid crystal module 10, a liquid crystal driver circuit 20 for driving the liquid crystal module 10, and an analog input signal into a digital form and has a resolution. It consists of an interface circuit 30 for adjusting.

The liquid crystal module 10 includes a display panel 11, a gate driver 12, and a source driver 13 for driving the display panel 11.

The display panel 11 includes a pixel matrix in which liquid crystal cells are arranged in a matrix form between two glass substrates (not shown), and a plurality of gate lines and a plurality of data lines are vertically arranged on a lower substrate. They are provided to cross each other, and have a unit pixel structure in which the thin film transistor (TFT) and the pixel electrode are respectively provided.

The gate driver 12 divides and drives the ROW lines (gate lines) of the pixel matrix, and the source driver 13 stores an image on the column lines (data lines) of the pixel matrix. Supply the data.

In the above, the liquid crystal driving circuit 20 and the interface circuit 30 are each mounted on a separate board (or board) and electrically connected to each other by a flexible printed circuit (FPC) and a connector. Is connected.

The interface circuit 30 may display a horizontal sync signal Hsync and a vertical sync signal to display input resolution or data of various frequencies at a resolution of the display panel 11 (for example, XGA (1024 768)). A multi-scan circuit 31 for generating Vsync and a transmitter 32 for reducing electromagnetic interference by reducing image data supply lines.

The liquid crystal drive circuit 20 includes a receiver 21 and a gate driver for separating three primary color data of the main clock Clk and the red cyan colors R, G, and B from the image data supplied from the transmitter 32. 12 and a timing controller 22 for supplying a timing signal necessary for the source driver 13, a reference voltage generator 23 for generating a reference voltage for converting image data into analog data, and a gate driver 12. Is common to the gate driving voltage generator 24 for generating a driving voltage of the N s, the storage voltage generator 25 for supplying the storage voltage Vst to the auxiliary capacitor electrode 14, and the pixel electrode. The common voltage generator 26 is configured to supply a voltage Vcom.

In the liquid crystal display device configured as described above, the timing controller 22 according to the main clock CLKmain supplied from the receiver 21 and the horizontal and vertical synchronization signals Hsync and Vsync as shown in FIGS. 1 and 2. A start pulse, a scanning clock, and the like are supplied to the gate driver 12 and the source driver 13, and digital RGB data is supplied.

That is, the timing controller 22 includes vertical and horizontal synchronization signals (Vsync, Hsync) of the display, a DENB (Data Enable) signal indicating a section in which valid data exists, a clock (CLK) signal that is the basis of all synchronization signals, R, G, and B signals are input from an LCD driving system (eg, a computer).

By combining these signals, the GSP, GSC, and GOE signals used to control the gate driver 12 and the SSP, SSC, SOE, Pol, and existing data signals used to control the source driver 13 are divided by two. (even), generate R, G, B data signals of order pairs.

In the liquid crystal display device driven by receiving the control signal of the timing controller 22, the gate signal is sequentially applied to the gate line of the display panel 11 by the gate driver 12, so that all the thin film transistors connected to the gate line are turned on. When turned on, as illustrated in FIGS. 3A and 3B, data signals for image output are sequentially output to the source driver 13 based on the rising (or falling) edge of the SOE during each frame.

By the above operation, as shown in Fig. 4, an image corresponding to each data signal is displayed for each frame.

Unlike the CRT, the liquid crystal display having the above-described configuration causes a problem of deterioration in image quality such as a hold type driving and a slow response speed of the liquid crystal.

That is, when the current frame operation after the previous frame operation depends on the liquid crystal response speed when the signal data of the previous frame is changed to the signal data to the current frame, there is a predetermined delay time. As a result, an image blur occurs in a moving image, and it is difficult to manufacture a high resolution liquid crystal display device.

As described above, in order to improve the slow response speed of the liquid crystal and the afterimage problem, a method of inserting blank data or black data between frames is used.

However, in order to solve the above problem by inserting blank time or black data, it is usually necessary to modify additional parts or algorithms, and thus additional cost and time loss are caused.

The present invention has been made to solve the above problems, in particular, by inserting the black data between the frame only by adjusting the SOE (Source Output Enable) signal without additional components can improve the problem of deterioration of picture quality due to liquid crystal response speed and afterimage It is an object of the present invention to provide a method of driving a liquid crystal display device.

The driving method of the liquid crystal display device of the present invention for achieving the above object is to maintain the source output enable (SOE) signal at a "high" level for more than 1H (1Horizontal) period between the frame and the frame. And outputting a screen in a black state.

When the SOE signal is maintained at the "high" level for more than 1H period, the voltage of the common voltage (Vcom) level is output to the source driver based on the rising or falling edge of the SOE signal.

The liquid crystal display device is driven in a normally black mode.

The SOE signal is variable and output by a timing controller.

Referring to the accompanying drawings, a driving method of a liquid crystal display device according to an exemplary embodiment of the present invention will be described.

FIG. 5A is a waveform diagram illustrating the output of the SOE and the source driver unit of the present invention, and FIG. 5B is an experimental data diagram illustrating the output waveform of the SOE and source driver unit for deriving a black screen of the liquid crystal display according to the exemplary embodiment of the present invention. 6 is a diagram illustrating a display screen of the present invention.

The present invention is to solve the after-image problem by varying the SOE (Source Output Enable) signal for controlling the source driver output of the liquid crystal module by inserting black data between the frame and the frame.

The liquid crystal display device for applying the driving of the present invention has the same configuration as the liquid crystal display device shown in FIG.

That is, the liquid crystal module 10, a liquid crystal driving circuit 20 for driving the liquid crystal module 10, and an interface circuit 30 for converting an analog input signal into a digital form and adjusting the resolution It is.

The liquid crystal module 10 includes a display panel 11, a gate driver 12, and a source driver 13 for driving the display panel 11.

The display panel 11 includes a pixel matrix in which liquid crystal cells are arranged in a matrix form between two glass substrates (not shown), and a plurality of gate lines and a plurality of data lines are vertically arranged on a lower substrate. They are provided to cross each other, and have a unit pixel structure in which the thin film transistor (TFT) and the pixel electrode are respectively provided.

The gate driver 12 divides and drives the ROW lines (gate lines) of the pixel matrix, and the source driver 13 stores an image on the column lines (data lines) of the pixel matrix. Supply the data.

In the above, the liquid crystal driving circuit 20 and the interface circuit 30 are each mounted on a separate board (or board) and electrically connected to each other by a flexible printed circuit (FPC) and a connector. Is connected.

The interface circuit 30 may display a horizontal sync signal Hsync and a vertical sync signal to display input resolution or data of various frequencies at a resolution of the display panel 11 (for example, XGA (1024 768)). A multi-scan circuit 31 for generating Vsync and a transmitter 32 for reducing electromagnetic interference by reducing image data supply lines.

The liquid crystal drive circuit 20 includes a receiver 21 and a gate driver for separating three primary color data of the main clock Clk and the red cyan colors R, G, and B from the image data supplied from the transmitter 32. 12 and a timing controller 22 for supplying a timing signal necessary for the source driver 13, a reference voltage generator 23 for generating a reference voltage for converting image data into analog data, and a gate driver 12. Is common to the gate driving voltage generator 24 for generating a driving voltage of the N s, the storage voltage generator 25 for supplying the storage voltage Vst to the auxiliary capacitor electrode 14, and the pixel electrode. The common voltage generator 26 is configured to supply a voltage Vcom.

The timing controller 22 includes vertical and horizontal synchronization signals (Vsync, Hsync) of the display from an LCD driving system (eg, a computer), a DENB (Data Enable) signal indicating a section in which valid data exists, and all synchronization signals. Gate start pulse (GSP), gate shift clock (GSC), and GOE used to control the gate driver 12 by receiving the basic clock (CLK) signal and the R, G, and B signals. (Gate Output Enable) signal, Source Start Pulse (SSP), Source Sampling Clock (SSC), Source Output Enable (SOE), Polarity Reverse (POL), and existing data signals used to control the source driver 13 Generates R, G, and B data signals of an even and ordered pair divided by two.

The GSP (Gate Start Pulse) serves to inform the start line of the screen, that is, the first (1st) line, among the 1 vertical, and the GSC (Gate Shift Clock) is a thin film transistor configured in the display panel 11. Designate a time at which the gate of the (TFT) is turned on (ON), the GOE (Gate Output Enable) serves to control the output of the gate driver 12.

The source start pulse (SSP) informs the start point of the data, that is, the first (1st) pixel, in one horizontal, and the source sampling clock (SSC) latches the data based on the rising and falling edges. latch, the source output enable (SOE) controls the output of the source driver (13), and the polarity reverse (POL) drives the liquid crystal in positive or negative polarity. This signal indicates polarity.

In the liquid crystal display according to the present invention, when a gate signal is sequentially applied to the gate line of the display panel 11 by the gate driver 12, and all the thin film transistors connected to the gate line are turned on, FIGS. 5A and 5B. As shown in FIG. 2, data signals for image output are sequentially output to the source driver 13 based on the rising (or falling) edge of the SOE during each frame to display an image on the screen.

In the driving method of the liquid crystal display device according to the present invention operating by the above-described general method, the black data is inserted between desired frames by varying only the SOE signal (by any control means and any signal) without any additional configuration. This feature is applicable to models using Normally Black mode.

In more detail, the SOE signal has a frequency of 1H (1Horizontal) as shown in FIGS. 5A and 5B to output a normal source driver output. When the SOE signal is maintained at a high section for more than 1H, the output is output. It becomes a high impedance state, and the voltage of the common voltage (Vcom) level is output to the source driver. (FIG. 5B is an output data diagram showing such a result by experiment.)

As described above, when the voltage of the common voltage Vcom level is output to the source driver, the screen becomes a black state in the liquid crystal display device using the normally black mode.

That is, if the SOE signal is kept "high" for a period of 1H or more, the source driver outputs a DC of a common voltage level during that period, which makes the screen black.

As described above, when the SOE signal is changed to "high" by the timing controller for the interval to insert the black data , as illustrated in FIG. 6, the black data may be simply inserted between the frame and the frame.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the above embodiments, but should be defined by the claims.

The driving method of the liquid crystal display device of the present invention as described above has the following effects.

First, since black data can be inserted between desired frames only by changing the SOE signal, the black data insertion method can be simplified.

Second, by inserting black data between desired frames, it is possible to improve the image quality problem of the liquid crystal display due to the liquid crystal response speed and afterimages.

Claims (4)

Variable by the timing controller to maintain the source output enable (SOE) signal at the "high" level for more than 1H (1Horizontal) section, and outputs a black screen between the frame and the frame; A method of driving a liquid crystal display device, characterized in that. The method of claim 1, When the SOE signal is maintained at the "high" level for more than 1H period, the voltage of the common voltage (Vcom) level is output to the source driver based on the rising or falling edge of the SOE signal. Way. The method of claim 1, And the liquid crystal display device is driven in a normally black mode. delete

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