KR100538331B1 - Electro luminescence display device - Google Patents

Abstract

The present invention relates to an electro-luminescence display device capable of maximizing the area of an image display portion formed on a substrate of constant size.

An electroluminescent display device according to an embodiment of the present invention includes an electroluminescence display having a substrate, pixels arranged in regions defined by intersections of gate lines and data lines formed on the substrate, and the electroluminescent display. A gate driver formed on the substrate adjacent to either the upper side or the lower side of the luminescence display unit to drive the gate lines, and adjacent to any one of the upper side and the lower side of the electro luminescence display unit opposite to the gate driver. And a data driver formed on the substrate to drive the data lines.

The present invention can increase the area of the electro-luminescence display by forming the gate driver above or below the electro-luminescence display. In addition, the present invention can increase the number of electro-luminescence panels formed on a large substrate by forming the gate driver above or below the electro-luminescence display.

Description

Electro luminescence display device {ELECTRO LUMINESCENCE DISPLAY DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electro-luminescence display device, and more particularly to an electro-luminescence display device capable of maximizing the area of an image display portion formed on a substrate of a constant size.

Various flat panel display devices that can reduce weight and volume, which are disadvantages of cathode ray tubes, are emerging. Such flat panel displays include a liquid crystal display, a field emission display, a plasma display panel, and an electro-luminescence (hereinafter, referred to as "EL"). Display device).

Among them, an EL display device is a self-luminous element that emits a phosphor by recombination of electrons and holes, and is classified roughly into an inorganic EL using an inorganic compound and an organic EL using an organic compound as the phosphor. Such EL display devices have many advantages such as low voltage driving, self-luminous, thin film type, wide viewing angle, fast response speed, and high contrast, and are expected to be the next generation display devices.

The organic EL element is usually composed of an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and a hole injection layer stacked between a cathode and an anode. In such an organic EL device, when a predetermined voltage is applied between the anode and the cathode, electrons generated from the cathode move to the light emitting layer through the electron injection layer and the electron transport layer, and holes generated from the anode pass through the hole injection layer and the hole transport layer. Move toward the light emitting layer. Accordingly, the light emitting layer emits light by recombination of electrons and holes supplied from the electron transporting layer and the hole transporting layer.

Referring to FIG. 1, in the conventional EL display device, a plurality of EL panels 100 having a predetermined size are formed on a large substrate 2, and each of the plurality of EL panels 100 is independent by a scribing process. Separated to complete.

Each of the plurality of EL panels 100 formed on the large substrate 2 includes pixels 28 arranged in regions defined by intersections of the gate line GL and the data line DL, as shown in FIG. 2. An EL display unit 12, a gate driver 22 for driving the gate lines GL of the EL display unit 12, and a data driver 24 for driving the data lines DL of the EL display unit 12; ).

The gate driver 22 is connected to each of the gate lines GL at a distance from one side of the EL display portion 12. The gate driver 22 sequentially drives the gate lines GL by supplying a gate pulse to the gate lines GL. In this case, the gate driver 22 is formed to have a predetermined width 54 due to circuit elements for driving the gate lines GL.

The data driver 24 is connected to each of the data lines DL with a predetermined distance below the EL display portion 12. The data driver 24 converts the digital data signal input from the outside into an analog data signal using a gamma voltage. The data driver 24 supplies the analog data signal to the data lines DL every time the gate pulse is supplied.

Each of the pixels 28 receives a data signal from the data line DL when the gate pulse is supplied to the gate line GL, and generates light corresponding to the data signal.

Further, each of the plurality of EL panels 100 formed on the large sized substrate 2 has a packaging plate (not shown) which is bonded to the large sized substrate 2 to protect the EL display portion 12 with oxygen and moisture. Each of the plurality of EL panels 100 has a predetermined width 58 around the gate driver 22, the data driver 24, and the EL display unit 12 to bond the packaging plate and the large substrate 2 to each other. Sealing agent 30 is applied.

On the other hand, each of the plurality of EL panels 100 formed on the large substrate 2 has a first gap 52 and a gate between the gate driver 22 and the EL display portion 12 in order to secure process margins in the manufacturing process. The second gap 56 between the driver 22 and the sealing agent 30, and the third gap 60 between the scribing line and the sealing agent 30 for separating each of the plurality of EL panels 100. Will have Further, each of the plurality of EL panels 100 is formed between the EL display portion 12 and the sealing agent 30 (gate driver 22) such that the EL display portion 12 of the completed EL display device is located at the center of the substrate 10. A dummy space 62 is further provided on the right side of the EL display portion 12 and the sealing agent 30 in which no ridge is formed. The width of the dummy space 62 corresponds to the width 54 of the gate driver 22 and the first and second gaps 52 and 56.

Therefore, in the conventional EL display device, a plurality of EL panels 100 are formed in a predetermined size according to the resolution of the EL display unit 12 on the large substrate 2, so that the left area and the dummy space around the EL display unit 12 are formed. As a result, there is a limit to increasing the area of the EL display unit 12. In addition, the conventional EL display device must reduce the number of EL panels 100 formed on the large substrate 2 when the area of the EL display portions 12 of the plurality of EL panels 100 is increased.

Accordingly, an object of the present invention is to provide an electro-luminescence display device capable of maximizing the area of an image display portion formed on a substrate of a constant size.

Another object of the present invention is to provide an electroluminescent display device capable of increasing the number of electroluminescent panels formed on a large substrate.

In order to achieve the above object, an electroluminescent display device according to an exemplary embodiment of the present invention has an electroluminescence display having a substrate, and pixels arranged at respective regions defined by intersections of gate lines and data lines formed on the substrate. A gate driver formed on a substrate adjacent to one of a top side and a bottom side of the electro luminescence display unit and driving the gate lines, and an upper side of the electro luminescence display unit opposite to the gate driver; And a data driver formed on the substrate adjacent to any one of the lower sides to drive the data lines.

The electro-luminescence display device may further include a sealing agent applied to the outside of the gate driver, the electro luminescence display unit, and the data driver.

In the electro-luminescence display, the gate driver includes first output terminals provided at one side of the gate line to supply gate pulses to first to n / 2th gate lines among the gate lines, and the gate line. And second output terminals provided on one side opposite to supply gate pulses to the n / 2 + 1 to nth gate lines.

A first region formed in a left region of the electroluminescent display in the electroluminescent display to connect each of the first output terminals to first to n / 2th gate lines of the gate lines; A first gate signal wiring group and a right side region of the electro luminescence display to connect each of the second output terminals to the n / 2 + 1 to nth gate lines of the gate lines; And a two gate signal wiring group.

In the electro-luminescence display device, a part of the sealing agent overlaps with the first and second gate signal wiring groups.

In the electro-luminescence display, the gate driver includes first output terminals provided at one side of the gate lines to supply gate pulses to odd-numbered gate lines of the gate lines, and even-numbered gates of the gate lines. And second output terminals provided on one side opposite to supply gate pulses to the lines.

A first gate signal wiring group formed in a left region of the electro luminescence display in the electro-luminescence display to connect each of the first output terminals to an odd-numbered gate line among the gate lines; And a second gate signal wiring group formed in a right region of the electro luminescence display to connect each of the second output terminals to even-numbered gate lines of the gate lines.

In the electro-luminescence display device, a part of the sealing agent overlaps with the first and second gate signal wiring groups.

Other objects and features of the present invention in addition to the above object will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 3 to 6.

Referring to FIG. 3, an electro-luminescence (EL) display device according to a first embodiment of the present invention includes a plurality of EL panels having a predetermined size on a large substrate (not shown). 110 is formed, and each of the plurality of EL panels 110 is independently separated and completed by a scribing process.

Each of the EL panel 110 according to the first embodiment of the present invention includes an EL display unit 112 including pixels 128 arranged in regions defined by intersections of the gate line GL and the data line DL. And a gate driver 122 which is formed adjacent to the upper side of the EL display unit 112 to drive the gate lines GL of the EL display unit 112, and is formed adjacent to the lower side of the EL display unit 112 so that the EL display unit ( And a data driver 124 for driving the data lines DL of 112.

The gate driver 122 is formed at a predetermined distance from an upper side of the EL display portion 112 and is connected to each of the gate lines GL, and has a predetermined width due to circuit elements for driving the gate lines GL. It is formed to.

The gate driver 122 supplies gate pulses to the gate lines GL to sequentially drive the gate lines SL. Specifically, the gate driver 122 may include first gate pulse output terminals 154 for supplying a gate pulse to the first through n / 2th gate lines GL1 through GLn / 2, and the n / 2th. Second gate pulse output terminals 152 for supplying a gate pulse to the +1 th to n th gate lines GLn / 2 + 1 to GLn are provided.

The first gate pulse output terminals 154 are provided on one side of the gate driver 122, and the second gate pulse output terminals 152 are provided on the other side opposite to the one side of the gate driver 122. . Accordingly, a plurality of gate signal wiring groups for connecting the first gate pulse output terminals 154 and the first to n / 2th gate lines GL1 to GLn / 2 are disposed on the left side of the EL display unit 112. A plurality of gate signal wiring groups formed on the surface and for connecting the second gate pulse output terminals 152 and the n / 2 + 1 to nth gate lines GLn / 2 + 1 to GLn are EL. It is formed on the right side of the display portion 112.

The data driver 124 is connected to each of the data lines DL with a predetermined distance below the EL display portion 112. The data driver 124 converts an external digital data signal into an analog data signal using a gamma voltage. The data driver 124 supplies the analog data signal to the data lines DL whenever the gate pulse is supplied.

Each of the pixels 128 is selected when a gate signal is applied to the gate line GL, which is a cathode, to generate light corresponding to a pixel signal, that is, a current signal, supplied to the data line DL, which is an anode.

Specifically, each of the pixels 128 is equivalently represented by a diode connected between the data line DL and the gate line GL. Each of the pixels 128 is driven when the gate signals are enabled in the gate line GL to generate light corresponding to the magnitude of the data signal on the data line DL.

To this end, each of the pixels 128 includes a voltage supply line VDD, a light emitting cell OEL connected between a supply voltage line VDD and a base voltage source GND, and a data line, as shown in FIG. 4. A light emitting cell driving circuit 135 for driving the light emitting cell OEL according to a driving signal supplied from each of the DL and the gate line GL is provided.

The light emitting cell OEL includes an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and a hole injection layer stacked between a cathode and an anode (not shown). In the light emitting cell OEL, when a voltage is applied between the anode, which is a transparent electrode, and the cathode, which is a metal electrode, electrons generated from the cathode move toward the emission layer through the electron injection layer and the electron transport layer, and holes generated from the anode are holed. It moves toward the light emitting layer through the injection layer and the hole transport layer. Accordingly, in the light emitting layer, light is generated by collision and recombination of electrons and holes supplied from the electron transporting layer and the hole transporting layer, and the light is emitted to the outside through the anode, which is a transparent electrode, to display an image.

The light emitting cell driving circuit 135 includes a switching thin film transistor (TFT) T1 connected between the gate line GL and the data line DL, and the switching TFT T1. And a driving TFT (T2) connected between the light emitting cell (OEL) and the first node (n1) and the voltage supply line (VDD) connected between the switching TFT (T1) and the driving TFT (T2). A capacitor Cst connected between the source terminals of the TFT T2 is provided.

The gate terminal of the switching TFT T1 is connected to the gate line GL, the source terminal is connected to the data line DL, and the drain terminal is connected to the driving TFT T2 via the first node n1. It is connected to the gate terminal. The switching TFT T1 is turned on when the gate pulse is supplied to the gate line GL, and supplies the data signal supplied to the data line DL to the first node n1. The data signal supplied to the first node n1 is charged to the capacitor Cst and supplied to the gate terminal of the driving TFT T2.

The gate terminal of the driving TFT T2 is connected to the drain terminal of the switching TFT T1 via the first node n1, and the drain terminal is connected to the light emitting cell OEL. The driving TFT T2 controls the amount of light emitted from the light emitting cell OEL by controlling the amount of current supplied from the voltage supply line VDD to the light emitting cell OEL in response to the data signal supplied to the gate terminal. Since the data signal is discharged from the capacitor Cst even when the switching TFT T1 is turned off, the driving TFT T2 receives the current from the voltage supply line VDD until the data signal of the next frame is supplied. The light emitting cell OEL maintains light emission by being supplied to the light emitting cell OEL.

Meanwhile, each of the pixels 28 may be configured as the light emitting cell driving circuit 235 including four TFTs DT, MT, ST1, and ST2 as shown in FIG. 5.

Specifically, the light emitting cell driving circuit 235 includes a driving TFT DT connected between the voltage supply line VDD and the light emitting cell OEL, and a first connection connected to the gate line GL and the data line DL. The first node between the switching TFT ST1, the second switching TFT ST2 connected to the first switching TFT ST1 and the gate line GL, and the first and second switching TFTs ST1 and ST2 ( a conversion TFT (MT) connected between n1) and the voltage supply line (VDD) and forming a driving TFT (DT) and a current mirror circuit to convert current into a voltage, and a driving TFT (DT) and a conversion TFT. (MT) A capacitor Cst is connected between the second node n2 between each gate terminal and the voltage supply line VDD. Here, the TFT is a P-type electron metal oxide semiconductor field effect transistor (MOSFET, Metal-Oxide Semiconductor Field Effect Transistor).

The gate terminal of the driving TFT DT is connected to the gate terminal of the conversion TFT MT, the source terminal is connected to the voltage supply line VDD, and the drain terminal is connected to the light emitting cell OEL.

The source terminal of the conversion TFT MT is connected to the voltage supply line VDD, and the drain terminal is connected to the drain terminal of the first switching TFT ST1 and the source terminal of the second switching TFT ST2. The source terminal of the first switching TFT ST1 is connected to the data line DL and the drain terminal is connected to the source terminal of the second switching TFT ST2. The drain terminal of the second switching TFT ST2 is connected to the gate terminal and the capacitor Cst of each of the driving TFT DT and the conversion TFT MT. Gate terminals of each of the first and second switching TFTs ST1 and ST2 are connected to the gate line GL. On the other hand, since the conversion TFT MT and the driving TFT DT are formed adjacent to form a current mirror circuit, when the conversion TFT MT and the driving TFT DT are formed to have the same size, The amount of current flowing through the conversion TFT MT and the driving TFT DT becomes equal.

The driving of the light emitting cell driving circuit 235 will be described below. First, when the gate pulse of the ON state is supplied to the gate line GL, the first and second switching TFTs ST1 and ST2 are turned on. The first and second switching TFTs ST1 and ST2 are turned on to thereby drive the driving TFT DT by a data signal supplied from the data line DL via the first and second switching TFTs ST1 and ST2. Each of the conversion TFTs MT is turned on. Accordingly, the driving TFT DT adjusts the current between its source terminal and the drain terminal supplied from the voltage supply line VDD according to the data signal supplied to its gate terminal and supplies the light to the light emitting cell OEL. The cell OEL emits light at a brightness corresponding to the data signal.

On the other hand, when the gate pulse in the OFF state is supplied to the gate line GL, the first and second switching TFTs ST1 and ST2 are turned off. As the first and second switching TFTs ST1 and ST2 are turned off, the capacitor Cst drives the driving TFT DT using the stored voltage. Accordingly, the driving TFT DT supplies the current from the voltage supply line VDD to the light emitting cell OEL until the data signal of the next frame is supplied so that the light emitting cell OEL maintains light emission.

In addition, a sealing agent 130 is disposed outside the gate driver 122, the data driver 124, and the EL display unit 112 in order to bond two substrates to each of the EL panel 110 according to the first embodiment of the present invention. It is applied to a predetermined thickness. The sealing agent 130 is applied between the two substrates so as to overlap with a part of the gate signal wiring group formed on the left and right sides of the EL display portion 112.

In the EL display device according to the first embodiment of the present invention, the gate driver 122 formed on the substrate is formed on the upper side of the EL display portion 112, and the n gate lines GL are divided into two. Will be driven. Further, in the EL display device according to the first embodiment of the present invention, gate signal wiring groups for connecting the gate driver 122 and the n gate lines GL are formed in the left and right regions of the EL display 112. FIG. do.

Therefore, in the EL display device according to the first embodiment of the present invention, the area of the EL display portion 112 can be increased by forming the gate driver 122 that occupies much space on the upper side of the EL display portion 112. As a result, the EL display device according to the first embodiment of the present invention can increase the area of the EL display portion 112 by utilizing the gate driver formation space and the dummy space in the conventional EL display device.

On the other hand, the EL display device according to the first embodiment of the present invention can increase the size of the plurality of EL panels 110 formed on the large substrate by the space enough to form the gate driver 122. At this time, in the case of forming a plurality of EL panels 110 having a constant resolution on a large substrate, the upper and lower sizes of each of the plurality of EL panels 110 are not greatly limited, while the width is largely limited. do. Accordingly, the EL display device according to the first embodiment of the present invention can reduce the left and right regions of the EL display portion 112 than before by forming the gate driver 122 that occupies a lot of space above the EL display portion 112. Will be. Therefore, in the EL display device according to the first embodiment of the present invention, the number of EL panels 110 formed on a large substrate is formed when a plurality of EL panels 110 which are the same as the area of the conventional EL display portion 112 are formed. Can be increased.

Referring to FIG. 6, each of the EL panels 210 of the EL display device according to the second embodiment of the present invention includes pixels arranged in regions defined by intersections of the gate line GL and the data line DL. A gate driver 222 formed adjacent to the EL display portion 212, an upper portion of the EL display portion 212 to drive the gate lines GL of the EL display portion 212, and adjacent to a lower side of the EL display portion 212. And a data driver 224 for driving the data lines DL of the EL display unit 212.

The other components except for the gate driver 222 of the respective elements of the EL panel 210 of the EL display device according to the second embodiment of the present invention are shown in FIG. 3 according to the first embodiment of the present invention. Since they are the same as the EL display device, the description thereof will be replaced by the EL display device according to the first embodiment of the present invention.

The gate driver 222 of each of the EL panels 210 of the EL display device according to the second embodiment of the present invention is formed at a predetermined distance from an upper side of the EL display portion 212 and connected to each of the gate lines GL. It is formed to have a predetermined width due to circuit elements for driving the gate lines GL.

The gate driver 222 sequentially drives the gate lines SL by supplying a gate pulse to the gate lines GL. In detail, the gate driver 222 may include first gate pulse output terminals 254 for supplying a gate pulse to the odd-numbered gate lines GL1 and GL3 to GLn−1 among the gate lines GL. Second gate pulse output terminals 252 are provided to supply gate pulses to the first gate lines G2 and GL4 to GLn.

The first gate pulse output terminals 254 are provided on one side of the gate driver 222, and the second gate pulse output terminals 252 are provided on the other side opposite to one side of the gate driver 222. . Accordingly, a plurality of gate signal wiring groups for connecting the first gate pulse output terminals 254 and the odd gate lines GL1 and GL3 to GLn-1 are formed on the left side of the EL display portion 212. A plurality of gate signal wiring groups for connecting the second gate pulse output terminals 252 and the even-numbered gate lines G2 and GL4 to GLn are formed on the right side of the EL display portion 212.

Therefore, the EL display device according to the second embodiment of the present invention can increase the area of the EL display portion 212 by forming the gate driver 222 occupying a large space on the upper side of the EL display portion 212. As a result, the EL display device according to the second embodiment of the present invention can increase the area of the EL display portion 212 by utilizing the gate driver formation space and the dummy space in the conventional EL display device.

On the other hand, the EL display device according to the second embodiment of the present invention can increase the size of the top and bottom of the plurality of EL panel 210 formed on the large substrate by a space enough to form the gate driver 222. At this time, in the case of forming a plurality of EL panels 210 having a constant resolution on a large substrate, the upper and lower sizes of each of the plurality of EL panels 210 are not greatly limited, while the width is largely limited. do. Accordingly, the EL display device according to the second embodiment of the present invention can reduce the left and right regions of the EL display portion 212 by forming the gate driver 222 occupying a large space on the upper side of the EL display portion 212. Will be. Therefore, in the EL display device according to the second embodiment of the present invention, when a plurality of EL panels 210 having the same area as the conventional EL display portion 212 are formed, the number of EL panels 210 formed on a large substrate is increased. Can be increased.

On the other hand, the EL display device according to another embodiment of the present invention can be formed by changing the positions of the gate driver and the data driver. That is, the EL display device according to another embodiment of the present invention includes a gate driver formed below the EL display portion, and a data driver formed above the EL display portion. Accordingly, the EL display device according to another embodiment of the present invention can increase the area of the EL display portion as described above, and can increase the number of EL panels formed on the large substrate.

As described above, the electro-luminescence display device according to the embodiment of the present invention can increase the area of the electro-luminescence display by forming a gate driver above or below the electro-luminescence display.

In addition, the electro-luminescence display device according to the embodiment of the present invention increases the number of electro-luminescence panels formed on a large substrate by forming a gate driver above or below the electro-luminescence display. Can be.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a plan view showing a plurality of electro luminescence panels formed on a large substrate.

FIG. 2 is a plan view showing the electro luminescence panel shown in FIG. 1. FIG.

3 is a plan view illustrating an electro luminescence display device according to a first embodiment of the present invention.

FIG. 4 is an equivalent circuit diagram of pixels composed of two thin film transistors shown in FIG. 3. FIG.

FIG. 5 is an equivalent circuit diagram of pixels of four thin film transistors shown in FIG. 3. FIG.

6 is a plan view illustrating an electro luminescence display device according to a second exemplary embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

2: large substrate 10, 110, 210: EL panel

12, 112: EL display section 22, 122, 222: gate driver

24, 124, 224: data driver 28, 128: pixels

30, 130, 230: sealing agent 62: dummy space

135, 235: light emitting cell driving circuit

152 and 252: second gate pulse output terminal

154 and 254: first gate pulse output terminal

Claims (8)

Substrate, An electro luminescence display having pixels arranged at respective regions defined by intersections of gate lines and data lines formed on the substrate; A gate driver formed on the substrate adjacent to any one of an upper side and a lower side of the electro luminescence display unit to drive the gate lines; And a data driver formed on the substrate adjacent to either one of an upper side and a lower side of the electro luminescence display opposite to the gate driver to drive the data lines. The method of claim 1, And a sealing agent applied to the outside of the gate driver, the electro luminescence display unit, and the data driver. The method of claim 2, The gate driver, First output terminals provided on one side of the gate lines to supply gate pulses to first to n / 2th gate lines of the gate lines; And second output terminals provided on opposite sides of the gate lines to supply gate pulses to the n / 2 + 1 to nth gate lines among the gate lines. The method of claim 3, wherein A first gate signal wiring group formed in a left region of the electro luminescence display to connect each of the first output terminals to first to n / 2th gate lines of the gate lines; A second gate signal line group formed in a right region of the electro luminescence display to connect each of the second output terminals to an n / 2 + 1 to n-th gate line among the gate lines; An electro luminescence display device, characterized in that. The method of claim 4, wherein And a portion of the sealing agent overlaps the first and second gate signal wiring groups. The method of claim 2, The gate driver, First output terminals provided at one side of the gate lines to supply gate pulses to odd-numbered gate lines; And second output terminals provided at opposite sides of the gate lines to supply gate pulses to even-numbered gate lines of the gate lines. The method of claim 6, A first gate signal wiring group formed in a left region of the electro luminescence display to connect each of the first output terminals to an odd gate line of the gate lines; And a second gate signal wiring group formed in a right region of the electro luminescence display unit for connecting each of the second output terminals to the even-numbered gate lines of the gate lines. Sense Display. The method of claim 7, wherein And a portion of the sealing agent overlaps the first and second gate signal wiring groups.