KR100533373B1 - Capacitor Formation Method of Semiconductor Device - Google Patents
Capacitor Formation Method of Semiconductor Device Download PDFInfo
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- KR100533373B1 KR100533373B1 KR1019980041708A KR19980041708A KR100533373B1 KR 100533373 B1 KR100533373 B1 KR 100533373B1 KR 1019980041708 A KR1019980041708 A KR 1019980041708A KR 19980041708 A KR19980041708 A KR 19980041708A KR 100533373 B1 KR100533373 B1 KR 100533373B1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
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- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02183—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing tantalum, e.g. Ta2O5
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- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- H10D1/60—Capacitors
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- H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
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Abstract
본 발명은 유전율이 높아 정전용량을 증대시키고 고순도로서 누설전류와 절연파괴전압 특성이 개선된 캐퍼시터 형성방법에 관한 것이다. 본 발명에 따르는 캐퍼시터 형성방법은 반도체 기판위에 하부전극과 질화막을 형성하는 단계; Ta 원료물질을 반응챔버내로 단락적으로(pulsing) 인입하여 Ta2O5 박막을 증착하는 단계; Ta2O5 박막을 후속 열처리하는 단계; 및 상부전극 형성단계를 포함하는 것을 특징으로 한다. 그 결과 캐퍼시터의 누설전류을 최소한 줄일 수 있을 뿐만 아니라 전기적 특성이 우수해 짐으로써 더욱 고집적화된 DRAM 의 개발이 용이해지고, 높은 충전용량으로 인해 리프레쉬(refresh) 특성이 우수하고 신뢰성이 우수한 반도체 장치를 개발할 수 있다.The present invention relates to a method of forming a capacitor having high dielectric constant, increasing capacitance, and improving leakage current and breakdown voltage characteristics with high purity. A method of forming a capacitor according to the present invention includes the steps of forming a lower electrode and a nitride film on a semiconductor substrate; Depositing a Ta 2 O 5 thin film by introducing Ta raw material into the reaction chamber in a pulsing manner; Subsequent heat treatment of the Ta 2 O 5 thin film; And an upper electrode forming step. As a result, the leakage current of the capacitor can be reduced at least, and the electrical characteristics can be improved to facilitate the development of more integrated DRAMs, and the high charge capacity enables the development of semiconductor devices with excellent refresh characteristics and high reliability. have.
Description
본 발명은 반도체장치의 캐퍼시터 형성방법에 관한 것으로, 특히 유전율이 높아 정전용량을 증대시키고 고순도로서 누설전류와 절연파괴전압 특성이 개선된 캐퍼시터 형성방법에 관한 것이다. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a capacitor in a semiconductor device, and more particularly, to a method of forming a capacitor having high dielectric constant, increased capacitance, and improved leakage current and dielectric breakdown voltage characteristics with high purity.
DRAM의 집적도가 64M에서 256M로 증가함에 따라, 셀의 크기의 감소는 더욱 가속화되고 있고, 이로 인하여 캐퍼시터의 면적감소는 필연적 요소가 되고 있다. 따라서, 한정된 면적에 큰 정전용량을 가지는 캐퍼시터를 실현시키기 위하여 유전율이 큰 캐퍼시터 유전체를 사용하려는 연구가 계속되어 왔으며, 이러한 노력의 결과로 종래에 사용되어 오던 Si3N4 보다 유전율이 높은 탄탈륨옥사이드(Ta2O5) 박막이 캐퍼시터의 유전막으로 사용되기에 이르렀다.As the density of DRAM increases from 64M to 256M, the reduction in cell size is further accelerated, which inevitably reduces the area of the capacitor. Therefore, studies have been made to use a capacitor dielectric with a high dielectric constant to realize a capacitor having a large capacitance in a limited area, and as a result of this effort, a tantalum oxide having a higher dielectric constant than Si 3 N 4 has been used. Ta 2 O 5 ) thin film has been used as the dielectric film of the capacitor.
그러나, 차세대 DRAM 의 유전체로서 각광받고 있는 Ta2O5 박막의 경우 Ta 의 원료물질로 사용하는 Ta(OC2H5)5, TaCl5 등의 금소유기화합물(metal-organic) 원료에 탄소(C) 등의 불순물이 함유되어 있어, 박막내의 탄소 등의 불순물과 Ta 과 산소(O2)와의 미반응으로 인해 산소 소공이 생성된다. 그리하여, 탄소계 미반응물이 박막내에 트랩사이트(trap site)로 작용하고, 산소결핍시 생성되는 산소공공(oxygen vacancy)이 전자를 내놓게 되어 누설전류의 발생, 절연파괴전압등 박막의 전기적 특성의 열화를 초래한다.However, in the case of Ta 2 O 5 thin film, which is in the spotlight as the next-generation DRAM dielectric, carbon (C) is used for metal-organic raw materials such as Ta (OC 2 H 5 ) 5 and TaCl 5 , which are used as raw materials for Ta. Impurity such as), and oxygen pores are generated due to the unreacted reaction between Ta and oxygen (O 2 ) and impurities such as carbon in the thin film. Thus, the carbon-based unreacted substance acts as a trap site in the thin film, and oxygen vacancies generated during oxygen deficiency release electrons, causing leakage current, deterioration of electrical characteristics of the thin film such as insulation breakdown voltage. Results in.
종래에는 이러한 열화를 방지하기위해, 탄소계 불순물을 제거하고 산소공공을 감소시키기 위한 방안으로 Ta2O5 증착후 열처리를 1회 내지 2회 행하였다. 그러나, 이 방법은 Ta2O5 와 하부전극과의 계면에 저유전율의 산화층을 생성시켜 충전용량(capacitance)를 떨어뜨릴 뿐만 아니라 추가장비를 도입해야하고 공정 단계가 많아 캐퍼시터의 공정시간이 길어지고 결함(defect)이 생길 가능성도 매우 높은 문제가 있다.Conventionally, in order to prevent such deterioration, heat treatment was performed once or twice after Ta 2 O 5 deposition to remove carbonaceous impurities and reduce oxygen vacancies. However, this method creates a low dielectric constant oxide layer at the interface between Ta 2 O 5 and the lower electrode, which not only reduces the capacitance, but also requires the introduction of additional equipment. There is a very high problem that a defect is likely to occur.
따라서, 본 발명이 이루고자 하는 기술적 과제는 Ta2O5 증착시 Ta2O5 박막의 탄소계 불순물을 제거하고 산소공공을 감소시키는 공정을 수행함으로써 유전율이 높아 정전용량이 증가되고, 전기적 특성이 개선된 캐퍼시터 형성방법을 제공하는 데에 있다.Therefore, the technical problem to be achieved by the present invention is to remove the carbon-based impurities of the Ta 2 O 5 thin film and reduce the oxygen vacancies during Ta 2 O 5 deposition to increase the capacitance, increase the capacitance, and improve electrical characteristics It is to provide a method of forming a capacitor.
상기 기술적 과제를 달성하기 위한 본 발명에 따르는 캐퍼시터 형성방법은 반도체 기판위에 하부전극과 질화막을 형성하는 단계; Ta 원료물질을 반응챔버내로 단락적으로(pulsing) 인입하여 Ta2O5 박막을 증착하는 단계; Ta2O5 박막을 후속 열처리하는 단계; 및 상부전극 형성단계를 포함하는 것을 특징으로 한다.According to another aspect of the present invention, a capacitor forming method includes: forming a lower electrode and a nitride film on a semiconductor substrate; Depositing a Ta 2 O 5 thin film by introducing Ta raw material into the reaction chamber in a pulsing manner; Subsequent heat treatment of the Ta 2 O 5 thin film; And an upper electrode forming step.
본 발명의 캐퍼시터 형성방법에서는 Ta2O5 박막 증착시 반응 챔버내로 Ta 원료를 단락적으로 도입함으로써(도 1) Ta 원료물질의 인입이 이루어지지 않는 단락시간(tP)에는 탄소계 불순물이 산소와 반응하여 일산화탄소(CO), 이산화탄소(CO2) 등의 가스로 탈착하기 때문에, 증착된 Ta2O5 박막 내의 탄소 불순물의 함유량을 현격하게 감소시킬 수 있으며, Ta 과 O2 의 반응 시간이 충분하여 산소공공의 생성이 억제된다. 따라서, 고순도의 치밀한 Ta2O5 박막을 얻을 수 있다. 또한, 낮은 증착속도(deposition rate)로 Ta2O5 박막의 단차 도포성(step coverage)이 우수해져 누설전류 및 절연파괴전압 등의 전기적 특성이 현저하게 향상된다.In the capacitor-forming method of the present invention, Ta 2 O 5 by introducing the Ta source to the short circuit enemy into during a film deposition reaction chamber (FIG. 1) short-time (t P) unless the incoming of the Ta source material made, the carbon-based impurity oxygen And desorption with a gas such as carbon monoxide (CO), carbon dioxide (CO 2 ), so that the content of carbon impurities in the deposited Ta 2 O 5 thin film can be significantly reduced, and the reaction time between Ta and O 2 is sufficient. As a result, the generation of oxygen vacancies is suppressed. Therefore, a high-purity, dense Ta 2 O 5 thin film can be obtained. In addition, the step coverage of the Ta 2 O 5 thin film is excellent at a low deposition rate, thereby significantly improving electrical characteristics such as leakage current and dielectric breakdown voltage.
본 발명의 캐퍼시터 형성방법에서는 Ta2O5 박막 증착시 반응 챔버내로 Ta 원료를 단락적으로 인입하는 단락 시간(tp)은 0.1~30 초로 하여 탄소계 불순물이 산소와 충분히 반응할 수 있도록 하는 것이 바람직하다. 또한, Ta 인입 시간은 Ta 과 산소가 충분히 반응할 수 있도록 하는 것이 바람직하다.In the method for forming a capacitor of the present invention, the short-circuit time (t p ) for introducing Ta raw material into the reaction chamber in a short time during deposition of a Ta 2 O 5 thin film is 0.1 to 30 seconds to allow the carbon-based impurities to sufficiently react with oxygen. desirable. In addition, the Ta induction time is preferably such that Ta and oxygen can sufficiently react.
본 발명의 캐퍼시터 형성방법에서 Ta2O5 박막 증착방법은 CVD (Chemical Vapor Deposition), LPCVD(Low Pressure CVD) 방법이나 PECVD 법 등으로 하는 것이 바람직하며, Ta2O5 박막 증착은 300~700℃의 온도로 0.01~10 Torr 의 압력에서 실시하는 것이 바람직하다.In the method for forming a capacitor of the present invention, the Ta 2 O 5 thin film deposition method is preferably CVD (Chemical Vapor Deposition), LPCVD (Low Pressure CVD) method or PECVD method, Ta 2 O 5 thin film deposition is 300 ~ 700 ℃ It is preferable to carry out at a pressure of 0.01 to 10 Torr.
이하 본 발명의 바람직한 실시예를 첨부된 도면을 참조하여 설명한다. Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.
도 1은 본 발명의 캐퍼시터 형성방법에서 Ta2O5 박막 증착시 Ta 원료를 단락적으로 유입하는 단락 시간(tp)을 산소원료의 계속적인 유입시간과 비교하여 표시한 도면이다.FIG. 1 is a view showing a short circuit time (t p ) of injecting Ta material in a short circuit during deposition of a Ta 2 O 5 thin film in comparison with a continuous inflow time of an oxygen source in the method of forming a capacitor of the present invention.
도 2 는 본 발명의 실시예에 따른 캐퍼시터 형성방법을 설명하기 위한 Ta2O5 박막 캐퍼시터 구조도이다.2 is a structure diagram of Ta 2 O 5 thin film capacitor for explaining a method of forming a capacitor according to an embodiment of the present invention.
먼저, 종래의 방법에 따라 불순물이 도핑된 폴리실리콘이나 HSG (hemispherical silicon grain)(10)을 형성하고, 하부전극의 산화방지를 목적으로 질화막(Si3N4)(20)을 형성한다.First, a polysilicon or a HSG (hemispherical silicon grain) 10 doped with impurities is formed according to a conventional method, and a nitride film (Si 3 N 4 ) 20 is formed to prevent oxidation of the lower electrode.
Ta 원료물질로 액상의 Ta(OC2H5), TaCl5, TaI5 등을 사용하고, O 의 원료물질로는 O2, O3, N2O, NO, NO2 등을 사용하여, Ta 원료물질을 반응 챔버내로 0.1초 내지 30초의 단락시간으로 인입시키는 방식으로, CVD 법에 따라 Ta2O5 박막(30) 증착을 실시한다.Liquid Ta (OC 2 H 5 ), TaCl 5 , TaI 5, etc. are used as Ta raw materials, and O 2 , O 3 , N 2 O, NO, NO 2, etc. The Ta 2 O 5 thin film 30 is deposited by the CVD method in such a manner that the raw material is introduced into the reaction chamber at a short time of 0.1 to 30 seconds.
Ta2O5 박막 증착후 전기적 특성을 더욱 향상시키기 위해서 후속 열처리를 한다. 후속 열처리는 단일 열처리 또는 두 단계 열처리를 하며, 두 단계 열처리를 이용할 경우에는, 일단계로 O2, O3, N2O, NO, NO2 등의 가스를 사용하여 300~600℃온도에서 0.1~1 Torr 의 저압에서 열처리한 다음, 700~900℃온도에서 저압 또는 상압에서 고압 열처리한다. Ta2O5 박막의 열처리는 플라즈마, UV 등의 보조 에너지원을 이용하여 O2, O3, N2O, NO, NO2 등의 가스를 활성화시킨 상태에서 진행시킬 수 있다.Subsequent heat treatment is performed to further improve the electrical properties after Ta 2 O 5 thin film deposition. Subsequent heat treatment is either single heat treatment or two-stage heat treatment, and in case of using two-stage heat treatment, 0.1 ° C at 300-600 ° C using gas such as O 2 , O 3 , N 2 O, NO, NO 2, etc. After heat treatment at low pressure of ~ 1 Torr, high pressure heat treatment at low or normal pressure at 700 ~ 900 ℃. Heat treatment of the Ta 2 O 5 thin film may be performed in a state in which gases such as O 2 , O 3 , N 2 O, NO, and NO 2 are activated using auxiliary energy sources such as plasma and UV.
후속 열처리가 끝난 다음, 저유전층인 SiO2 형성을 막고 누설전류를 감소시키기 위해 TaN, TiN, WN 등으로 상부전극(40)을 형성시킨다.After the subsequent heat treatment, the upper electrode 40 is formed of TaN, TiN, WN, etc. to prevent the formation of SiO 2 , which is a low dielectric layer, and to reduce leakage current.
이렇게 형성된 상부전극(40) 위에 필요에 따라 불순물이 도핑된 폴리실리콘(50)을 증착시킬 수 있다. The polysilicon 50 doped with impurities may be deposited on the upper electrode 40 thus formed as necessary.
이와 같이 형성된 캐퍼시터는 Ta2O5 박막이 고순도이고 매우 치밀하여 결함밀도가 낮아서, 전기적 특성이 우수할 뿐만 아니라 산소 확산도(oxygen diffusivity)도 종래의 저밀도 Ta2O5 박막보다 낮아져 후속 열처리 공정시 상하부 전극의 산화가 감소되어 등가 산화막 두께를 현재의 35Å 보다 더욱 낮출 수 있다.Capacitors formed as described above have a high purity and very dense Ta 2 O 5 thin film with low defect density, and thus have excellent electrical properties and lower oxygen diffusivity than conventional low density Ta 2 O 5 thin films in the subsequent heat treatment process. Oxidation of the upper and lower electrodes can be reduced, making the equivalent oxide film thickness even lower than the current 35 kPa.
이상에서는 본 발명의 캐퍼시터 형성방법의 바람직한 실시예로서 Ta2O5 박막을 갖는 캐퍼시터를 형성방법에 대해 기술하였으나, 본 발명은 이 실시예에만 한정되는 것이 아니라 차세대 캐퍼시터의 유전체로 사용될 BST((Ba,Sr)TiO3), STO(SrTiO3), BTO(BaTiO3), PZT(Pb(Zr,Ti)O3), PLZT((Pb,La)(Zr,Ti)O3) 등, CVD의 원료물질로 금속유기화합물을 사용하는 고유전율 박막의 경우에도 당업자라면 본 발명의 방법을 응용하여 실시할 수 있을 것이다.In the above description, a method of forming a capacitor having a Ta 2 O 5 thin film as a preferred embodiment of the method of forming a capacitor of the present invention has been described. However, the present invention is not limited to this embodiment, but is used as a dielectric for a next generation capacitor. , Sr) TiO 3 ), STO (SrTiO 3 ), BTO (BaTiO 3 ), PZT (Pb (Zr, Ti) O 3 ), PLZT ((Pb, La) (Zr, Ti) O 3 ) Even in the case of a high dielectric constant thin film using a metal organic compound as a raw material, those skilled in the art will be able to apply the method of the present invention.
본 발명에 따르면, 고순도의 치밀한 캐퍼시터는 고순도의 치밀한 Ta2O5 박막으로 이루어져 누설전류을 최소한 줄일 수 있을 뿐만 아니라 전기적 특성이 우수해 짐으로써 더욱 고집적화된 DRAM 의 개발이 용이해지고, 높은 충전용량으로 인해 리프레쉬(refresh) 특성이 우수하고 신뢰성이 우수한 반도체 장치를 개발할 수 있다.According to the present invention, the high-density compact capacitor is composed of a high-purity, dense Ta 2 O 5 thin film to not only reduce the leakage current but also to improve the electrical characteristics to facilitate the development of more integrated DRAM, and due to the high charge capacity A semiconductor device having excellent refresh characteristics and high reliability can be developed.
도 1 은 본 발명에 따른 Ta2O5 박막 증착시 Ta 원료를 단락적으로 유입하는 단락 시간(tp)을 표시한 도면이다.1 is a view showing a short time (t p ) for injecting Ta raw material in a short circuit during Ta 2 O 5 thin film deposition according to the present invention.
도 2 는 본 발명의 실시예에 따른 캐퍼시터 형성방법을 설명하기 위한 Ta2O5 박막 캐퍼시터 구조도이다.2 is a structure diagram of Ta 2 O 5 thin film capacitor for explaining a method of forming a capacitor according to an embodiment of the present invention.
* 도면 중의 주요 부분에 대한 부호설명** Explanation of Codes on Major Parts of Drawings *
10 : 폴리실리콘막 20 : 질화막10 polysilicon film 20 nitride film
30 : 탄탈륨옥사이드막 40 : 상부전극30 tantalum oxide film 40 upper electrode
50 : 폴리실리콘막 50: polysilicon film
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPH07161827A (en) * | 1993-12-02 | 1995-06-23 | Nec Corp | Method for manufacturing semiconductor device |
| KR19980044979A (en) * | 1996-12-09 | 1998-09-15 | 차오 로버트 에이치. 씨 | Low leakage current LPCVD tantalum oxide (Ta2O5) film manufacturing method |
| KR19980052922A (en) * | 1996-12-26 | 1998-09-25 | 이경수 | Thin film deposition system and thin film deposition method of semiconductor device |
| KR0165484B1 (en) * | 1995-11-28 | 1999-02-01 | 김광호 | Tantalum oxide film deposition forming method and apparatus |
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| JPH07161827A (en) * | 1993-12-02 | 1995-06-23 | Nec Corp | Method for manufacturing semiconductor device |
| KR0165484B1 (en) * | 1995-11-28 | 1999-02-01 | 김광호 | Tantalum oxide film deposition forming method and apparatus |
| KR19980044979A (en) * | 1996-12-09 | 1998-09-15 | 차오 로버트 에이치. 씨 | Low leakage current LPCVD tantalum oxide (Ta2O5) film manufacturing method |
| KR19980052922A (en) * | 1996-12-26 | 1998-09-25 | 이경수 | Thin film deposition system and thin film deposition method of semiconductor device |
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