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KR100483381B1 - Gray voltage generation circuit of liquid crystal display - Google Patents

Gray voltage generation circuit of liquid crystal display Download PDF

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KR100483381B1
KR100483381B1 KR1019970038655A KR19970038655A KR100483381B1 KR 100483381 B1 KR100483381 B1 KR 100483381B1 KR 1019970038655 A KR1019970038655 A KR 1019970038655A KR 19970038655 A KR19970038655 A KR 19970038655A KR 100483381 B1 KR100483381 B1 KR 100483381B1
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voltage
gray
liquid crystal
gray voltage
crystal display
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KR19990016184A (en
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이원석
이규수
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삼성전자주식회사
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

이 발명은 액정 표시 장치에서 블랙 윈도우 구현시 계조 전압에 유입된 리플로 인한 물결무늬 불량 현상을 제거하기 위한 계조 전압 발생 회로에 관한 것으로서, 액정에 인가되는 공통 전압을 기준으로 양의 최대 계조 전압과 음의 최대 계조 전압이 출력되는 계조 전압 발생 회로의 두 단자 사이에 제1 커패시터를 연결하고, 이 공통 전압을 기준으로 양의 최소 계조 전압과 음의 최소 계조 전압이 출력되는 두 단자 사이에 제2 커패시터를 연결하는 구조로 이루어져 있다.The present invention relates to a gray scale voltage generation circuit for removing a wave pattern defect caused by a reflow introduced into a gray scale voltage when a black window is implemented in a liquid crystal display. The present invention relates to a positive maximum gray scale voltage based on a common voltage applied to a liquid crystal display. A first capacitor is connected between two terminals of a gray voltage generator circuit for outputting a negative maximum gray voltage, and a second between two terminals for outputting a positive minimum gray voltage and a negative minimum gray voltage based on this common voltage. It consists of a structure that connects the capacitors.

Description

액정 표시 장치의 계조 전압 발생 회로Gray voltage generator circuit of liquid crystal display

이 발명은 액정 표시 장치의 계조 전압 발생 회로에 관한 것으로서, 특히 화면 특정 영역에서의 블랙 윈도우 구현시 계조 전압에 유입된 리플로 인한 물결무늬 불량 현상을 제거하기 위한 계조 전압 발생 회로에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gray scale voltage generating circuit of a liquid crystal display, and more particularly, to a gray scale voltage generating circuit for removing a wave pattern defect caused by a ripple introduced into a gray voltage when implementing a black window in a specific region of a screen.

일반적인 박막 트랜지스터-액정 표시 장치(TFT-LCD)는 상판의 공통 전극에 인가된 공통 전압을 기준으로 액정이 반응할 수 있는 일정 범위의 계조 전압(gray voltage)을 인가하는 방법에 의해 구동된다.A general TFT-LCD is driven by a method of applying a range of gray voltages to which a liquid crystal can react based on a common voltage applied to a common electrode of an upper panel.

그러나, 일반적으로 액정이라는 물질은 직류 전압을 계속 인가받는 경우에 열화되는 특성을 가지고 있기 때문에, 액정에 인가되는 전압을 일정 주기로 반전시켜 구동하지 않으면 안된다. 그래서 이러한 반전 구동 방식으로 저전압(low voltage) 구동 방식과 고전압(high voltage) 구동 방식이 사용된다.However, in general, a liquid crystal material deteriorates when a direct current voltage is continuously applied. Therefore, the liquid crystal material must be driven by inverting the voltage applied to the liquid crystal at a predetermined cycle. Therefore, a low voltage driving method and a high voltage driving method are used as the inversion driving method.

저전압 구동 방식은 계조 전압의 최대값과 최소값을 기준으로 공통 전압을 반전시키면서 계조 전압을 인가하는 방식이고, 고전압 구동 방식은 고정된 직류값의 공통 전압을 기준으로 계조 전압을 인가하는 방식이다.The low voltage driving method is a method of applying a gray voltage while inverting a common voltage based on the maximum and minimum values of the gray voltage, and the high voltage driving method is a method of applying a gray voltage based on a common voltage of a fixed DC value.

도 1은 고전압 구동 방식에서 사용되는 종래의 계조 전압 발생 회로도로서, 하이 기준 전압(Vref)과 로우 기준 전압(GND)이 인가되는 단자 사이에는 다수의 직렬 저항(RU1∼RU10, RD1∼RD10)으로 이루어진 저항열이 연결되어 있어 이를 통해 다수의 계조 전압이 발생되며, 저항열 중앙에는 공통 전압(Vcom)이 인가되는 단자가 연결되어 있다.1 is a circuit diagram of a conventional gray voltage generator used in a high voltage driving method, and includes a plurality of series resistors RU1 to RU10 and RD1 to RD10 between terminals to which a high reference voltage Vref and a low reference voltage GND are applied. The resistance strings are connected to generate a plurality of gray voltages, and a terminal to which a common voltage Vcom is applied is connected to the center of the resistance strings.

도 1에서 도시한 바와 같은 계조 전압 발생 회로를 이용하여 화이트 윈도우 표시 영역의 특정 부분에 블랙 윈도우를 구현하기 위해서는 공통 전압(Vcom)을 기준으로 양의 최대 계조 전압(G1+)과 음의 최대 계조 전압(G1-)을 액정에 인가해야 한다.In order to implement a black window in a specific portion of the white window display area by using the gray voltage generator circuit as shown in FIG. 1, the positive maximum gray voltage (G1 +) and the negative maximum gray voltage based on the common voltage (Vcom) are shown. (G1-) should be applied to the liquid crystal.

그러나, 이러한 방법으로 구현된 윈도우를 크로스톡 패턴을 통해 보면, 도 2에서 도시한 바와 같이 블랙 패턴과 화이트 패턴의 경계에서 물결무늬(3)와 같은 영상이 라인을 반전하듯이 표시되는 현상이 발생함을 알 수 있다. 이러한 현상이 발생하는 원인은 화이트 윈도우(1)가 표시된 다음 블랙 윈도우(2)가 표시될 때 도 3에서 도시한 그래프와 같이 계조 전압을 발생시키기 위한 기준 전압(Vref)이 DC/DC 컨버터로부터 불안정하게 출력되기 때문이다. 즉, 기준 전압(Vref)은 화이트 윈도우(1)가 표시되는 시간(t1→t2) 동안 안정되게 출력되다가 블랙 윈도우(2)가 표시되기 시작할 때(t2) 일시적으로 불안정해지게 되고 다시 화이트 윈도우(1)가 표시될 때(t3) 일시적으로 불안정해진다.However, when a window implemented in this manner is viewed through a crosstalk pattern, as shown in FIG. 2, an image such as a wave pattern 3 is displayed at the boundary between the black pattern and the white pattern as if the line is inverted. It can be seen. The reason for this phenomenon is that when the white window 1 is displayed and then the black window 2 is displayed, the reference voltage Vref for generating the gradation voltage as shown in the graph shown in FIG. 3 is unstable from the DC / DC converter. This is because That is, the reference voltage Vref is stably output for the time t1? T2 when the white window 1 is displayed, and then becomes unstable temporarily when the black window 2 starts to be displayed (t2). When 1) is displayed (t3), it becomes temporarily unstable.

이처럼 블랙 윈도우(2)가 표시될 때 그리고 다시 화이트 윈도우(1)가 표시될 때 출력되는 기준 전압(Vref)이 불안정해지는 이유는, 앞에서 언급한 바와 같이 블랙 윈도우(2)가 표시될 때 순간적으로 큰 계조 전압이 필요하기 때문이다. 그리고 이처럼 불안정한 기준 전압(Vref)의 발생은 도 4에서 도시한 바와 같이 액정에 인가되는 계조 전압에 리플이 유입되는 원인이 되는데, 특히 공통 전압을 기준으로 양의 계조 전압(G1+)에 리플이 유입됨을 알 수 있다. 이처럼 리플이 계조 전압에 유입됨으로써 크로스톡 패턴의 블랙 패턴과 화이트 패턴의 경계에서 물결무늬의 불량 현상이 나타나는 것이다.The reason why the output reference voltage Vref becomes unstable when the black window 2 is displayed and when the white window 1 is displayed again is that as described above, the black window 2 is momentarily displayed. This is because a large gray scale voltage is required. The unstable reference voltage Vref may cause ripple to flow into the gray voltage applied to the liquid crystal as shown in FIG. 4. In particular, ripple flows into the positive gray voltage G1 + based on the common voltage. It can be seen that. As the ripple flows into the gray scale voltage, a defective wave pattern appears at the boundary between the black and white patterns of the crosstalk pattern.

그러므로, 종래에는 이처럼 불안정한 기준 전압을 안정화시키기 위해서 DC/DC 컨버터의 출력단에 전압 안정화 회로를 부가하였다. 그러나, 이처럼 별도의 회로를 부가하는 것은 시스템의 비용과 크기를 증가시킨다는 문제점이 있다.Therefore, conventionally, a voltage stabilization circuit is added to the output terminal of the DC / DC converter in order to stabilize such an unstable reference voltage. However, there is a problem that adding such a separate circuit increases the cost and size of the system.

따라서 이 발명의 과제는 상기와 같은 문제점을 해결하기 위한 것으로서, 화면 특정 영역에서의 블랙 윈도우 구현시 계조 전압에 유입된 리플로 인한 물결무늬 불량 현상을 제거하기 위한 계조 전압 발생 회로를 제공하는 데에 있다.Accordingly, an object of the present invention is to solve the above problems, and to provide a gray voltage generator circuit for removing a wave pattern defect caused by a reflow introduced into the gray voltage in a black window in a specific region of a screen. have.

상기의 과제를 달성하기 위한 이 발명은,This invention for achieving said subject,

하이 기준 전압과 로우 기준 전압이 인가되는 단자 사이에 연결되어 액정을 구동하기 위한 다수의 계조 전압을 발생시키는 직렬 저항열,A series resistance string connected between a terminal to which a high reference voltage and a low reference voltage are applied to generate a plurality of gray voltages for driving a liquid crystal;

상기 직렬 저항열 중앙에 인가되는 공통 전압을 기준으로 양의 최대 계조 전압과 음의 최대 계조 전압이 출력되는 두 단자 사이에 연결되는 제1 커패시터, 및A first capacitor connected between two terminals outputting a positive maximum gray voltage and a negative maximum gray voltage based on a common voltage applied to the center of the series resistance string; and

상기 공통 전압을 기준으로 양의 최소 계조 전압과 음의 최소 계조 전압이 출력되는 두 단자 사이에 연결되는 제2 커패시터를 포함한다.And a second capacitor connected between two terminals outputting a positive minimum gray voltage and a negative minimum gray voltage based on the common voltage.

이하, 이 발명이 속하는 기술 분야에서 통상의 지식을 가진 자가 이 발명을 용이하게 실시할 수 있을 정도로 상세히 설명하기 위해 이 발명의 바람직한 실시예를 첨부된 도면을 참조로 설명하기로 한다.DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention.

도 5는 이 발명의 실시예에 따른 계조 전압 발생 회로도이다.5 is a gradation voltage generation circuit diagram according to an embodiment of the present invention.

도 5에서 도시한 바와 같이 이 발명의 실시예에 따른 계조 전압 발생 회로에서,As shown in FIG. 5, in the gray voltage generator circuit according to the embodiment of the present invention,

직렬 저항열(RU1∼RU10, RD1∼RD10)은 하이 기준 전압(Vref)과 0V의 로우 기준 전압(GND) 사이의 전위차를 분압하여 액정을 구동하기 위한 다수의 계조 전압(G1+∼G9+, G1-∼G9-)을 발생시킨다.The series resistor strings RU1 to RU10 and RD1 to RD10 divide a potential difference between the high reference voltage Vref and the low reference voltage GND of 0V to drive a plurality of gray voltages G1 + to G9 + and G1- to drive the liquid crystal. To G9-).

상기 전위차의 중간 전위에 해당하는 공통 전압(Vcom)을 기준으로 양의 최대 계조 전압(G1+)과 음의 최대 계조 전압(G1-)이 출력되는 두 단자 사이에 연결되는 제1 커패시터(C1)와, 양의 최소 계조 전압(G9+)과 음의 최소 계조 전압(G9-)이 출력되는 두 단자 사이에 연결되는 제2 커패시터(C2)는, 크로스톡 패턴에서 블랙 패턴과 화이트 패턴의 경계에서 발생하는 물결무늬의 원인이 되는 AC 성분의 리플을 통과시키는 특성을 가지고 있기 때문에, 도 6에서 도시한 바와 같이 양의 계조 전압(G1+) 뿐만 아니라 음의 계조 전압(G1-)에도 AC 성분의 리플이 유입되게 한다.A first capacitor C1 connected between two terminals outputting a positive maximum gray voltage G1 + and a negative maximum gray voltage G1- based on the common voltage Vcom corresponding to the intermediate potential of the potential difference; The second capacitor C2 connected between the two terminals at which the positive minimum gray voltage (G9 +) and the negative minimum gray voltage (G9-) are output is generated at the boundary between the black pattern and the white pattern in the crosstalk pattern. Since the ripple of the AC component causing the wave pattern is passed, the ripple of the AC component flows into the negative gray voltage G1 + as well as the positive gray voltage G1 + as shown in FIG. To be.

그러므로, 이 발명의 효과는 액정에 인가되는 양의 계조 전압과 음의 계조 전압에 동일한 리플이 유입되도록 함으로써, 블랙 패턴과 화이트 패턴의 경계에서 나타나는 물결무늬 불량 현상을 제거할 수 있다는 것이다.Therefore, the effect of the present invention is that the same ripple flows into the positive gray voltage and the negative gray voltage applied to the liquid crystal, thereby eliminating the phenomena of the mottled pattern appearing at the boundary between the black pattern and the white pattern.

도 1은 종래의 계조 전압 발생 회로도,1 is a circuit diagram of a conventional gray voltage generator;

도 2는 블랙 윈도우(black window)를 구현하는 경우 물결무늬 불량 현상이 나타난 크로스톡 패턴(crosstalk pattern)도,2 is a crosstalk pattern (crosstalk pattern) showing a bad wave pattern when implementing a black window,

도 3은 도 2와 같은 경우 시간적 변화에 따라 출력되는 계조 전압 발생용 기준 전압의 파형도,3 is a waveform diagram of a reference voltage for generating a gray voltage output according to a time change in the case of FIG.

도 4는 도 2와 같은 경우 리플(ripple)이 유입된 계조 전압의 파형도,4 is a waveform diagram of a gray voltage having ripple introduced therein as shown in FIG. 2;

도 5는 이 발명의 실시예에 따른 계조 전압 발생 회로도,5 is a gradation voltage generation circuit diagram according to an embodiment of the present invention;

도 6은 도 5에서 도시한 계조 전압 발생 회로로부터 출력되는 계조 전압의 파형도이다.FIG. 6 is a waveform diagram of a gray voltage output from the gray voltage generator circuit shown in FIG. 5.

Claims (1)

하이 기준 전압과 로우 기준 전압이 인가되는 단자 사이에 연결되어 액정을 구동하기 위한 복수의 계조 전압을 생성하는 직렬 저항열,A series resistance string connected between a terminal to which a high reference voltage and a low reference voltage are applied to generate a plurality of gray voltages for driving a liquid crystal; 상기 직렬 저항열 중앙에 인가되는 공통 전압을 기준으로 양의 최대 계조 전압과 음의 최대 계조 전압이 출력되는 두 단자 사이에 연결되어 있는 제1 커패시터, 그리고A first capacitor connected between two terminals outputting a positive maximum gray voltage and a negative maximum gray voltage based on a common voltage applied to the center of the series resistance string; and 상기 공통 전압을 기준으로 양의 최소 계조 전압과 음의 최소 계조 전압이 출력되는 두 단자 사이에 연결되는 제2 커패시터를 포함하는 계조 전압 발생 회로.And a second capacitor connected between the two terminals at which a positive minimum gray voltage and a negative minimum gray voltage are output based on the common voltage.
KR1019970038655A 1997-08-13 1997-08-13 Gray voltage generation circuit of liquid crystal display Expired - Lifetime KR100483381B1 (en)

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KR100626077B1 (en) * 2005-05-02 2006-09-20 삼성에스디아이 주식회사 Gamma Reference Voltage Generator and Flat Panel Display

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JPH06235902A (en) * 1993-02-09 1994-08-23 Sharp Corp Gradation voltage generating device and signal line driving circuit for display device
JPH06289816A (en) * 1993-04-01 1994-10-18 Seiko Epson Corp Lcd module liquid crystal driving power circuit
JPH0777679A (en) * 1993-08-06 1995-03-20 Sharp Corp Power circuit
JPH085984A (en) * 1994-06-17 1996-01-12 Sharp Corp Power circuit
JPH08171372A (en) * 1994-12-20 1996-07-02 Sharp Corp Display device
KR100206581B1 (en) * 1996-12-31 1999-07-01 윤종용 Gray voltage generation circuit for liquid crystal display

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06235902A (en) * 1993-02-09 1994-08-23 Sharp Corp Gradation voltage generating device and signal line driving circuit for display device
JPH06289816A (en) * 1993-04-01 1994-10-18 Seiko Epson Corp Lcd module liquid crystal driving power circuit
JPH0777679A (en) * 1993-08-06 1995-03-20 Sharp Corp Power circuit
JPH085984A (en) * 1994-06-17 1996-01-12 Sharp Corp Power circuit
JPH08171372A (en) * 1994-12-20 1996-07-02 Sharp Corp Display device
KR100206581B1 (en) * 1996-12-31 1999-07-01 윤종용 Gray voltage generation circuit for liquid crystal display

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