KR100471395B1 - Method for manufacturing thin film transistor lcd - Google Patents

Abstract

The present invention discloses a method of manufacturing a thin film transistor liquid crystal display device capable of preventing the Al-based metal wiring from being oxidized during the process. The disclosed method of the present invention is to deposit an Al-based metal film having an Al compound on the surface by depositing an Al-based metal film in a chamber in which argon gas and fluorine-based gas are injected onto a transparent insulating substrate. Etching to form a gate electrode and a gate bus line; Cleaning and heat treating the substrate resultant with a B.O.E solution; Forming an active layer by sequentially depositing a gate insulating film, an amorphous silicon film, and a doped amorphous silicon film on the entire surface of the substrate and etching the doped amorphous silicon film and the amorphous silicon film; Depositing an Al-based metal film having an Al compound for oxidation prevention on a surface in a chamber in which argon gas and fluorine-based gas are injected onto the substrate; Etching the Al-based metal layer and the active layer to form a source / drain electrode, a data bus line, a channel layer, and an ohmic contact layer; Cleaning and heat treating the substrate resultant with a B.O.E solution; Forming a gate pad portion and a data pad portion by applying a protective layer on the substrate and etching the same to form a contact hole exposing source / drain electrodes and opening a portion of the gate bus line and the data bus line; And depositing a transparent metal film on the passivation layer and etching the transparent metal layer to form a pixel electrode.

Description

Manufacturing Method of Thin Film Transistor Liquid Crystal Display {METHOD FOR MANUFACTURING THIN FILM TRANSISTOR LCD}

The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a method for manufacturing a thin film transistor liquid crystal display device which can prevent the Al metal wirings from being oxidized in the process.

In general, in fabricating an array substrate of a thin film transistor liquid crystal display device, MoW is mainly used as a gate metal. However, in recent years, as the liquid crystal display device is changed to a large screen and a high quality, the RC time delay is a problem that is different from that of the small size in the past, which makes it difficult to use the MoW. Here, the RC time delay is determined by the resistivity (inverse of the conductivity) and the dielectric constant (capacitance), and the method of reducing the resistance is the most important to improve this. Therefore, in order to solve the RC time delay problem, techniques for using Cu, Ag, and Al with low resistance as gate metals have been proposed, and Cu and Ag are inadequate in terms of heavy metal treatment and unit cost, and thus, techniques for using Al are proposed. This has been tried a lot.

However, due to its characteristics, Al has a high thermal expansion coefficient difference with the glass substrate at a process temperature of 200 ° C. or higher, and not only causes an electrical shorting due to open defects, but also causes a shortening of Al-ITO. Direct contact causes the surface oxidation of Al and increases the contact resistance. In recent years, Mo buffer layers have been deposited on top and bottom of Al to form gate metals.

1A to 1G are cross-sectional views of a gate pad portion of a thin film transistor array process according to the prior art.

As shown in FIG. 1A, a Mo metal film 12 to be used as a buffer layer is deposited on the glass substrate 10 on which the gate metal film 11 made of Al-based metal is deposited.

As shown in FIG. 1B, the gate electrode and gate bus line (not shown) having the Mo buffer layer 12 are formed by exposure, development, and etching using a mask (not shown).

Then, as illustrated in FIG. 1C, the gate insulating layer 13, the amorphous silicon layer 15, and the doped amorphous silicon layer 17 are sequentially deposited on the entire region of the substrate 10 on which the gate electrode is formed. .

As shown in FIG. 1D, the active layer is etched to form an active layer. Only the gate insulating layer 13 remains at a portion to be the gate pad part 21.

As shown in Fig. 1E, a source / drain electrode and a data bus line (not shown) are formed, and then a protective film 19 is applied.

As shown in FIG. 1F, the substrate 10 to which the passivation layer 19 is applied is etched to form a contact hole on the drain electrode (not shown), and a predetermined portion of an edge of the gate bus line is opened. A gate pad portion and a data pad portion (not shown) are formed.

Then, as shown in FIG. 1G, an ITO metal film or an Indium Zinc Oxide (IZO) metal film 20 is deposited while the gate pad is opened to expose a portion made of Al-based metal and Mo metal. It is in contact with the gate pad portion 21.

Therefore, when the wiring of the array substrate is made of Al-based metal which is a low resistance metal as described above, the Mo buffer layer prevents the Al-based metal from being oxidized in each process step. In addition, there is an advantage of reducing the contact resistance when the pixel electrode made of ITO or IZO contacts the gate pad portion.

However, when forming the Mo buffer layer above and below the Al-based metal film as described above, there is a very inefficient problem in terms of cost and productivity, and also because the etching rate of Al-based metal and Mo is different during wet or dry etching, There is a disadvantage that causes.

In addition, the method of removing the oxide film on the Al surface by the surface treatment also cannot completely remove the stable oxide film that has already been produced and has a difficulty in going through various processes.

Accordingly, an object of the present invention is to provide a method for manufacturing a thin film transistor liquid crystal display device which prevents surface oxidation of an Al based metal by depositing an Al based metal under fluorine gas. .

In order to achieve the above object of the present invention, the present invention, by depositing an Al-based metal film in a chamber in which argon gas and fluorine-based gas is injected on a transparent insulating substrate to the Al compound capable of preventing oxidation on the surface Depositing an Al-based metal film and etching the Al-based metal film to form a gate electrode and a gate bus line; Cleaning the substrate on which the gate electrode and the gate bus line are formed with a B.O.E solution, and performing a heat treatment at 350 ° C .; Sequentially depositing a gate insulating film, an amorphous silicon film, and a doped amorphous silicon film on the entire surface of the substrate, and etching the doped amorphous silicon film and the amorphous silicon film to form an active layer; Depositing an Al-based metal film having an Al compound for oxidation prevention on a surface in a chamber in which argon gas and fluorine-based gas are injected onto the substrate on which the active layer is formed; Etching the Al-based metal layer and the active layer to form a data bus line including a source / drain electrode, a channel layer, and an ohmic contact layer; Cleaning the resultant substrate on which the source / drain electrodes are formed with a B.O.E solution, and performing a heat treatment at 290 ° C .; Forming a gate hole and a data pad part by applying a passivation layer on the resultant of the substrate and etching the same to form a contact hole exposing source / drain electrodes and opening a portion of the gate bus line and the data bus line; ; And depositing a transparent metal film on the passivation layer and etching the transparent metal layer to form a pixel electrode.

Here, the fluorine-based gas is any one of SF ₃ , NF ₃ or CHF ₃ . The Al-based metal is any one of Ti, Nd, Fe, Si, Cu, Ta, Co, Ni, Mg, Y, V, Cr, Mo, W, Mn, Pd, Ag, Au, Zn or Ge Or two is added and the addition amount shall be 10 wt% or less. In the deposition of the Al-based metal film, the pressure in the chamber in which argon and fluorine-based gas were injected is 0.1 to 0.9 Pa, the amount of argon gas is 10 to 100 sccm, and the amount of fluorine-based gas is 100 to 1000 sccm. Perform.

In addition, the heat treatment time of the gate electrode and the source / drain electrodes is about 20 to 30 minutes, and the time to put in the BOE solution is about 5 to 15 minutes, and the ITO metal film and the IZO metal film are either crystalline or amorphous. One can be selected and its thickness is about 100 ~ 1000Å.

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Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

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2A to 2H are cross-sectional views illustrating a gate pad portion of a thin film transistor array process according to the present invention.

As shown in Fig. 2A, the gate metal film 31 made of Al-based metal is in a chamber in which argon gas, H ₂ or N ₂ gas, and fluorine-based gas (SF ₆ , NF ₃ , CHF ₃ ) are added (not shown). And patterned to form a gate bus line including the gate electrode after deposition on the glass substrate 10.

As shown in FIGS. 2B and 2C, after cleaning the substrate product with a BOE solution for 5 to 15 seconds, the substrate product on which the gate electrode and the gate bus line 31 are formed is subjected to 20 minutes at a temperature of 350 ° C. Heat treatment for 30 minutes.

Then, as illustrated in FIG. 2D, the gate insulating film 23, the amorphous silicon film 25, and the doped amorphous silicon film 27 are sequentially deposited on the entire region of the substrate on which the gate electrode and the gate bus line are formed. do.

As shown in FIG. 2E, the gate insulating layer 23, the amorphous silicon layer 25, and the doped amorphous silicon layer 27 are sequentially etched to form an active layer. Then, only the gate insulating film 23 remains on the portion to be the gate pad portion 41. Although not shown in the drawing, the Al-based metal film is placed in a chamber in which argon gas, H ₂ or N ₂ gas, and fluorine-based (SF ₆ , NF ₃ , CHF ₃ ) gas are injected over the entire region of the substrate on which the active layer is formed. It is deposited and etched to form source / drain electrodes, channel layers, ohmic contact layers and data bus lines (not shown).

The substrate resultant is then rinsed with B.O.E solution for 5 to 15 seconds, and then the substrate on which the source / drain electrodes are formed is heat treated at a temperature of 290 ° C. for about 20 to 30 minutes.

As shown in FIG. 2F, a protective film is uniformly coated on the entire region of the substrate on which the source / drain electrodes are formed.

As illustrated in FIG. 2G, the passivation layer 29 is etched with a gas of SF ₆ / He or SF ₆ / He / O ₂ to form a contact hole (not shown) on the drain electrode, and a gate pad part. Open 41.

The Al-based metal film may be any one of Ti, Nd, Fe, Si, Cu, Ta, Co, Ni, Mg, Y, V, Cr, Mo, W, Mn, Pd, Ag, Au, Zn, or Ge metal. One or two is added, and the addition amount shall be 10 wt% or less.

In addition, although not shown in the drawing, after etching the protective film, SF ₆ , H ₂ , N ₂ plasma treatment to remove the oxide film that may be formed on the surface of the Al-based metal, or BOE solution for about 5 to 15 seconds Wash on.

As shown in FIG. 2H, a crystalline or amorphous ITO metal film or IZO metal film 30 is deposited on the protective film as a transparent metal at a thickness of 100 to 1000 kPa at a temperature of 200 to 280 ° C., and then patterned. A pixel electrode is formed. In this case, the pixel electrode is in contact with the drain electrode and in contact with the gate pad part 41.

In the above, the present invention does not use Mo metal as the Al buffer layer as in the prior art, but because it creates a condition for preventing oxidation during the deposition of the Al-based metal film having a structure such as Al-F (-N, -H), That is, by forming the Al compound on the surface of the Al metal film, surface oxidation of the Al metal film is suppressed through the formation of such Al compound. Therefore, since the present invention forms wiring only by Al metal, it can have advantages in terms of cost and productivity, and a good wiring profile can be obtained.

In each exposed process, the plasma oxide and the B.O.E solution are washed to suppress the thermal oxide film formation, thereby lowering the contact resistance between the ITO metal film and the IZO metal film.

As described in detail above, according to the present invention, there is no effect of forming a buffer layer on the existing Al-based metal film, resulting in cost reduction and process simplification.

In addition, Al-based metals were deposited under a fluorine gas layer, and plasma treatment was performed on Al-based metals to prevent surface oxidation.

The present invention is not limited to the above-described embodiments, and various changes can be made by those skilled in the art without departing from the gist of the present invention as claimed in the following claims.

1A-1G are cross-sectional views of a gate pad portion of a prior art thin film transistor array process.

2A-2H are cross-sectional views of a gate pad portion of a thin film transistor array process in accordance with the present invention.

          * Description of the symbols for the main parts of the drawings *

10: glass substrate 23: gate insulating film

29: amorphous silicon film 30: ITO or IZO metal film

41: gate pad

Claims (12)

In the chamber in which argon gas and fluorine-based gas were injected onto the transparent insulating substrate, an Al-based metal film including an Al compound capable of preventing oxidation was deposited on the surface of the Al-based metal film. Forming a gate bus line; Cleaning the substrate on which the gate electrode and the gate bus line are formed with a B.O.E solution, and performing a heat treatment at 350 ° C .; Sequentially depositing a gate insulating film, an amorphous silicon film, and a doped amorphous silicon film on the entire surface of the substrate, and etching the doped amorphous silicon film and the amorphous silicon film to form an active layer; Depositing an Al-based metal film having an Al compound for oxidation prevention on a surface in a chamber in which argon gas and fluorine-based gas are injected onto the substrate on which the active layer is formed; Etching the Al-based metal layer and the active layer to form a data bus line including a source / drain electrode, a channel layer, and an ohmic contact layer; Cleaning the resultant substrate on which the source / drain electrodes are formed with a B.O.E solution, and performing a heat treatment at 290 ° C .; Forming a gate hole and a data pad part by applying a passivation layer on the resultant of the substrate and etching the same to form a contact hole exposing source / drain electrodes and opening a portion of the gate bus line and the data bus line; ; And And depositing a transparent metal layer on the passivation layer and etching the transparent metal layer to form a pixel electrode. The method of claim 1, wherein the fluorine-based gas is any one selected from the group consisting of SF ₃ , NF _3, and CHF ₃ . According to claim 1, wherein the Al-based metal film is Al, Ti, Nd, Fe, Si, Cu, Ta, Co, Ni, Mg, Y, V, Cr, Mo, W, Mn, Pd, Ag, Au, A method for manufacturing a thin film transistor liquid crystal display device comprising adding one or two selected from the group consisting of Zn and Ge. 4. The method of claim 3, wherein the amount of the additive is 10 wt% or less. 2. The method of claim 1, wherein the deposition of the Al-based metal film has a pressure in the chamber in which argon gas and fluorine gas are injected to be 0.1 to 0.9 Pa. 6. The method of claim 5, wherein the amount of argon gas is set to 10 to 100 sccm, and the amount of fluorine gas is set to 100 to 1000 sccm. delete The method of claim 1, wherein the heat treatment after forming the gate electrode and the source / drain electrodes is performed for 20 to 30 minutes. The method of claim 1, wherein the cleaning using the B.O.E solution is performed for 5 seconds to 15 minutes. The method of claim 1, wherein the transparent metal film is a crystalline or amorphous ITO metal film or an IZO metal film, and is deposited to have a thickness of 100 to 1000 GPa. delete delete