KR100443352B1 - Silicide Film Formation Method of Semiconductor Device - Google Patents
Silicide Film Formation Method of Semiconductor Device Download PDFInfo
- Publication number
- KR100443352B1 KR100443352B1 KR1019960076361A KR19960076361A KR100443352B1 KR 100443352 B1 KR100443352 B1 KR 100443352B1 KR 1019960076361 A KR1019960076361 A KR 1019960076361A KR 19960076361 A KR19960076361 A KR 19960076361A KR 100443352 B1 KR100443352 B1 KR 100443352B1
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- South Korea
- Prior art keywords
- film
- silicide film
- semiconductor device
- cobalt silicide
- forming
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
본 발명은 반도체 장치의 실리사이드막 형성방법에 관한 것으로, 특히 금속 열처리 공정을 사용하여 접촉 저항을 감소시키는 반도체 장치의 실리사이드막 형성방법에 관한 것이다.The present invention relates to a method of forming a silicide film of a semiconductor device, and more particularly, to a method of forming a silicide film of a semiconductor device in which a contact resistance is reduced by using a metal heat treatment process.
고속 동작, 저 전력 소모를 추구하면서 반도체 장치는 계속적으로 고 집적화되고 있다. 따라서 소자간 전도막 재료로 사용하던 불순물 도핑 폴리 실리콘막은 비저항의 한계로 인하여 불순물 도핑 폴리 실리콘막/WSix의 폴리사이드 구조로 대체되어 사용되어 왔다.In pursuit of high speed operation and low power consumption, semiconductor devices continue to be highly integrated. Therefore, the impurity doped polysilicon film used as the inter-electrode conductive film material has been replaced by the polyside structure of impurity doped polysilicon film / WSix due to the limitation of the resistivity.
그러나, 이러한 종래의 텅스텐 실리사이드막(WSix)은 웨이퍼의 크기가 커짐에 따라 급속 열처리 공정의 적용이 어려워 접촉 저항 특성이 우수하지 못한 문제점이 있다.However, such a conventional tungsten silicide film WSix has a problem in that it is difficult to apply the rapid heat treatment process as the size of the wafer becomes large, so that the contact resistance characteristics are not excellent.
본 발명은 코발트 실리사이드막을 급속 열처리하여 접촉 저항 특성을 개선하는 반도체 장치의 실리사이드막 형성방법을 제공하는데 그 목적이 있다.SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming a silicide film of a semiconductor device in which a cobalt silicide film is rapidly heat treated to improve contact resistance characteristics.
도 1은 본 발명의 일실시예에 따른 반도체 장치의 실리사이드막 형성방법을 설명하기 위한 단면도.1 is a cross-sectional view illustrating a silicide film forming method of a semiconductor device in accordance with an embodiment of the present invention.
* 도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings
10 : 하부층 11 : 폴리 실리콘막10: lower layer 11: polysilicon film
12 : 코발트 실리사이드막 13 : BPSG막12: cobalt silicide film 13: BPSG film
상기와 같은 목적을 달성하기 위한 본 발명은 웨이퍼 상에 형성된 소정의 하부층 상부에 폴리 실리콘막을 형성하는 단계, 상기 폴리 실리콘막 상에 코발트 실리사이드막을 형성하는 단계, 상기 코발트 실리사이드막을 포함한 상기 웨이퍼 상부에 층간 절연막으로서 BPSG막을 형성하는 단계, 및 상기 코발트 실리사이드막의 접촉저항 개선을 위하여 830℃ 내지 870℃ 온도로 급속 열처리하는 단계를 포함하여 이루어진 것을 특징으로 한다.The present invention for achieving the above object is a step of forming a polysilicon film on a predetermined lower layer formed on the wafer, forming a cobalt silicide film on the polysilicon film, the interlayer on the wafer including the cobalt silicide film Forming a BPSG film as an insulating film, and a rapid heat treatment at a temperature of 830 ℃ to 870 ℃ to improve the contact resistance of the cobalt silicide film.
이하, 첨부된 도면 도 1을 참조하여 본 발명의 일실시예를 상술한다.Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.
우선, 도 1에 도시된 바와 같이 실리콘 기판 상에 형성된 소정의 하부층(10)상부에 폴리 실리콘막(11)을 증착한다.First, as shown in FIG. 1, a polysilicon film 11 is deposited on a predetermined lower layer 10 formed on a silicon substrate.
이어서, 폴리 실리콘막(11) 상에 코발트 가스를 사용하여 코발트 실리사이드막(12)을 형성한다.Next, the cobalt silicide film 12 is formed on the polysilicon film 11 using cobalt gas.
다음으로, 코발트 실리사이드막(12) 상부에 층간 절연막인 BPSG(BoroPohsphoric Silicate Glass)막(13)을 증착한다.Next, a BPSG (BoroPohsphoric Silicate Glass) film 13 which is an interlayer insulating film is deposited on the cobalt silicide film 12.
이어서, 830 내지 870℃ 정도의 온도에서 급속 열처리(RTA : Rapid ThermalAnneal)를 실시한다. 코발트 실리사이드막(13)은 급속 열처리에 의해 안정된 구조를 가지게 되고, 이로 인하여 접촉 저항 특성을 개선할 수 있게 된다. 또한, BPSG막(13)의 리플로우 공정을 생략할 수 있는 장점도 있다.Subsequently, rapid thermal annealing (RTA) is performed at a temperature of about 830 to 870 ° C. The cobalt silicide film 13 has a stable structure by rapid heat treatment, thereby improving the contact resistance characteristics. There is also an advantage that the reflow step of the BPSG film 13 can be omitted.
이후, 콘택 공정등 후속 공정을 진행한다.Thereafter, a subsequent process such as a contact process is performed.
상기와 같은 본 발명의 일실시예에 나타난 본 발명을 실시하면 낮은 콘택 저항을 가지는 실리사이드막의 형성이 가능해짐으로써 반도체 장치의 신뢰도 및 특성 향상을 기대할 수 있다.By implementing the present invention as described in the embodiment of the present invention as described above it is possible to form a silicide film having a low contact resistance can be expected to improve the reliability and characteristics of the semiconductor device.
이상에서 설명한 본 발명은 전술한 실시예 및 첨부된 도면에 의해 한정되는 것이 아니고, 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 여러 가지 치환, 변형 및 변경이 가능하다는 것이 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자에게 있어 명백할 것이다.The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.
상기한 바와 같이 본 발명은 급속 열처리를 사용하여 실리사이드막의 접촉 저항 특성을 개선하는 효과가 있으며, 이로 인하여 반도체 장치의 신뢰도 및 특성 향상을 기대할 수 있다.As described above, the present invention has an effect of improving the contact resistance characteristics of the silicide layer by using rapid heat treatment, and thus, the reliability and characteristics of the semiconductor device can be expected.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960076361A KR100443352B1 (en) | 1996-12-30 | 1996-12-30 | Silicide Film Formation Method of Semiconductor Device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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KR1019960076361A KR100443352B1 (en) | 1996-12-30 | 1996-12-30 | Silicide Film Formation Method of Semiconductor Device |
Publications (2)
Publication Number | Publication Date |
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KR19980057091A KR19980057091A (en) | 1998-09-25 |
KR100443352B1 true KR100443352B1 (en) | 2004-10-14 |
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KR1019960076361A Expired - Fee Related KR100443352B1 (en) | 1996-12-30 | 1996-12-30 | Silicide Film Formation Method of Semiconductor Device |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07142726A (en) * | 1993-11-19 | 1995-06-02 | Oki Electric Ind Co Ltd | Manufacture of field effect transistor |
JPH07321066A (en) * | 1994-05-19 | 1995-12-08 | Nec Corp | Method for manufacturing semiconductor device |
KR960026953A (en) * | 1994-12-28 | 1996-07-22 | 김광호 | Gate electrode of semiconductor device and method of forming the same |
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1996
- 1996-12-30 KR KR1019960076361A patent/KR100443352B1/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07142726A (en) * | 1993-11-19 | 1995-06-02 | Oki Electric Ind Co Ltd | Manufacture of field effect transistor |
JPH07321066A (en) * | 1994-05-19 | 1995-12-08 | Nec Corp | Method for manufacturing semiconductor device |
KR960026953A (en) * | 1994-12-28 | 1996-07-22 | 김광호 | Gate electrode of semiconductor device and method of forming the same |
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KR19980057091A (en) | 1998-09-25 |
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