KR100367497B1 - Method for manufacturing contact hole in semiconductor device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a contact hole in a semiconductor device, by using a gate oxide film and a gate electrode remaining after gate electrode patterning to form a thickness of a nitride film deposited on silicon rather than an oxide film, and proceeding with a conventional contact hole forming process. Accordingly, the conductive wiring is prevented from being exposed through the contact hole, and the process of forming the contact hole can be simplified, thereby improving process yield and reliability of device operation.

Description

Contact hole formation method of semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a contact hole in a semiconductor device. In particular, the process is simplified by using a thickness difference between an oxide film and a nitride film formed on a polysilicon layer. It relates to a method for manufacturing contact holes.

Recently, the trend of high integration of semiconductor devices is greatly influenced by the development of fine pattern formation technology. In particular, the photoresist pattern is widely used as a mask for etching or ion implantation in the semiconductor device manufacturing process.

Therefore, miniaturization of the photoresist pattern is essential for high integration of semiconductor devices. The resolution of the photoresist pattern is proportional to the wavelength and process variables of the light source of the reduction exposure apparatus, and inversely proportional to the numerical aperture (NA) of the reduction exposure apparatus. do.

Here, the wavelength of the light source is reduced in order to improve the optical resolution of the reduced exposure apparatus. For example, the G-line and i-line reduced exposure apparatus having wavelengths of 436 and 365 nm have a process resolution of about 0.7 and 0.5 µm, respectively. Is the limit.

Therefore, a narrow exposure apparatus using a deep ultra violet, for example, a KrF laser having a wavelength of 248 nm or an ArF laser having a wavelength of 193 nm, is used as a light source to form a fine pattern of 0.5 μm or less.

In addition, the contact hole connecting the upper and lower conductive wiring is reduced in size and the distance between the peripheral wiring and the aspect ratio, which is the ratio of the diameter and the depth of the contact hole, is increased. Therefore, in a highly integrated semiconductor device having multiple conductive wirings, accurate and tight alignment between masks in a manufacturing process is required to form a contact, thereby reducing process margin.

The contact hole has misalignment tolerance during mask alignment, lens distortion during exposure process, critical dimensio variation during mask fabrication and photolithography process, and between masks to maintain gaps. The mask is formed by considering factors such as registration.

In addition, in order to overcome the limitations of the lithography process in forming the contact hole, a technology for forming the contact hole by a self-aligning method has been developed. The most promising method of forming a self-aligned contact hole is to use a nitride film as an etch barrier.

A method for manufacturing a contact hole of a conventional semiconductor device will be described with reference to FIG. 1.

First, the gate oxide film 2 and the gate electrodes 3 are formed on the semiconductor substrate 1, and a source / drain electrode having a lightly doped drain (LDD) structure according to a conventional method ( Not shown) and the oxide spacer 4 is formed. In this case, a mask oxide film 5 pattern is formed on the gate electrode 3 to prevent exposure of the gate electrode 3 when forming a self-aligned contact.

Then, on the entire surface of the structure, the oxide film 6, the barrier nitride film 7, and the B.P.G. (BPSG) or the tetra etchyl orthor silicate having excellent planarization characteristics A photoresist film for contact hole etching that exposes the planarization film 8 on a portion of the semiconductor substrate 1, which is supposed to be a bit line or a charge storage electrode contact, after forming the planarization film 8 of TEOS). The pattern 9 is formed.

Thereafter, the planarization film 8 exposed by the photoresist pattern 9 is dry-etched with the barrier nitride film 7 under a condition in which an etching selectivity difference is 10: 1 or more, thereby exposing the barrier nitride film 7 and again. The exposed barrier nitride layer 7 and the oxide layer 6 are sequentially removed to form a contact hole 10 exposing the semiconductor substrate 1. At this time, the etching process is over-etched by using a gas generating a large amount of polymer, for example, C ₂ F ₆ , C ₃ F ₈ , C ₄ F ₈ and the like mixed with an inert gas in order to increase the etching selectivity.

The method of manufacturing a contact hole of a semiconductor device using a barrier nitride film according to the prior art as an etch barrier includes a large amount of polymer induced gas C ₂ F ₆ , C ₃ to obtain a high etching selectivity between the nitride film and the BPSG oxide film. Although F ₈ , C ₄ F _8, etc. were used as an etching gas, it is difficult to obtain a high selectivity of 15 or more.

In addition, in the conventional method, film deposition of an oxide mask, a spacer oxide film, an oxide film, and a nitride film is repeated several times, and an oxide film and a nitride film are repeatedly etched during contact hole formation.

The present invention is to solve the above problems, the object of the present invention is to deposit a thick nitride film on the gate electrode surface of the silicon layer in a deposition condition for depositing a thick nitride film on the silicon than the oxide film, then forming a normal contact hole The present invention provides a method for manufacturing a contact hole of a semiconductor device, which simplifies the process of forming a contact hole by performing the process.

Features of the method for manufacturing a contact hole of a semiconductor device according to the present invention for achieving the above object is a step of forming a gate oxide film on a semiconductor substrate;

Forming a gate electrode having a silicon layer pattern on the gate oxide film;

Forming a nitride film on the entire surface of the structure, but depositing a thicker film on the gate electrode surface than the gate oxide film;

Forming an oxide film and a planarization film on the entire surface of the structure;

Exposing the nitride film by removing the planarization film and the oxide film by a photolithography process using a contact mask;

And removing the exposed nitride film, and then removing the gate oxide film using the nitride film as a mask to form a contact hole.

Hereinafter, a method for manufacturing a contact hole of a semiconductor device according to the present invention will be described in detail.

2A to 2C are process charts for manufacturing a contact hole of a semiconductor device according to the present invention.

First, a field oxide film 11 for inter-element insulation is formed on the semiconductor substrate 1, the gate oxide film 2 is grown on the silicon substrate, and then a silicon film which serves as a gate electrode of a MOS structure is patterned. The gate electrode 3 is formed. At this time, the gate oxide film 2 in the lower portion where the silicon film is etched is partially etched and remains thin on the semiconductor substrate 1. (See also section 2A).

Then, the entire surface of the structure is lightly treated with an oxide etching solution to remove the native oxide film on the side and the sidewall of the gate electrode 3, and the gate oxide film 2 is formed on the semiconductor substrate 1 exposed between the gate electrodes 3. After remaining, the nitride film 12 is deposited by low pressure chemical vapor deposition (LPCVD) at a temperature of 700 ° C. or higher. In this case, the nitride film 12 grown on the gate electrode 3 is thicker than the thickness grown on the gate oxide film 2. By using the above characteristics, the thickness difference between the nitride film 12 deposited on the gate oxide film 2 and the gate electrode 3 is increased, and the property of the deposited nitride film 12 is formed of an Si rich nitride film containing excessive Si. One.

As described above, in order to deposit a Si-rich nitride film using SiCl ₂ H ₂ and NH ₃ by LPCVD, NH ₃ : SiCl ₂ H _{2 is set} to 1.5: 1 to 5: 1 value and is 10 m at 700 to 850 ° C or higher. It is deposited at a Torr to 10 Torr. (See also FIG. 2B).

Thereafter, an oxide film 13 by LPCVD is deposited on the entire surface of the structure, and the planarization film 8 is deposited by BPSG or TEOS and heat-treated to planarize, thereby forming a photoresist pattern 9 as a contact etching mask. .

Subsequently, the planarization film 8 and the oxide film 13 are sequentially etched by a dry etching method having a high selectivity to the nitride film so that the nitride film 12 is exposed in the contact hole, and then thinly deposited on the gate oxide film 2. The nitride film 12 is removed by dry etching, and the exposed gate oxide film 2 is removed to form the contact hole 10. In this case, a part of the nitride film 12 formed on the gate electrode 3 is exposed in the contact hole 10 so that a portion of the nitride film 12 is etched during the etching of the nitride film 12 on the gate oxide film 2.

As described above, the method for manufacturing a contact hole of a semiconductor device according to the present invention is a deposition condition for depositing a nitride film thicker on silicon than an oxide film, and then depositing a nitride film thickly on the gate electrode surface of the silicon layer. By proceeding, there is an advantage that the process of forming a contact hole can be simplified to improve process yield and reliability of device operation.

1 is a schematic view for explaining a method for manufacturing a contact hole of a semiconductor device according to the prior art.

2A to 2C are contact hole manufacturing process diagrams of a semiconductor device according to the present invention.

<Description of Symbols for Major Parts of Drawings>

1 semiconductor substrate 2 gate oxide film

3: gate electrode 4: oxide film spacer

6: mask oxide film 7: barrier nitride film

8: planarization film 9: photosensitive film pattern

10 contact hole 11: field oxide film

12: nitride film 13: myth film

Claims (2)

Forming a gate oxide film on the semiconductor substrate; Forming a gate electrode having a silicon layer pattern on the gate oxide film; Forming a nitride film on the entire surface of the structure, but depositing a thicker film on the gate electrode surface than the gate oxide film; Forming an oxide film and a planarization film on the entire surface of the structure; Exposing the nitride film by removing the planarization film and the oxide film by a photolithography process using a contact mask; And removing the exposed nitride film, and then removing the gate oxide film using the nitride film as a mask to form a contact hole. The method of claim 1, The nitride film forming process is a contact hole of a semiconductor device, characterized in that the NH ₃ : SiCl ₂ H ₂ value is set to 1.5: 1 to 5: 1 value by LPCVD method, 10m Torr to 10 Torr at 700 ~ 850 ℃. Manufacturing method.