KR100346383B1 - Plasma display panel - Google Patents

Abstract

According to the invention, the front substrate; First and second electrodes formed in parallel with the inside of the front substrate; A dielectric layer formed inside the front substrate to cover the first electrode and the second electrode; A back substrate facing the front substrate; A third electrode formed on an inner surface of the rear substrate so as to be perpendicular to the first electrode and the second electrode and causing an address discharge with the second electrode; A dielectric layer formed on an inner surface of the rear substrate to cover the third electrode; Barrier ribs forming a discharge space on the dielectric layer of the rear substrate; In the plasma display panel provided with red, green, and blue phosphors applied between the barrier ribs, the third electrode extends in the longitudinal direction, and the extension only in a portion facing the second electrode. There is provided a plasma display panel having an enlarged portion enlarged in a width direction from the surface.

Description

Plasma display panel {Plasma display panel}

The present invention relates to a plasma display panel, and more particularly, to a plasma display panel in which a part of an address electrode width is extended.

In general, a plasma display panel is used to display an image using a gas discharge phenomenon, and is excellent in various display capacities such as display capacity, brightness, contrast, afterimage, viewing angle, etc. have. In such a plasma display panel, a discharge is generated in a gas between the electrodes by a direct current or an alternating voltage applied to the electrode, and the phosphor emits light by exciting the phosphor by radiation of ultraviolet rays. However, since the plasma display panel has a very high voltage for generating a gas discharge, electromagnetic waves may be generated and may have a detrimental effect on the human body.

FIG. 1 is a schematic exploded perspective view of a structure of a general AC plasma display panel.

Referring to the drawings, a first electrode 13X, which is a common electrode, and a second electrode 13Y, which is a scan electrode, are formed in pairs on an inner surface of the front glass substrate 11, and a back glass substrate is formed. A third electrode 13A, which is an address electrode, is formed on the inner surface of (12). The first electrode 13X, the second electrode 13Y, and the third electrode 13A are formed in a strip shape on the inner surfaces of the front glass substrate 11 and the back glass substrate 12, respectively, and the substrate 11, 12) cross each other at right angles when assembled. The dielectric layer 14 and the protective layer 15 are sequentially stacked on the inner surface of the front glass substrate 11. On the other hand, in the back glass substrate 12, the partition 17 is formed on the upper surface of the dielectric layer 14 ', and the cell 19 is formed by the partition 17. The cell 19 is filled with an inert gas such as argon. In addition, the phosphor 18 is applied to a predetermined portion inside the partition wall 17 forming each cell 19. Each cell 19 is coated with phosphors 18 corresponding to the pixels of red (R), green (G), and blue (B). Bus electrodes 13B are formed on the first and second electrodes 13X and 13Y.

Referring to the operation of the plasma display panel having the above configuration schematically, first, so-called trigger voltage (trigger voltage) to cause a discharge in the discharge region between the second electrode (13Y) and the third electrode (13A), which is a scan electrode A high voltage called this is applied. Discharge occurs when cations are stored in the dielectric layer 14 by the trigger voltage. When the trigger voltage exceeds the threshold voltage, the argon gas or the like charged in the cell 19 becomes a plasma state by discharge, and is stable discharge between the adjacent first electrode 13X and the second electrode 13Y. State can be maintained. In the stable discharge state, the light in the ultraviolet region collides with the phosphor 18 in the discharge light to emit light, so that each pixel formed for each cell 19 can display an image.

In the plasma display panel having the above structure, the margin of the address voltage causing the address discharge is relatively small between the third electrode 13A and the second electrode 13Y, and the third There is a problem that the voltage to be applied to the electrode 13A must be high. This is because although the address discharge is generated between the third electrode 13A and the second electrode 13Y, the third electrode 13A is opposed to the first electrode 13X and the second electrode 13Y together. This is because it is formed between the partition walls 17. In the state where the third electrode 13A is formed to face the first electrode 13X and the second electrode 13Y, the space charge and the wall charge are affected by the first electrode 13A when the address voltage is applied. As a result, the address voltage margin is reduced, and the voltage applied to the address electrode can only be increased.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a plasma display panel in which the margin of the address voltage is increased and the address voltage is reduced by improving the shape of the address electrode.

1 is a schematic exploded perspective view of a typical plasma display panel.

2 is a schematic exploded perspective view of a plasma display panel according to the present invention;

<Brief Description of Major Codes in Drawings>

11.Front glass substrate 12.Rear glass substrate

13X, 13Y, 13A, 13B. Electrode 14.14 '. Dielectric layer

17. Bulkhead 18. Phosphor

23. Third electrode 24. Longitudinal extension

25. Magnification

In order to achieve the above object, according to the present invention, a front substrate; First and second electrodes formed in parallel with the inside of the front substrate; A dielectric layer formed inside the front substrate to cover the first electrode and the second electrode; A back substrate facing the front substrate; A third electrode formed on an inner surface of the rear substrate so as to be perpendicular to the first electrode and the second electrode and causing an address discharge with the second electrode; A dielectric layer formed on an inner surface of the rear substrate to cover the third electrode; Barrier ribs forming a discharge space on the dielectric layer of the rear substrate; In the plasma display panel provided with red, green, and blue phosphors applied between the barrier ribs, the third electrode extends in the longitudinal direction, and the extension only in a portion facing the second electrode. There is provided a plasma display panel having an enlarged portion enlarged in a width direction from the surface.

According to another feature of the invention, the partition wall is disposed directly above the extension.

Hereinafter, the present invention will be described in more detail with reference to an embodiment shown in the accompanying drawings.

2 is a schematic perspective view of an embodiment of a plasma display panel according to the present invention.

Referring to the drawings, the structure of the overall panel is similar to that of the conventional panel shown in Fig. 1, and the same components are denoted by the same reference numerals.

On the inner surface of the front glass substrate 11, the first electrode 13X and the second electrode 13Y are formed in parallel in pairs in a strip shape, and the first electrode 13X and the second electrode 13Y are formed in parallel with each other. The bus electrode 13B is formed. In addition, the dielectric layer 14 covers the inner surface of the front glass substrate 11 so that the first electrode 13X, the second electrode 13Y, and the bus electrode 13B may be embedded, and a protective layer thereon. 15) are stacked.

On the inner surface of the back substrate 12, a third electrode 23 in accordance with the features of the present invention is formed. The dielectric layer 14 ′ is formed over the entire inner surface of the rear substrate 12 to fill the third electrode 23, and the partition walls 17 are formed in parallel on the dielectric layer 14 ′. . Red, green, and blue phosphors 18 are applied between the partition walls 17.

Referring to the third electrode 23 according to the features of the present invention in more detail as follows.

The third electrode 23 extends in a direction orthogonal to the first and second electrodes 13X and 13Y formed parallel to the front glass substrate 11. As can be seen from the drawing, the third electrode 23 has a relatively narrow longitudinal extension portion 25 and an enlarged portion 24 extending from the longitudinal extension portion in the width direction to have a wider width. . The longitudinal extension portion 25 is formed in a state buried in the dielectric layer 14 ′ directly below the portion where the partition wall 17 is formed, and the enlarged portion 25 has a width from the longitudinal extension portion 25. Extending in a direction to be embedded in the dielectric layer 14 ′ at a position between the barrier ribs 17. Here, the position where the enlarged portion 25 is formed should be a position facing the second electrode 13Y. That is, the enlarged part 24 is arrange | positioned so that the 2nd electrode 13Y may be located directly in the upper part.

In the plasma display panel configured as described above, the first electrode 13X is not substantially affected when the address voltage is applied. That is, the third electrode 23 is not formed at all in the portion between the partition walls 17 directly below the first electrode 13X, and only the third electrode 23 is located directly below the second electrode 13Y. The enlarged portion 24 of the () is formed to face. Therefore, when an address voltage is applied to the third electrode 23, which is an address electrode, discharge occurs between the second electrode 13Y and the third electrode 23. In this case, the influence of the first electrode 13X is not considered. Therefore, the margin of address voltage can be enlarged and set, and sufficient address discharge can be expected even if the address application voltage itself is reduced.

In the plasma display panel according to the present invention, the margin of the address voltage can be increased and the address applied voltage can be reduced by improving the shape of the third electrode which is the address electrode. Furthermore, there is an advantage that the correlation between the address electrode and the first electrode can be improved.

Although the present invention has been described with reference to one embodiment shown in the accompanying drawings, it is merely exemplary, and those skilled in the art will understand that various modifications and equivalent other embodiments are possible. Could be. Therefore, the true scope of protection of the present invention should be defined only by the appended claims.

Claims (2)

Front substrate; First and second electrodes formed in parallel with the inside of the front substrate; A dielectric layer formed inside the front substrate to cover the first electrode and the second electrode; A back substrate facing the front substrate; A third electrode formed on an inner surface of the rear substrate so as to be perpendicular to the first electrode and the second electrode and causing an address discharge with the second electrode; A dielectric layer formed on an inner surface of the rear substrate to cover the third electrode; Barrier ribs forming a discharge space on the dielectric layer of the rear substrate; 10. A plasma display panel comprising: red, green, and blue phosphors applied between the barrier ribs; And the third electrode has an extension portion extending in the longitudinal direction and an enlarged portion extending in the width direction from the extension portion only at a portion facing the second electrode. The plasma display panel of claim 1, wherein the partition wall is disposed directly above the extension part.