KR100296382B1 - Method for fabricating planar lightwave optical module - Google Patents
Method for fabricating planar lightwave optical module Download PDFInfo
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- KR100296382B1 KR100296382B1 KR1019990014882A KR19990014882A KR100296382B1 KR 100296382 B1 KR100296382 B1 KR 100296382B1 KR 1019990014882 A KR1019990014882 A KR 1019990014882A KR 19990014882 A KR19990014882 A KR 19990014882A KR 100296382 B1 KR100296382 B1 KR 100296382B1
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
- G02B6/136—Integrated optical circuits characterised by the manufacturing method by etching
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
- G02B6/132—Integrated optical circuits characterised by the manufacturing method by deposition of thin films
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4292—Coupling light guides with opto-electronic elements the light guide being disconnectable from the opto-electronic element, e.g. mutually self aligning arrangements
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12166—Manufacturing methods
- G02B2006/12176—Etching
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12166—Manufacturing methods
- G02B2006/12192—Splicing
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- Optical Integrated Circuits (AREA)
- Optical Couplings Of Light Guides (AREA)
Abstract
본 발명은 평면도파로형 광회로에 광전자기기를 집적시켜 하나의 기판상에서 광 및 전기적 처리기능을 동시에 수행할 수 있는 광모듈 제작방법에 관한 것으로, 이러한 광모듈 제작방법은 평면도파로형 광회로에 광전자기기를 집적시켜 하나의 기판상에서 광 및 전기적 처리기능을 동시에 수행할 수 있는 광모듈 제작방법에 있어서, (a)하부클래딩층과 코아층이 형성된 기판에 상기 광전자기기를 집적할 수 있도록 코아층의 일부를 식각하는 단계; (b)코아층이 식각된 부분에 식각정지막을 증착시키는 단계; (c)식각된 코아층위에 상부클래딩층을 증착하는 단계; (d)상부클래딩층의 일부를 식각정지막까지 식각하는 단계; 및 (e) 식각정지막위에 상기 광전자기기를 부착하는 단계를 포함함을 특징으로 한다.The present invention relates to an optical module fabrication method capable of simultaneously performing optical and electrical processing functions on a single substrate by integrating an optoelectronic device in a planar waveguide optical circuit. The optical module fabrication method includes an optoelectronic device in a planar waveguide optical circuit. In the optical module manufacturing method that can integrate the device to perform the optical and electrical processing function on a single substrate at the same time, (a) the core layer of the core layer to integrate the optoelectronic device on the lower cladding layer and the core layer formed Etching a portion; (b) depositing an etch stop layer on the portion where the core layer is etched; (c) depositing an upper cladding layer over the etched core layer; (d) etching a portion of the upper cladding layer to an etch stop layer; And (e) attaching the optoelectronic device on the etch stop layer.
본 발명에 의하면, 실리콘기판을 테라스형태로 식각할 필요가 없고 평면화 공정도 불필요하다. 또한 높이 조절막의 증착도 필요가 없다. 식각정지막을 하부클래딩 실리카막위에 증착하기 때문에 별도의 절연막도 필요하지 않다. 결국 평면도파로형 광모듈의 제작시간을 단축시키고 원가절감의 효과가 있다.According to the present invention, the silicon substrate does not need to be etched in the form of a terrace, and the planarization step is also unnecessary. In addition, no deposition of the height adjustment film is required. Since the etch stop film is deposited on the lower cladding silica film, a separate insulating film is not required. As a result, the manufacturing time of the planar waveguide optical module is shortened and the cost is reduced.
Description
본 발명은 평면도파로형 광회로에 광전자 부품을 집적시키기 위한 광모듈 제작방법에 관한 것으로, 특히 식각정지막을 이용하여 식각된 평면도파로형 광회로에 광전자 부품을 집적시키기 위한 평면도파로형 광모듈 제작방법에 관한 것이다.The present invention relates to an optical module manufacturing method for integrating optoelectronic components in a planar waveguide optical circuit, and more particularly, to a planar waveguide optical module manufacturing method for integrating optoelectronic components in an etched planar waveguide optical circuit using an etch stop film. It is about.
평면도파로형 광회로(Planar Lightwave Circuit:이하 PLC)는 광파장분할기나 광커플러(Optical Coupler)등 광기기 분야에 응용된다. 최근에는 레이저(laser)나 광감지기(photodetector) 등 광전자디바이스(Optoelectronic Device)나, 광수신기 같은 광전자회로(OEIC:Optoelectronic Integrated Circuit)를 집적시켜 포함함으로써 하나의 기판상에서 광 및 전기적 처리기능을 동시에 수행할 수 있는광모듈(Optical Module)형태로도 적용되고 있다. 이러한 광모듈은 PLC 플랫폼(platform) 위에 광전자디바이스를 집적시키게 되는데 플립칩결합(flip-chip bonding) 같은 하이브리드 집적기술(hybrid integration)을 주로 이용한다.Planar Lightwave Circuit (PLC) is applied to optical devices such as optical splitter or optical coupler. Recently, optical and electrical processing functions are simultaneously performed on a single substrate by integrating an optoelectronic device such as a laser or a photodetector or an optoelectronic integrated circuit (OEIC) such as an optical receiver. It is also applied in the form of an optical module. Such an optical module integrates optoelectronic devices on a PLC platform, and mainly uses hybrid integration technology such as flip-chip bonding.
광모듈의 하이브리드 집적기술은 실리콘 기판위에 실리카 도파로가 제작된 PLC 플랫폼과 광전자기기를 각각 제작후 땜납(solder)을 이용해 결합시키는 기술이다. 이때 광전자기기는 디바이스가 제작된 면이 실리콘 기판쪽으로 부착이 되는 플립칩 결합방법을 이용한다. 실리콘 기판은 광전자기기의 부착시 실리카도파로의 코아와의 정렬을 돕기위해 테라스(Terrace)형태로 제작되어 있고 광전자기기와 기판사이에 절연을 위해 얇은 실리카막을 설치한다.Hybrid module technology of optical module is a technology that combines PLC platform and optoelectronic device with silica waveguide on silicon substrate and then solder using solder. At this time, the optoelectronic device uses a flip chip coupling method in which the surface on which the device is manufactured is attached to the silicon substrate. The silicon substrate is manufactured in the form of a terrace to help align the core of the silica waveguide when attaching the optoelectronic device, and a thin silica film is installed for insulation between the optoelectronic device and the substrate.
도 1a 내지 도 1j는 종래의 기술에 따른 평면도파로형 광회로에 광전자 부품을 집적시키기 위한 광모듈의 제작방법을 도시한 것이다.1A to 1J illustrate a manufacturing method of an optical module for integrating an optoelectronic component into a planar waveguide optical circuit according to the related art.
실리콘 기판(110)을 우선 테라스형태로 식각한 뒤(도 1a) 실리카 하부클래딩 층(120)을 증착시킨 뒤(도 1b) 래핑(lapping)공정으로 평면화 시킨다(도 1c). 그 뒤 높이를 조절하기 위한 실리카막(150)과 코아층(130)을 증착시킨다(도 1d). 그 뒤 코아층(130)을 식각하여 광도파로를 형성한 뒤(도 1e) 상부클래딩층(140)을 증착시킨다(도 1f). 그 뒤 광전자기기를 부착시키게 되는 플랫폼 부분의 실리카 막(150)을 제거하고(도 1g), 절연용 실리카 막(160)을 증착시킨다(도 1h). 땜납(170)을 증착시켜 원하는 패턴으로 제작한 뒤(도 1i) 광전자기기(180)를 플립 칩 본딩과정을 거쳐 부착시켜 광모듈을 완성시킨다.The silicon substrate 110 is first etched into a terrace (FIG. 1A), and then the silica bottom cladding layer 120 is deposited (FIG. 1B) and then planarized by a lapping process (FIG. 1C). Thereafter, a silica film 150 and a core layer 130 are deposited to adjust the height (FIG. 1D). Thereafter, the core layer 130 is etched to form an optical waveguide (FIG. 1E), and then the upper cladding layer 140 is deposited (FIG. 1F). Then, the silica film 150 of the platform portion to which the optoelectronic device is attached is removed (FIG. 1G), and the insulating silica film 160 is deposited (FIG. 1H). After depositing the solder 170 to produce a desired pattern (FIG. 1i), the optoelectronic device 180 is attached through a flip chip bonding process to complete the optical module.
이와 같은 기술은 공정프로세스가 복잡하고 오랜시간이 걸리는 단점이 있다.우선 실리카 기판(110)을 테라스 형태로 식각해야 하고 코아층(130)과 하부클래딩층(120)을 증착공정사이에 평면화 공정(도 1c)을 거쳐야 된다. 코아층(130) 밑에는 높이조절막(150)을 증착시켜서 코아층(130)과 테라스의 높이를 적절한 차이로 조절해야 광전자기기(180)의 출력부분과 광도파로의 코아층(130)의 수직 정렬이 가능하다. 또한 실리콘 기판(110)과 광전자기기(180)사이에 절연을 위해 실리카막(160)을 따로 증착시켜야 한다. 이런 공정들은 실리콘 플랫폼 제작을 어렵게 하고 제작 생산성을 저하시킨다.This technique has a disadvantage in that the process process is complicated and takes a long time. First, the silica substrate 110 must be etched in a terrace form, and the core layer 130 and the lower cladding layer 120 are planarized between deposition processes. 1c). The height adjustment layer 150 is deposited below the core layer 130 to adjust the height of the core layer 130 and the terrace to an appropriate difference, so that the vertical portion of the output portion of the optoelectronic device 180 and the core layer 130 of the optical waveguide. Sorting is possible. In addition, the silica film 160 must be separately deposited for insulation between the silicon substrate 110 and the optoelectronic device 180. These processes make the silicon platform difficult and reduce production productivity.
본 발명이 이루고자하는 과제는 공정에서 식각정지막(etch-stop layer)을 이용하여 종래기술에서 실리콘 기판을 테라스형태로 식각해야하는 공정을 제거해 공정프로세서를 최소화하고 제작시간을 단축시켜 생산성을 향상시키는 평면도파로형 광모듈 제작방법을 제공함에 있다.The problem to be achieved by the present invention is to eliminate the process of etching the silicon substrate in the form of a terrace in the prior art using an etch-stop layer in the process to minimize the process processor and shorten the manufacturing time to improve productivity The present invention provides a method for manufacturing a waveguide optical module.
도 1a 내지 도 1j는 종래의 기술에 따른 평면도파로형 광회로에 광전자 부품을 집적시키기 위한 광모듈의 제작방법을 도시한 것이다.1A to 1J illustrate a manufacturing method of an optical module for integrating an optoelectronic component into a planar waveguide optical circuit according to the related art.
도 2a 내지 도 2g는 본 발명에 따른 평면도파로형 광회로에 광전자 부품을 집적시키기 위한 광모듈의 제작방법을 도시한 것이다.2A to 2G illustrate a manufacturing method of an optical module for integrating an optoelectronic component in a planar waveguide optical circuit according to the present invention.
상기 기술적 과제를 해결하기 위한, 본 발명에 의한 평면도파로형 광모듈 제작방법은 평면도파로형 광회로에 광전자기기를 집적시켜 하나의 기판상에서 광 및 전기적 처리기능을 동시에 수행할 수 있는 광모듈 제작방법에 있어서, (a)하부클래딩층과 코아층이 형성된 기판에 상기 광전자기기를 집적할 수 있도록 코아층의 일부를 식각하는 단계; (b)상기 코아층이 식각된 부분에 식각정지막을 증착시키는 단계; (c)상기 식각된 코아층위에 상부클래딩층을 증착하는 단계; (d)상기 상부클래딩층의 일부를 식각정지막까지 식각하는 단계; 및 (e)상기 식각정지막위에 상기 광전자기기를 부착하는 단계를 포함함을 특징으로 한다.In order to solve the above technical problem, the method for manufacturing a planar waveguide optical module according to the present invention integrates an optoelectronic device in a planar waveguide optical circuit and simultaneously performs optical and electrical processing functions on a single substrate. A method comprising: (a) etching a portion of a core layer to integrate the optoelectronic device on a substrate having a lower cladding layer and a core layer; (b) depositing an etch stop layer on the core layer; (c) depositing an upper cladding layer on the etched core layer; (d) etching a portion of the upper cladding layer to an etch stop layer; And (e) attaching the optoelectronic device on the etch stop layer.
이하 도면을 참조하여 본 발명을 상세히 설명하기로 한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
도 2a 내지 도 2g는 본 발명에 의한 실리카 평면도파로형 광 모듈의 제작과정을 도시한 것이다. 종래의 기술과는 달리 테라스 형태로 제작되지 않은 평평한 기판위(210)에 하부클래딩층(220)과 코아층(230)을 증착한다(도 2a). 하부클래딩층(220)과 코아층(230)은 실리카막으로 증착한다. 실리카막증착은 기존의 화염 가수분해 증착(flame hydrolysis deposition;FHD), 상압 화학기상 증착(atmospheric pressure chemical vapor deposition;APCVD), 플라즈마 강화 화학기상 증착(plasma enhanced chemical vapor deposition:PECVD) 등 여러 가지 방법을 이용할 수 있다.2A to 2G illustrate a manufacturing process of the silica planar waveguide optical module according to the present invention. Unlike the prior art, the lower cladding layer 220 and the core layer 230 are deposited on a flat substrate 210 that is not manufactured in a terrace form (FIG. 2A). The lower cladding layer 220 and the core layer 230 are deposited by a silica film. Silica film deposition has many methods, including conventional flame hydrolysis deposition (FHD), atmospheric pressure chemical vapor deposition (APCVD), and plasma enhanced chemical vapor deposition (PECVD). Can be used.
기판(210)위에 광전자기기의 출력부분이 코아층(230)과 수직정렬이 되게 접착하기 위하여 기판(210)에 증착된 하부클래딩층(220)과 코아층(230)을 소정부분 식각한다(도 2b). 식각된 하부클래딩층(220)에 식각정지막(250)을 증착시켜 패턴을 한다(도 2c). 식각정지막(250)은 실리카와 식각선택비가 높고, 상부클래딩층(240)을 증착시 산화되거나 부식되지 않는 물질로 한다. 식각정지막(250)은 크롬(Cr), 텅스텐 실리사이드(Tungsten silicide:WSi), 실리콘, 티타늄(Titanium:Ti) 등을 이용할 수 있다.The lower cladding layer 220 and the core layer 230 deposited on the substrate 210 are etched in a predetermined portion so that the output portion of the optoelectronic device is vertically aligned with the core layer 230 on the substrate 210 (FIG. 2b). The etch stop layer 250 is deposited on the etched lower cladding layer 220 to form a pattern (FIG. 2C). The etch stop layer 250 has a high etch selectivity with silica and is made of a material that is not oxidized or corroded when the upper cladding layer 240 is deposited. The etch stop layer 250 may use chromium (Cr), tungsten silicide (WSi), silicon, titanium (Ti), or the like.
식각된 하부클래딩층(220)과 코아층(230)위에 상부클래딩층(240)을 증착시킨다(도 2d). 광전자기기가 조립되는 부분을 덮고 있는 상부클래딩층(240)을 식각정지막(250)까지 제거한다(도 2e). 식각정지막(250)위에 땜납(260)을 증착시킨다(도2f). 광전자기기(270)를 플립 칩 본딩과정을 거쳐 땜납(260)위에 부착시켜 광모듈제작을 완성한다(도 2g).The upper cladding layer 240 is deposited on the etched lower cladding layer 220 and the core layer 230 (FIG. 2D). The upper cladding layer 240 covering the portion where the optoelectronic device is assembled is removed to the etch stop layer 250 (FIG. 2E). Solder 260 is deposited on the etch stop film 250 (FIG. 2F). The optoelectronic device 270 is attached onto the solder 260 through a flip chip bonding process to complete the optical module manufacturing (FIG. 2G).
광전자기기(270)는 레이저 다이오드(LD), 광검출기(photodetector), 광 변조기(optical modulator), 광 증폭기(optical amplifier) 등을 부착시킬 수 있다.The optoelectronic device 270 may attach a laser diode LD, a photodetector, an optical modulator, an optical amplifier, or the like.
본 발명에서는 광전자기기(270)와 광도파로 코아층(230)의 수동정렬을 기존의 실리콘 테라스 형식 대신 식각정지막(250)을 이용하여 구현하였다. 코아층(230)의 두께는 증착시 설정할 수 있으므로 식각의 깊이를 조절하여 식각정지막(250)의 위치를 정확히 설정할 수 있다. 상부클래딩층(240)의 제거시 식각이 식각정지막(250)에서 정지하게 됨으로 광전자기기(270) 조립시 광도파로의 코아막(230)과 수직정렬이 자동적으로 이루워지도록 한다. 또한 식각정지막(250) 증착시 식각된 도파로 패턴과 수평으로 정렬하여 정렬표시(alignment marks)를 제작하면 광전자기기(270) 조립시 정렬표시를 이용하여 수평정렬을 한다.In the present invention, the passive alignment of the optoelectronic device 270 and the optical waveguide core layer 230 is implemented using the etch stop layer 250 instead of the conventional silicon terrace type. Since the thickness of the core layer 230 may be set during deposition, the position of the etch stop layer 250 may be accurately set by adjusting the depth of etching. When the upper cladding layer 240 is removed, the etch stops at the etch stop layer 250, so that vertical alignment with the core layer 230 of the optical waveguide is automatically performed when the optoelectronic device 270 is assembled. In addition, when the etch stop layer 250 is deposited, the alignment marks are horizontally aligned with the etched waveguide pattern, and when the etch stop layer 250 is manufactured, the alignment marks are horizontally aligned using the alignment marks when the optoelectronic device 270 is assembled.
본 발명에 의하면, 실리콘 기판을 테라스형태로 식각할 필요가 없고 평면화 공정도 불필요하다. 또한 높이 조절막의 증착도 필요가 없다. 식각정지막을 하부클래딩 실리카막위에 증착하기 때문에 별도의 절연막도 필요하지 않다. 결국 평면도파로형 광모듈의 제작시간을 단축시키고 원가절감의 효과가 있다.According to the present invention, there is no need to etch the silicon substrate in the form of a terrace, and the planarization step is also unnecessary. In addition, no deposition of the height adjustment film is required. Since the etch stop film is deposited on the lower cladding silica film, a separate insulating film is not required. As a result, the manufacturing time of the planar waveguide optical module is shortened and the cost is reduced.
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WO2012047687A2 (en) * | 2010-10-07 | 2012-04-12 | Alcatel Lucent | Optical transmitter with flip-chip mounted laser or integrated arrayed waveguide grating wavelenth division multiplexer |
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JPH1048449A (en) * | 1996-07-31 | 1998-02-20 | Nippon Telegr & Teleph Corp <Ntt> | Method for manufacturing mounting substrate for hybrid optoelectronic integration |
JPH10319280A (en) * | 1997-05-19 | 1998-12-04 | Nec Corp | Optical module and its manufacture |
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JPH08179169A (en) * | 1994-12-22 | 1996-07-12 | Hitachi Ltd | Bidirectional optical module |
JPH1048449A (en) * | 1996-07-31 | 1998-02-20 | Nippon Telegr & Teleph Corp <Ntt> | Method for manufacturing mounting substrate for hybrid optoelectronic integration |
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