KR100277680B1 - Improved LGI Power Devices - Google Patents

Abstract

The present invention is to provide an improved LIGBT power device that can completely prevent the latch-up, and suppress the occurrence of a negative resistance (snapback) phenomenon, for this purpose, the LIGBT power device of the present invention, a semiconductor having a drift region layer; A cathode diffusion region and an anode diffusion region formed to be separated from each other in a predetermined region below the surface of the semiconductor layer; A well region formed in the semiconductor layer below the cathode diffusion region; A buffer region formed in the semiconductor layer in a shape surrounding the anode diffusion region and having a higher doping concentration than the drift region; A first gate forming a channel perpendicular to the well region in order to transfer the first carrier emitted from the cathode diffusion region to the anode diffusion region through the bulk of the semiconductor substrate; And to transfer a second carrier emitted from the anode diffusion region to the cathode diffusion region through a lower surface of the semiconductor substrate, and to cause a voltage drop in the drift region, adjacent to the buffer region and the buffer region. And a second gate forming a horizontal channel in the drift region.

Description

Improved LGI Power Devices

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to LIGBT (Lateral Insulated Gate Bipolar Transistor) power devices for use in stepper motors, FEDs, and PDP drive ICs.

As is well known, LIGBT power devices have a small forward voltage drop, while the switching speed is slow and inherently one with a cylist structure: P ⁺ anode, n-drift region, p-well, and n + cathode. There is a disadvantage in that parasitic cylists are formed. Recently, in order to compensate for such device characteristics, LIGBT power devices having a shorted anode (LIGBT) (hereinafter referred to as "SA-LIGBT") power device and a thin trench type cathode have been proposed.

1 is a cross-sectional view showing the structure of a conventional SA-LIGBT power device. Referring to FIG. 1, in the conventional SA-LIGBT power device, an n-epitaxial layer (n) is formed in which a buried oxide film is formed on a p-substrate (p-sub. A silicon on insulator (SOI) substrate is used. n ⁺ cathode is formed in a p-well formed in a portion of the n-epi layer (n-epi), the shorted p ⁺ / n ⁺ anode is the other of the n-epi layer (n-epi) It is formed in the n-buffer area (n-buff) formed in the partial region. Of course, the n ⁺ cathode and p ⁺ / n ⁺ anode are isolated by field oxide.

As can be seen in the configuration described above, the holes (Hole) emitted to the p ⁺ anode reaches the p-well through the n-buffer region and the n-drift region, and the electrons emitted from the n ⁺ cathode (Electron ) Is transferred along the substrate surface to the p ⁺ anode by a gate. In this case, the breakdown resistance in the vertical direction may be determined according to the thickness, the impurity concentration of the drift region, and the impurity concentration of the buffer region, and the breakdown voltage value in the horizontal direction may be determined according to the distance from the cathode of the device to the anode. Therefore, the SA-LIGBT uses the conductivity modulation characteristic of the LIGBT in the forward operation and the fast operation characteristic of the LDMOS during the switching operation.

However, in the conventional SA-LIGBT power device, if the voltage drop occurs due to the resistance of the p-well, the parasitic thyristor is generated when this value is higher than the turn-on voltage of the n ⁺ / p-well junction. In addition, by shorting the anode in the anode area, the device can be turned off quickly, while the forward voltage drop is increased due to the decrease of the current amplification factor α _pnp , and the negative current resistance characteristics of the current voltage is changed by the change of the current conductivity during the forward operation. Snapback) area. In addition, the negative resistance region of the SA-LIGBT is often generated near the operating region of the device, and thus, the stable operation of the device is inhibited, which causes a serious problem.

In addition, a conventional SA-LIGBT power device having a thin trench type cathode in order to focus on preventing latch-up does not completely prevent latch-up, and a short n + region is formed on the cathode side. There are many problems in the process such as forming.

The present invention has been made to solve the above problems, and an object thereof is to provide an improved LIGBT power device that can completely prevent latch-up.

Another object of the present invention is to provide an improved LIGBT power device that suppresses the occurrence of negative resistance (snapback) phenomenon.

1 is a cross-sectional view showing a conventional LIGBT power device structure.

2 is a cross-sectional view showing the structure of a LIGBT power device according to an embodiment of the present invention.

3A to 3F are cross-sectional views illustrating a method of manufacturing a LIGBT power device according to an embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

201: p-substrate 202: investment insulating film

203: n-epi layer 204: p-well

205: p ⁺ diffusion region of the cathode 206: n ⁺ diffusion region of the cathode

207 n-buffer region 208 p ⁺ diffusion region of anode

209: n ⁺ diffusion region of the anode 210: field oxide film

211: main gate 212: main gate insulating film

213: subgate 214: subgate insulating film

LIGBT power device of the present invention for achieving the above object, the semiconductor layer having a drift region; A cathode diffusion region and an anode diffusion region formed to be separated from each other in a predetermined region below the surface of the semiconductor layer; A well region formed in the semiconductor layer below the cathode diffusion region; A buffer region formed in the semiconductor layer in a shape surrounding the anode diffusion region and having a higher doping concentration than the drift region; A first gate forming a channel perpendicular to the well region in order to transfer the first carrier emitted from the cathode diffusion region to the anode diffusion region through the bulk of the semiconductor substrate; And to transfer a second carrier emitted from the anode diffusion region to the cathode diffusion region through a lower surface of the semiconductor substrate, and to cause a voltage drop in the drift region, adjacent to the buffer region and the buffer region. And a second gate forming a horizontal channel in the drift region.

Preferably, the cathode diffusion region and the anode diffusion region include short-circuited first conductive type and second conductive type diffusion regions, respectively, wherein the first gate is a first conductive type diffusion of the cathode. And a trench type gate disposed to be in contact with a region and the well region and a gate insulating layer, wherein the second gate has its one side edge aligned with a second conductive diffusion region of the anode, and the buffer And a stacked gate disposed to be in contact with a region and the drift region and a gate insulating layer.

Preferably, the first carrier is electrons, the second carrier is a hole, the first conductive diffusion region is p ⁺ diffusion region, the second conductive diffusion region is n ⁺ diffusion region, When the well region is a p-well and the semiconductor layer is n-type, the electrons are emitted from the n ⁺ diffusion region of the cathode and sequentially through the p-well, the drift region and the buffer region Characterized in that it is introduced into the p ⁺ diffusion region of the anode, the hole is discharged from the p ⁺ diffusion region of the anode is introduced into the p ⁺ diffusion region of the cathode via the channel formed by the second gate. It features.

Preferably, the semiconductor layer may be formed of an epitaxial layer grown on a semiconductor substrate through a buried insulating film, and the cathode diffusion region and the anode diffusion region may be separated from each other by an isolation layer. .

By the configuration as described above, the present invention has the following characteristic effects.

First, electrons emitted from the cathode flow through the trench channel formed in the well region to the anode, while holes emitted from the anode flow directly to the cathode along the surface of the drift region without passing through the well region, so that parasitic cylist does not occur. Do not. That is, the latch up can be prevented. In addition, the inflow of holes toward the cathode by the subgate is much higher.

Second, the snapback phenomenon occurring in SA-LIGBT has generally been attempted to suppress this by using a method of increasing the voltage drop at the bottom of the p + anode. However, since the resistivity of the n-buffer region is low in a device using a conventionally used reduced surface field (RESURF), the suppression of snapback is not effectively achieved by the conventional method. Therefore, as in the present invention, when the subgate is formed, the p + cathode is connected to the n-drift region through the subgate, resulting in voltage drop not only in the n-buffer region having a low sheet resistance but also in the n-drift region having a very high sheet resistance. As a result, conductivity modulation can easily occur even at low anode voltages, greatly reducing snapback.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

FIG. 2 is a cross-sectional view illustrating a structure of a LIGBT power device according to an embodiment of the present invention. Referring to FIG.

An n-epi layer (n-epi) 203 is epitaxially grown on the p-substrate (p-sub) 201 via a buried insulating film 202 (usually an oxide film is used). This n-epi layer 203 provides the n-drift region (n-driff) of LIGBT. The n-drift region (n-driff) may be formed separately by ion implantation into the n-epi layer 203. A p-well 204 is formed in a portion of the n-epi layer 203, and p ⁺ diffusion regions 205 and n ⁺ diffusion regions (shorted to each other) are formed in the p-well 204. The cathode is constituted by 206. Here, to p ⁺ diffusion region 205 can be introduced to the hole without passing through the p- well 204, a p ⁺ diffusion region 205 is not be completely locked up in the p- well 204, a portion thereof ( Side) is exposed to the n-epitaxial layer 203. In another partial region of the n-epi layer 203, an n-buffer region (n-buffer) 207 having a higher impurity concentration than the n-epi layer 203 is formed, and in the n-buffer region 207 The anode is constituted by p ⁺ diffusion regions 208 and n ⁺ diffusion regions 209 shorted to each other. As in the prior art, the cathode and the anode are separated by a field oxide film (element isolation film) 210.

A trench-type main gate 211 is formed in the p-well 204 to form a channel perpendicular to the substrate, which is the electron emitted from the n ⁺ diffusion region 206 of the cathode. Is introduced into the p ⁺ diffusion region 208 of the anode via the bulk and n-buffer regions 207 of the p-well 204 and n- epi layer 203. To this end, in the present embodiment, the main gate 211 is implemented to be in contact with the cathode through the n ⁺ diffusion region 206, the p-well 204, and the gate insulating film 212.

The holes emitted from the p ⁺ diffusion region 208 of the anode enter the p ⁺ diffusion region 205 of the cathode without passing through the p-well 204 via the lower surface of the n- epi layer 203. A stacked sub gate 213 is formed on the substrate on the side to form a horizontal channel with the substrate. The sub gate 213 is arranged to cause a voltage drop in both the n-buffer region 207 and the n-drift region 203. For this purpose, the sub gate 213 is formed in the anode ⁺ p ⁺ diffusion region 208. The sub gate 213 is configured so that one edge of the substrate is aligned and is in contact with the n-buffer region 207, the n-drift region 203, and the gate insulating film 214.

The operation of FIG. 2 having the structure as described above will be described in detail.

Referring to FIG. 2, since the channel is formed in the p-well 204 perpendicular to the substrate by the trench-type main gate 211, electrons emitted from the n ⁺ diffusion region 206 of the cathode are formed in the p- epi layer. Holes through the bulk of (203) into the p ⁺ diffusion region 208 of the anode, while holes emitted from the p ⁺ diffusion region 208 of the anode by the subgate 213 are transferred to the p-wells below the substrate surface. Without going through 204, it flows directly into the p ⁺ diffusion region 205 of the cathode. After all, no parasitic cylist occurs. That is, the latch up can be prevented. In addition, in the sub-gate 213 formed on the anode side, holes quickly and well flow into the p ⁺ diffusion region 205 of the cathode.

Further, when the sub gate 213 is formed on the anode side, the p ⁺ diffusion region 205 of the cathode is connected to the n-drift region 203 under the sub gate 213, resulting in an n-buffer region having a low sheet resistance ( Since the voltage drop can be obtained not only in 207 but also in the n-drift region 203 where the sheet resistance is very high, conductivity modulation easily occurs even when the anode voltage is low, thereby greatly reducing the negative resistance (snapback) phenomenon.

3A to 3F are cross-sectional views illustrating a method of manufacturing a LIGBT power device according to an embodiment of the present invention.

First, as shown in FIG. 3A, the n-epi layer 3 of the n-drift region having a high resistivity is formed on the p-substrate 1 and the buried oxide film 2, and then the n-buffer region 4 thereon. ).

Next, as shown in FIG. 3B, a p-well 5 is formed on the cathode side, and a trench 6 is formed in a portion where a main gate is to be formed through a mask and an etching process. At this time, etching is performed by dry etching, and a mixture of Hbr / SiF ₄ / HeO ₂ is used as an etching gas.

Then, in order to improve the substrate surface of the trench portion damaged during etching as shown in FIG. 3C, after the thermal oxidation process, a so-called sacrificial oxidation process is removed. And then doped polysilicon is deposited and patterned to form the main gate 8 in the trench.

Subsequently, the field oxide film 9 is grown, as shown in FIG. 3D, and then the oxide film 10 and the polysilicon film are formed and patterned to form a subgate 11 on the anode side.

Next, as shown in FIG. 3E, each of the p ⁺ diffusion regions and the n ⁺ diffusion regions of the anode and the cathode are formed by ion implantation, the interlayer insulating layer 12 is deposited, and then contact holes are formed by a contact mask and an etching process.

Finally, as illustrated in FIG. 3F, metal electrodes 15 contacting the main gate 8, the cathode, the anode, and the sub gate 11 are formed.

As described above, it can be seen that the LIGBT power device of the present invention having the structure of FIG. 2 can be easily formed by conventional CMOS integrated circuit technology.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention proposes a LIGBT power device structure that reduces parasitic silist phenomena and negative resistance regions, which are caused by problems in the conventional SA-LIGBT structure. The LIGBT power device of the present invention can reduce the latch-up phenomenon and obtain a forward voltage drop at a low voltage and a low current density, thereby greatly reducing the negative resistance (snapback) region generated during the LIGBT operation. Bring a device with

Claims (7)

In the LIGBT power device, A semiconductor layer having a drift region; A cathode diffusion region and an anode diffusion region formed to be separated from each other in a predetermined region below the surface of the semiconductor layer; A well region formed in the semiconductor layer below the cathode diffusion region; A buffer region formed in the semiconductor layer in a shape surrounding the anode diffusion region and having a higher doping concentration than the drift region; A first gate forming a channel perpendicular to the well region in order to transfer the first carrier emitted from the cathode diffusion region to the anode diffusion region through the bulk of the semiconductor substrate; To transfer the second carrier emitted from the anode diffusion region to the cathode diffusion region through a lower surface of the semiconductor substrate, and to cause a voltage drop in the drift region, the buffer region and the buffer region adjacent to the buffer region. Second gate forming a horizontal channel in the drift region LIGBT power device comprising a. The method of claim 1, And the cathode diffusion region and the anode diffusion region include short-circuited first and second conductive diffusion regions, respectively. The method of claim 2, And the first gate is formed of a trench type gate disposed to be in contact with a first conductive diffusion region of the cathode and the well region and a gate insulating layer. The method of claim 2, The second gate is a LIGBT, characterized in that the one side edge is aligned with the second conductive diffusion region of the anode, and the stacked gate is arranged to be in contact with the buffer region and the drift region via a gate insulating film. Power devices. The method according to any one of claims 2 to 4, The first carrier is electrons, the second carrier is a hole, the first conductive diffusion region is p ⁺ diffusion region, the second conductive diffusion region is n ⁺ diffusion region, and the well region is p − Well, LIGBT power device, characterized in that the semiconductor layer is n-type. The method of claim 5, And the electrons are emitted from the n ⁺ diffusion region of the cathode and sequentially flow into the p ⁺ diffusion region of the anode via the p-well, the drift region and the buffer region. The method of claim 5, And the hole is discharged from the p ⁺ diffusion region of the anode and introduced into the p ⁺ diffusion region of the cathode via a channel formed by the second gate.