KR100249842B1 - ADSL device for exchange and terminal - Google Patents

Abstract

The present invention relates to an ADSL device for an exchange and a terminal configured at an exchange side and a subscriber terminal side in an ATM mode or a packet mode to accommodate a subscriber using an asymmetric digital subscriber line (ADSL) in an ATM switching system. In the packet mode switch and terminal, an ADSL device having different uplink and downlink data transmission rates can be configured to provide high-speed multimedia data service in an ATM mode or packet mode switch and terminal, and connect four ADSL lines. In case of exchange, 4 subscribers can be connected per board, and it can be installed inside the exchange with simple configuration to control ADSL device or know the state of ADSL device in the exchange. To provide a variety of high-speed ATM services resistant to line noise. It can be effective.

Description

ADSL device for exchange and terminal

The present invention provides a switch and a terminal configured at an exchange side and a subscriber terminal side in an asynchronous transfer mode (ATM) mode or a packet mode to accommodate a subscriber using an asymmetric digital subscriber line (ADSL) in an ATM switching system. It relates to an ADSL device.

Conventional ADSL devices do not provide high-speed data service due to low downlink and uplink transmission rates, and in the case of exchangers, they are connected to two ADSL lines so that only one or two subscribers can be connected per board, and are mounted outside the exchanger. Direct input / output processor (SIO: Serial Input Output) and ancillary control circuits for access and control of upstream data and devices transmitting / receiving E1 data (2.048Mbps) into frame structure because they cannot be directly managed by Since the configuration is complicated, there is a problem in that the ADSL device is controlled or the status of the ADSL device is not known within the exchange.

In order to solve the above problem, the present invention configures an ADSL device having different uplink and downlink data transmission rates in an ATM mode or a packet mode switch and a terminal, and connects four ADSL lines to each of the four subscribers per board. It can be connected to the inside of the exchange with a simple configuration to control the ADSL device within the exchange or to know the status of the ADSL device. Its purpose is to provide a variety of ATM services.

1 is an ADSL device connection configuration diagram of an ATM switching system according to the present invention;

2 is a block diagram of an ADSL device for a switch and a terminal according to the present invention;

<Explanation of symbols for main parts of drawing>

10: switch network 20: ADSL subscriber matching module

21: ATM layer processing device 22: ADSL subscriber matching device

23: local clock distribution device 30: ADSL device for exchange and terminal

31: signal matching means 32: ADSL processing means

33: identification number recognition means 34: status display means

35: initialization means 36: ADSL line matching means

37: RS-232C matching means

The present invention relates to an ADSL device for an exchange and a terminal configured on an exchange side and a subscriber terminal side in an ATM mode or a packet mode to accommodate a subscriber using an asymmetric digital subscriber line (ADSL) in an ATM switching system. Signal matching means connected to a buffered TTL level signal or RS-422 standard differential signal and a TTL (Transistor Transistor Logic) level signal, and outputting the data output from the signal matching means to ADSL encoding and ADSL. ADSL processing means for framing and outputting, ADSL deframe and decoding the signal received from the line, and outputting, identification connected to the ADSL processing means and assigning a unique number of ADSL processing means through an 8-bit internal data bus. An image which is connected to the number recognition means and the ADSL processing means and displays various states as visible information. Display means, initialization means connected to the ADSL processing means for supplying an initialization signal when the power is turned on or the reset switch is pressed, and ADSL processing means connected to the ADSL processing means and the ADSL line from the overvoltage or overcurrent of the ADSL line. It consists of an ADSL line matching means for protecting and matching with the line, and RS-232C matching means connected to the ADSL processing means and connected to the debugging terminal.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

1 is an ADSL device connection configuration diagram of an ATM switching system according to the present invention.

The ADSL subscriber matching module 20 which communicates with the switch network 10 receives the synchronization signal from the ATM layer processing apparatus 21 which processes the operation maintenance function and manages the subscriber and the switch network 10 to synthesize clocks. And a local clock distribution device 23 for distributing and distributing, and an ADSL subscriber matching device 22 of 16 boards accommodating 4 ADSL subscribers per board, and having an ADSL line through an ADSL device 30 for an exchange and a terminal. Connected.

The ATM layer processor 21 communicates the differential signal serial data of 187.79 Mbps with the subscriber switch network 10 module, and transmits 16-bit data of the transmitting cell and transmit cell start indicating the start of the transmitting cell through the transmit / receive cell bus. The signal is output to the ADSL subscriber matching device 22, and when a cell reception request signal for requesting reception of a cell is input from the ADSL subscriber matching device 22, it transmits a cell reception permission signal for polling and allowing cell reception. In addition, the reception cell 16-bit data and the reception cell start signal indicating the start of the reception cell are received from the ADSL subscriber matching device 22, and if the received cell is an OAM (Operation, Administration and Maintenance) cell, the operation maintenance function is processed. And sends the response OAM cell to the ADSL subscriber. In addition, address signal, data signal, address valid signal, data valid signal, data read / write to access Dual Port Random Access Memory (DPRAM) in ADSL subscriber matching device 22 via control signal bus. Send and receive signals Then, the function alarm signal and the hernia alarm signal of the ADSL subscriber matching device 22 are received from the ADSL subscriber matching device 22.

The local clock distribution unit 23 receives the synchronization signal (46.9494 MHz) from the subscriber switch network 10 module, performs clock synthesis and division, and the main clock (23.4747 MHz) for synchronizing the clock in the module to the ATM layer processing unit 21. ) And the cell bus clock (11.7373 MHz) for synchronizing the transmit / receive cell buses, and the main clock (23.4747 MHz), the cell bus clock (11.7373 MHz) and the frame sync clock (ADSL subscriber matching device 22). 16.386MHz).

The ADSL subscriber matching device 22 receives the transmitting cell 16-bit data and the transmitting cell start signal from the ATM layer processor 21 through the transmitting / receiving cell bus, and receives the receiving cell 16-bit data and the receiving cell start signal from the ATM layer. Output to the processing apparatus 21. In addition, a cell reception request signal for requesting reception of a cell is transmitted to the ATM layer processing apparatus 21, and a cell reception permission signal is received. Through the control signal bus, an address signal, an address valid signal, a data valid signal, and a read / write signal are received from the ATM layer processor 21 to match with the dual port RAM, and data signals are transmitted and received. In addition, the function alarm signal and hernia alarm signal is sent to the ATM floor processing unit 21.

The ADSL device 30 for the exchange and the terminal is connected to the ADSL subscriber matching device 22 through the transmit / receive data, the transmit / receive data overhead, and the transmit / receive data clock of the serial data bus. 22) ADSL encoding and ADSL data are output from the four ADSL lines, and ADSL deframes and decodes the data from the ADSL line to the ADSL subscriber matching module 20.

Looking at the operation of the configuration as described above are as follows.

First, at the time of transmission, if the 187.79 Mbps differential signal serial data and the synchronization signal are output from the switch network 10, the ATM layer processing apparatus 21 converts the 187.79 Mbps differential signal serial data into 16-bit data of the transmitting cell. It is output through the transmit / receive cell bus together with the transmit cell start signal. The ADSL subscriber matching device 22 matches the data signal output from the ATM layer processing device 21 with the ADSL device for the exchange and the terminal. At this time, the local clock distribution device 23 synthesizes and divides the synchronization signal (46.9494 MHz) output from the switch network 10, and the ATM clock processor 21 main clock (23.4747) to synchronize the clock in the module. MHz) and Cellbus clock (11.7373MHz) to synchronize transmit / receive cellbus, and main clock (23.4747MHz), cellbus clock (11.7373MHz) and frame sync clock (16.386MHz) for ADSL subscriber matching devices. ). The ADSL device 30 for the exchange and the terminal ADSL-encodes and ADSL-frames the data output from the ADSL subscriber matching device 22 and outputs the four ADSL lines.

At the reception, the ADSL device 30 for the exchange and the terminal ADSL deframes and decodes the data input from the ADSL line, and outputs the ADSL subscriber matching device 22 to output the cell reception request signal to the ATM layer processing device 21. ), Receives a cell reception permission signal from the ATM layer processing apparatus 21, and receives a data signal output from the ADSL device 30 for the exchange and the terminal. The ADSL subscriber matching device 22 converts the received data into 16-bit data of the receiving cell and outputs it together with the receiving cell start signal. The ATM layer processor 21 converts the 16-bit data signal output from the ADSL subscriber matching device 22 into 187.79 Mbps differential signal serial data and outputs the serial signal to the switch network 10.

2 is a block diagram of an ADSL device for a switch and a terminal according to the present invention, which is connected to an ADSL subscriber matching device 22 of an ADSL subscriber matching module 20 through a serial data bus and an ADSL line through an ADSL frame signal. Connected.

The signal matching means 31 is connected to the ADSL subscriber matching device 22 and the ADSL processing means 32 to match signals with each other. The received data signal ARDAT, the received data overhead signal AROHM, the received data clock signal ARCLK, and the transmitted data clock signal ATCLK of the TTL (Transistor Transistor Logic) level received from the ADSL processing means 32 are used. ADSL subscriber matching device (22) by converting buffered TTL signals (RDAT, ROHM, RCLK, TCLK) or RS-422 standard differential signals (RDAT +/-, ROHM +/-, RCLK +/-, TCLK +/-) according to the application. ), And a buffered TTL level transmission data signal (TDAT), transmission data overhead signal (TOHM) or RS-422 standard transmission data signal (TDAT +/-) input from the ADSL subscriber matching device 22. The transmission data overhead signal TOHM +/- is converted into TTL level signals ATDAT and ATOHM and transmitted to the ADSL processing means 32.

ADSL processing means 32 is connected to the ADSL line matching means 36 by a tip (TIP), a ring (RING) signal, and outputs the data output from the signal matching means 31 by ADSL encoding and ADSL frame, It receives only the signal to be received from the tip and ring signals, and ADSL deframes and decodes the signal to be output to the signal matching means 31.

Identification number recognition means 33 is assigned a unique number through the internal 8-bit data bus (D7-D0), the identification number by enabling the select signal (CS1 *: Chip Select 1 ^* ) in the ADSL processing means 32 Read it.

The status display means 34 indicates the state of the ADSL processing means 32 as visible information, and indicates a normal operation state (NORM *: Normal ^* ) indicating that data transmission / reception can be normally performed, and synchronization between both ends of the ADSL line. Indicate the synchronization status (SYNC *: Synchronization ^* ), indicating that the two are identical to each other, and the quality status (QTY *: Quality ^* ), indicating that the quality of the ADSL line is good.

The initialization means 35 generates a reset signal (RST *: Reset ^* ) of about 600 milliseconds when the power is turned on or when the reset switch is pressed and supplies the ADSL processing means 32.

The ADSL line matching means 36 is connected to the ADSL processing means 32 and the ADSL line by tip and ring signals, and is composed of a transformer, an arrester, and a fuse to protect the ADSL processing means 32 from overvoltage or overcurrent through the line. .

The RS-232C matching means 37 is connected to the ADSL subscriber matching device 22 so that the ADSL processing means 32 can be connected to an external terminal alone or can be controlled inside the exchange, so that asynchronous data can be transmitted and received. The signal (TxD: Transmit Data, RxD: Receive Data) is converted into RS-232C level signals (RTxD, RRxD).

The operation of the ADSL device 30 for the exchange and the terminal configured as described above is as follows.

First, at the time of transmission, the signal matching means 31 transmits the buffered TTL level transmission data signal TDAT and the transmission data overhead signal TOHM output from the ADSL subscriber matching device 22 of the ADSL subscriber matching module 20. ) Or RS-422 standard transmission data signals (TDAT +/-) and transmission data overhead signals (TOHM +/-) are converted into TTL level signals (ATDAT, ATOHM) and output, and the ADSL processing unit 32 outputs the signals. The data output from the matching means 31 is output by ADSL encoding and ADSL encoding. At this time, the identification number recognition means 33 is connected to the ADSL processing means 32 through an internal 8-bit data bus D7-D0, assigns a unique number, and selects the signal CS1 from the ADSL processing means 32. Enable *) to read the identification number. The status display means 34 shows the state of the ADSL processing means 32 as visible information, and the normal operation state (NORM *) indicating that data transmission / reception can be normally performed, and the synchronization between both ends of the ADSL line are mutually different. It indicates the SYNC * indicating the agreement and the QTY * indicating the good quality of the ADSL line. The initialization means 35 generates a reset signal RST * of about 600 milliseconds when the power is turned on or when the reset switch is pressed and supplies the ADSL processing means 32.

ADSL line matching means 36 is connected to the ADSL processing means 32 and the ADSL line, and constitutes a transformer, an arrester, and a fuse to protect the ADSL processing means 32 from overvoltage or overcurrent through the line, and the ADSL processing means The data signal output from (32) is output to the ADSL line. And, the RS-232C matching means 37 is connected to the ADSL subscriber matching device 22 so that the ADSL processing means 32 can be connected to an external terminal alone or can be controlled inside the exchange so that asynchronous data can be transmitted and received. The TTL level signals TxD and RxD are converted into RS-232C level signals RTxD and RRxD.

Upon reception, the ADSL line matching means 36 receives the tip and ring signals from the ADSL line and outputs them to the ADSL processing means 32. The ADSL processing unit 32 receives only a signal to be received from the input signal, and outputs the ADSL deframed, decoded. In the signal matching means 31, the received data signal ARDAT of the TTL level, the received data overhead signal AROHM, the received data clock signal ARCLK, and the transmitted data clock signal ATCLK outputted from the ADSL processing means 32. ) Can be converted into buffered TTL signals (RDAT, ROHM, RCLK, TCLK) or RS-422 standard differential signals (RDAT +/-, ROHM +/-, RCLK +/-, TCLK +/-) to match ADSL subscribers. Output to ADSL subscriber matching device 22 of module 20.

Since the above-described ADSL device for the exchange and the terminal is mounted inside the exchange, it can be directly controlled or managed by the maintenance center of the exchange, and is directly connected to the ADSL subscriber matching device through the serial data bus without an additional control circuit. It is simple and can connect 4 subscribers per board by connecting to 4 ADSL lines. It provides asymmetrical data from 1Mbps to 8Mbps downwards and data from 16kbps to 800kbps upwards to provide high speed multimedia service to remote ADSL subscribers. Can be provided.

According to the present invention, by configuring an ADSL device having different uplink and downlink data rates in an ATM or packet mode switch and a terminal, a higher speed multimedia data service can be provided in an ATM mode or a packet mode switch and a terminal. Connected to ADSL line, it can connect 4 subscribers per board in case of exchange, and it can be mounted inside exchange with simple configuration to control ADSL device or know the state of ADSL device in exchange. By using copper wire, which is used as a telephone line, it is effective to provide a variety of high-speed ATM services resistant to line noise.

Claims (1)

An ADSL device for an exchange and a terminal for interconnecting an ADSL subscriber matching module and an ADSL line in an ATM switching system, Signal matching means (31) connected to the ADSL subscriber matching device (22) of the ADSL subscriber matching module (20) for matching and outputting a buffered TTL level signal or an RS-422 standard differential signal and a TTL level signal; ADSL processing means (32) for ADSL encoding and ADSL framed data output from the signal matching means (31), and for outputting ADSL deframed and decoded signals received from a line; Identification number recognition means (33) connected to said ADSL processing means (32) for recognizing a unique number of said ADSL processing means via an 8-bit internal data bus; State display means (34) connected to said ADSL processing means (32) for displaying various states as visible information; Initialization means (35) connected to the ADSL processing means (32) for supplying an initialization signal when power is turned on or when a reset switch is pressed; An ADSL line matching means (36) connected to the ADSL processing means (32) and the ADSL line to protect the ADSL processing means (32) from overvoltage or overcurrent of the ADSL line and to match the line; And an RS-232C matching means (37) connected to the ADSL processing means (32) to connect with a debugging terminal.

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