KR100223002B1 - Data rate converting device and method in digital video recorder - Google Patents

Abstract

The present invention relates to an apparatus and method for converting a data rate in a digital video recorder. When the data rate of an input program and the data rate recorded on a storage medium are different, information about a time interval between program packets received during recording is received. The data portion of the received program packet is included in the head portion and the time-divided program packet is reduced in the form of time-continuous packets, and during reproduction, the data rate of the received program packet is reduced to the data rate of the received program, and the time information between the program packets is analyzed to SUMMARY OF THE INVENTION An object of the present invention is to provide an apparatus and method for converting a data rate in digital video recording, which is time-divided and reproduced at intervals.

According to an apparatus and method for converting a data rate in a digital video recorder according to the present invention, it is possible to record and play back a program having a data rate different from the data rate recorded in the digital video recorder, so that digital satellite broadcasting and HDTV, which are to be serviced in the future, are planned. It can be applied to various types of broadcasting and other digital programs such as (High Definition TeleVision), thereby improving the competitiveness of digital video recorders for other storage media and playback devices capable of recording and playing back digital programs.

Description

Apparatus and method for converting data rate in digital video recorder

The present invention relates to a data rate conversion apparatus and method for recording a program having a different data rate into a digital video recorder, and more particularly, a program received when recording a program having a different data rate from a digital video recorder into a storage medium. The information about the time interval between packets is included in the packet head of the even-numbered sync packet, and the program packet received by time division using the data rate to be stored as a reference data rate is smoothed in the form of time continuous packets. On the other hand, the digital video recorder reproduces the time information between the program packets contained in the packet head part by analyzing the time information between the program packets contained in the packet head unit, and maintaining the original time interval. A data rate conversion apparatus and method in

Currently, the broadcasting method is a terrestrial broadcasting method in which a transmission tower transmits a broadcast program to be transmitted at a frequency allocated to each broadcasting company. However, in the terrestrial broadcasting method, an astigmatism area where viewing is not possible or an area where a broadcasting program using a specific channel cannot be watched occurs, and other problems such as collecting a fee are inevitable. In order to solve this problem, satellite broadcasting has been started in Korea. Since the satellite broadcasting transmits a broadcast program from the satellite, there is an advantage that can solve the problem of viewing fee collection at the same time by eliminating the astigmatism area existing nationwide, and through a receiver for receiving satellite broadcasting.

In particular, in addition to the above advantages, digital satellite broadcasting enables time division and transmission of other broadcast programs in one frequency band, which enables more broadcast transmissions and viewing so that viewers can obtain various information and entertainment. . In addition, the present invention may be applied to an application field for recording a program received by the digital satellite broadcasting receiver in a storage medium of a digital signal, which is expected to become more marketable in the future.

As described above, in order to transmit a program by time division on the same frequency channel, the program must be processed at a faster speed than the data rate of the actual broadcast program. do. In other words, in order to receive a program transmitted by the conventional analog satellite broadcasting method, the satellite broadcasting receiver can play and record the same processing rate, whereas in the case of a program transmitted by the digital satellite broadcasting method, the time-divided form and the data rate, etc. It must be recorded together with the program for playback.

Hereinafter, referring to FIG. 1, a data format for recording a 188 byte packet input through a digital satellite broadcasting receiver to a digital video cassette recorder (VCR) will be described as an example.

Fig. 1 shows the structure of a sync packet of a digital VHS video cassette recorder in which one packet consisting of 188 bytes is converted into two packet forms.

First, the structure of the even-numbered sync packet includes a sync unit (2 bytes) for matching the packet synchronization rule, an identification number unit (3 bytes) including a number corresponding to the packet order, and packet control as shown in FIG. 1A. Includes a main head section (2 bytes) that contains data required for the purpose, a secondary head section (1 byte) necessary for other control of the packet, a packet head section (4 bytes), and a part of data to be recorded. Packet data section (92 bytes), and an internal parity section (8 bytes) for error correction of even-numbered sync packets.

On the other hand, the structure of the odd-numbered sync packet is the same as that of the even-numbered sync packet except that packet data is included in the packet head portion of the even-numbered sync packet shown in FIG. Has

The two sync packets having the above structure are read to correct an error that may be caused by a scratch or damage to the storage medium or may be caused when writing to or reading from the storage medium. After encoding using the Solomon coding technique, shuffle the data storage order to overcome the burst-type error caused by damage that occurs mainly on the storage medium, and then match it to the tracks of the recording medium. (tracking formatting) is recorded. When the data recorded on the storage medium is reproduced, first, the form adapted to the track is reduced for recording, the mixed and stored data are collected, and then the Reed-Solomon decoding process is performed.

However, since the program data rate in the form of a bit stream received through the satellite broadcasting receiver as described above and the data rate for recording a program in a synchronous packet structure are different, the received program must be converted to the data rate of the storage medium and stored. In order to reproduce a program stored in the storage medium at the data rate of the medium, the data rate of the program received by the satellite broadcasting receiver must be reduced. In the data rate reduction, time division between program packets received by the satellite broadcasting receiver is maintained.

Accordingly, an object of the present invention is to solve such a problem, and in an environment in which the data rate of an input program and the data rate to be recorded on a storage medium are different, the time interval between program packets received at the time of recording is determined. When information is included in the packet head portion of the even-numbered sync packet, and a program packet received by time division using a data rate to be stored as a reference data rate is smoothed in the form of time-continuous packets, The apparatus for converting a data rate in a digital video recorder for reducing the data rate of the received program and analyzing the time information between the program packets included in the packet head unit, maintaining the original time interval, and performing time division and playback. And providing a method.

1A is an even-numbered sync block structure diagram of a digital VHS video cassette recorder;

1B is an odd-numbered sync block structure diagram of a digital VHS video cassette recorder;

2 is a timing diagram of an input program and an output program according to the present invention;

3 is a block diagram of a data rate conversion circuit in a digital video recorder according to the present invention;

4 is a block diagram of a packet head generator of FIG. 3;

5 is a structural diagram of a packet head part of FIG. 1;

* Explanation of symbols for main parts of the drawings

100: recording data rate conversion section 110: program selection section

120: packet head generation unit 121: primary packet head generation unit

121-1: First counter section 121-2: First initialization signal generator

122: counter initialization unit 123: secondary packet head generation unit

123-1: Second counter part 123-2: Second initialization signal generator

130: recording data rate relaxation unit 200: encoding recording unit

300: program storage unit 400: encoding decoding unit

500: regeneration data rate reduction unit 510: regeneration data rate recovery unit

520: packet head analysis unit 600: reference clock generator

An apparatus and method for converting a data rate in a digital video recorder according to the present invention for achieving the above object are to store a time different from a data rate of a digital video recorder and to reproduce a program. Included in the packet head portion, the data rate is smoothed and recorded at the data rate of the digital video recorder to enable digital video recorder storage of programs having different data rates, and the packet head portion is interpreted and recorded on the storage medium. The program can be reproduced from a digital video recorder by reducing the data rate and the time interval between packets before the recorded program is recorded.

An apparatus for converting a data rate in a digital video recorder for receiving and recording satellite broadcast programs according to the present invention will be described with reference to FIG.

The apparatus for converting a data rate in a digital video recorder for receiving and recording satellite broadcast programs according to the present invention selects a program to be stored and reproduced from a bit stream type program input from the satellite broadcast receiver 10, A recording data rate converter 100 for converting the data rate into a data rate for writing to the storage medium by using a reference clock, and program data inputted from the record data rate converter 100 to the storage medium. A coded recording unit 200 to store, a program storage unit 300 in which a program is recorded by the coded recording unit 200, and a program recorded from the program storage unit 300. Coding decoder 400 for reducing to the form before it is encoded by the reference) and the reference clock for transmitting to the satellite broadcasting receiver 10 The data rate reduction unit 500 for reducing the clock of the program to a data rate suitable for the satellite broadcasting receiver 10, and the recording data rate conversion unit 100 and the data rate reduction unit 500 The reference clock generator 600 generates a reference clock necessary for changing the clock.

The recording data rate converter 100 may include a program selector 110 for selecting only a program to be received from a bit stream type program input from the satellite broadcast receiver 10, and the program selector 110 selected from the program. A packet head generator 120 generating a clock control signal to provide a clock necessary for program storage using a program and a reference clock generated by the reference clock generator 600, and the packet head generator 120 And a write data rate mitigation unit 100 for receiving a clock control signal from the program selector 110 to convert the data rate of the program selected by the program selector 110 to output the converted program to the encoded recording unit 200.

The packet head generator 120 receives a reference clock generated by the reference clock generator 600 to perform up counting of 225,000 times to output some data (18 bits) of the packet head shown in FIG. 1. A primary packet head generation unit 121 for generating an enable signal E1 indicating that counting is completed, and an enable signal E1 generated from the primary packet head generation unit 121 and an external device. A counter initialization unit 122 for receiving the six-track initialization signal of the controller and initializing the primary packet head generation unit 121 and an enable signal from the primary packet head generation unit 121 and enabling the reference clock signal; The secondary clock generator 123 generates up to 12 counts of the reference clock generated by the generator 600 as a counting clock to generate the remaining data (4 bits) of the packet head.

The primary packet head generator 121 is initialized by using the initialization signal from the counter initializer 122, and is counted up to a reference clock generated by the reference clock generator 600 to be used for the 18-bit packet head. The first counter unit 121-1 generating the output and the 18-bit output of the first counter unit 121-1 so as to count the 225,000 times of the first counter unit 121-1 are received and compared with 225,000. And the first initialization signal generator 121-2 for generating the enable signal at the same time point.

The secondary head generator 123 may include a second counter unit 123-1 which up-counts the reference clock generated by the reference clock generator 600 to generate a 4-bit output used for the packet head, and The second counter unit 123-1 receives the 4-bit output of the first counter unit 123-1 so that the second counter unit 123-1 counts 12 times, and compares the 12 bit counter with the second counter unit 123-1. And a second initialization signal generator 123-2 which generates an initialization signal E2 for initialization.

The data rate reduction unit 500 receives a program having a data rate suitable for recording from the encoding decoder 400 and restores the data rate recovery unit to reduce the data rate required for transmission to the satellite broadcasting receiver 10. 510 and a packet head analyzer 520 for analyzing a clock control signal included in a program received from the reproduction data rate recovery unit 510 using a reference clock generated by the reference clock generator 600. It consists of.

Hereinafter, a schematic operation of a data rate conversion apparatus in a digital VHS video cassette recorder will be described with reference to FIGS. 2 and 3.

First, the satellite broadcast receiver 10 receives a plurality of programs in time division according to the amount of data as shown in P1 of the timing diagram of FIG. 2. For example, to record the program A, the program selecting unit 110 selects only the packet corresponding to the program A. As a result, as shown in P2 of FIG. 2, the remaining programs are deleted and packets constituting the program A are separated by an inconsistent time interval and input to the packet head generating unit 120.

Subsequently, the packet head generator 120 writes information corresponding to a time interval with a previous packet by using the 27 MHz clock generated by the reference clock generator 600 in the packet head of FIG. 1. The recording data rate mitigation unit 100 relaxes the packet input from the packet head generation unit 120 to a data rate for recording the data rate of the received program in a storage medium, thereby eliminating the time interval between program packets. The rest of the time inserts dummy data and outputs the dummy data to the encoding recording unit 200. A timing diagram of the output signal of the write data rate mitigation section 100 is shown in P3 of FIG. Subsequently, the encoding recording unit 200 records the program whose data rate is converted as described above in the program storage unit 300.

When reproducing the recorded program as described above, the program is first read by the encoding decoder 400 and output to the reproduction data rate recovery unit 510. At this time, the timing diagram of the program output from the encoding and decoding unit 400 is the same as the output of the recording data rate mitigation unit 100 in which the time interval between program packets is removed. The packet head analyzing unit 520 analyzes the time interval between packets included in the packet head unit of the packet input from the reproduction data rate recovery unit 510 to determine the time of the program packet selected by the program selecting unit 110. Generate a program packet that maintains the same interval as the interval. That is, as shown in P4 of FIG. 2, the time interval between the program packets output from the packet head analyzer 520 is the same as the time interval of the program packets of P2 of FIG. 2.

Hereinafter, an operation of generating a clock control signal in the packet head generator 120 for the above operation will be described in detail with reference to FIGS. 4 and 5.

First, after the primary packet head generation unit 121 is initialized, uplinking is performed 225,000 times using the reference clock generated by the reference clock generation unit 600. To this end, the first counter unit 121-1 performs counting using the reference clock of 27 MHz and performs 18-bit parallel data Q [0:17] on the first initialization signal generator 121-2. ) And the first initialization signal generator 121-2 compares a predetermined value (225,000) with 18-bit parallel data received from the first counter unit 121-1 and is identical to each other. The enable signal E1 is output to enable the counter initialization unit 122 and the second counter unit 123-1 of the secondary head generator 123.

The counter initialization unit 122 enabled as described above initializes the first counter unit 121-1, and from this point on, the first counter unit 121-1 performs up counting again from zero. . In addition, the enabled second counter unit 123-1 performs up counting using a reference clock signal generated from the reference clock generator 600 at 27 MHz to output a 4-bit R [R]. 0: 3]), and the second initialization signal generator 123-2 receiving the 4-bit output signal is compared with a preset value 12 at the time when the second counter part initialization signal is the same. (E2) is generated.

In other words, the first packet head generation unit 121 performs 225,000 upcounting, and the secondary head generation unit 123 performs 12 upcounting to perform the packet head unit of the even-numbered sync packet shown in FIG. 1. Generates constituent data.

5 shows the structure of the packet head portion having a 4-byte configuration. That is, the packet head unit 18-bit output (Q [0:17]) generated by the primary packet head generator 121 and the 4-bit output (R [) generated by the secondary head generator 123 as described above. 0: 3}).

First, the 18-bit output Q [0:17] of the primary packet head generator 121 inputs the lower bits of the packet head unit in the order of the lower bits to form 18 bits. Subsequently, the 4-bit output R [0: 3} of the secondary head generator 123 configures 4 bits from the 19th bit in the order of the lower bits. Then, the remaining 10 bits are all set to '0' to form 4 bytes of the packet head unit.

Hereinafter, a method of converting a data rate in a digital video recorder for receiving and recording a satellite broadcast program according to the present invention will be described.

A data rate conversion method in a digital video recorder for receiving and recording a satellite broadcast program according to the present invention selects a program to be received from a bit stream type input from a satellite broadcast receiver, and stores the program in a storage medium using a reference clock. A data rate conversion step of converting to a data rate for recording, an encoding recording step of encoding and storing program data input in the data rate conversion step into a storage medium, and a program storage step of recording a program by the encoded recording step And an encoding decoding step of reading a recorded program from the program storing step and reducing the coded program to a form before being encoded in the encoding recording step, and using a reference clock to reproduce the satellite broadcasting receiver. Number Groups is composed of a data rate reduction stage for the reduction of the appropriate data rates, the reference clock generating step of the data rate converting the data rate dangyegwa generating a reference clock needed to change the program in keulreokreul reduction step.

The data rate converting step includes a program selection step of selecting only a program to be received from a bit stream type program input from the satellite broadcasting receiver, a program selected in the program selection step and a reference clock generated in the reference clock generation step. A clock control signal generation step of generating a clock control signal to provide a clock required for program storage, and receiving a clock control signal from the clock control signal generation step to convert a data rate of the program selected in the program selection step; And a recording data rate conversion step of outputting the program converted to the encoding recording step.

The clock control signal generation step may receive up-counting the reference clock generated in the reference clock generation step to generate some data (18 bits) of the packet head part shown in FIG. 1 and enable notification that counting is complete. A primary head generating step of generating a signal, a counter initialization step of receiving the enable signal generated from the primary head generating step and an external six-track initialization signal to initialize the primary head generating step, and from the primary head generating step It is enabled by the enable signal, and comprises a secondary head generation step of generating the remaining data (4 bits) of the packet head by up counting the reference clock generated in the reference clock generation step 12 times as a counting clock.

The primary head generating step includes: a first counter step of initializing using an initialization signal from the counter initializing step, up counting to a reference clock generated in the reference clock generating step, and generating an 18-bit output used for the packet head; The primary counter step comprises a primary comparison step of receiving an 18-bit output of the primary counter step so as to count 225,000 times and generating the enable signal at the same time as compared with 225,000.

The secondary head generating step includes a secondary counter step of generating an output of 4 bits used for the packet head by counting up to a reference clock generated in the reference clock generation step, and the primary counter step of counting the secondary counter step 12 times. And a second comparison step of generating an initialization signal for initializing the secondary counter step at the same time as receiving a 4-bit output of and comparing it with 12.

The data rate reduction step includes a reproduction data rate reduction step of receiving a program having a data rate suitable for recording from the encoding and decoding step and reducing the data rate to a data rate required for reproduction by the satellite broadcasting receiver, and the reference clock generation step. And a clock control signal analysis step of analyzing a clock control signal included in a program received from the reproduction data rate reduction step by using the reference clock.

Hereinafter, a detailed operation of the data rate conversion method in the digital VHS video cassette recorder will be described with reference to FIGS. 1, 2, and 5.

In the satellite broadcasting receiver, as illustrated in P1 of the timing diagram of FIG. 2, a plurality of programs are received by being divided in time according to the amount of data. For example, when program A is selected, as shown in P2 of FIG. 2, only the packets corresponding to program A are selected in the program selection step, so that the time interval between the packets is not constant and is input to the clock control signal generation step. do.

After receiving the packets of the program A selected as described above, the clock control signal generation step uses the 27 MHz clock generated in the reference clock generation step to display information corresponding to a time interval with a previous packet in the packet head of FIG. 1. Record in the Department.

Here, the structure of the packet head unit configured as shown in FIG. 5 may be obtained through the primary head generating step, the counter initialization step, and the secondary head generating step, and a detailed process thereof will be described below.

First, in the primary head generation step, up-counting is performed 225,000 times using the reference clock generated in the reference clock generation step. That is, in the primary counter step, 18-bit parallel data Q [0:17] is output to the primary compare step while counting using the reference clock of 27 MHz, and in the primary compare step, a predetermined value (225,000) is output. ) And the enable signal E1 are output only when the 18-bit parallel data inputted from the primary counter step is compared with each other, thereby enabling the secondary counter step of the counter initialization step and the secondary head generation step. Let's do it.

The counter initialization step, enabled as described above, initializes the primary counter step, and from this point on, the counter counter starts up counting from zero again. In addition, in the enabled secondary counter step, up counting is performed using a reference clock signal generated from the reference clock generation step of 27 MHz to generate a 4-bit output R [0: 3]. In the second comparison step in which the 4-bit output signal is input, the second counter unit initialization signal E2 is generated at the same time as the preset value 12.

The above process is repeated to generate data of 4 bytes of the packet head portion shown in FIG. That is, the packet head unit uses an 18-bit output Q [0:17] generated in the primary head generating step and a 4-bit output R [0: 3} generated in the secondary head generating step as described above. Will be configured.

First, the 18-bit output Q [0:17] of the primary head generation step is inputted from the lower bits of the packet head portion in the order of lower bits to form 18 bits. Subsequently, the 4-bit output R [0: 3} of the secondary head generation step constitutes 4 bits from the 19th bit in the order of the lower bits. Then, the remaining 10 bits are all set to '0' to form 4 bytes of the packet head unit.

Subsequently, in the recording data rate converting step, the packets of the program A changed in the form of a packet including a packet head part in the clock control signal generating step as described above are alleviated by a data rate that is received and recorded in the storage medium. The gap is eliminated, and the rest of the time is inserted with dummy data and outputted to the encoding recording step. The timing diagram of the output signal of the recording data rate conversion step is shown in P3 of FIG.

In the encoding recording step, the program whose data rate is converted as described above is recorded in the program storage step.

When reproducing the recorded program as described above, the program is first read through the encoding decoding step and output to the reproduction data rate reduction step. At this time, the timing diagram of the program outputted from the encoding decoding step is such that the time interval between program packets is removed in the same way as the output of the recording data rate conversion step.

Subsequently, in the clock control signal analysis step, the time interval between packets included in the packet head portion of the packet input from the reproduction data rate reduction step is analyzed to maintain the same interval as the time interval of the program packet selected in the program selection step. Generates a program packet. That is, as shown in P4 of FIG. 2, the program reproduction is possible by reducing the time interval between the program packets output in the clock control signal analyzing step to be the same as the time interval of the program packets shown in P2 of FIG. 2. do.

According to the data rate converting apparatus and method in the digital video recorder according to the present invention described above, a program having a data rate different from the data rate recorded in the digital video recorder can be recorded in the storage medium. Furthermore, by analyzing the packet head portion included in the packet at the time of storing as described above, the data rate before the recording of the program recorded on the storage medium and the time interval between packets are reduced, thereby reproducing a data rate different from the data rate of the digital video recorder. You can play the program through the device. Accordingly, by recording digital programs such as digital satellite broadcasting and high definition television (HDTV) to a digital video recorder and playing back the programs, the application range of the wide variety of broadcasting and other digital programs expected in the future is expanded. It is possible to improve the competitiveness of digital video recorders over other storage media and playback devices capable of recording and playing back programs.

Claims (13)

In a data rate converting apparatus in a digital video recorder, a program to be received is selected from a bit stream type program input from a satellite broadcasting receiver, and a data rate for recording on a storage medium using a reference clock. A data rate converter for converting; An encoding recording unit encoding the program data input from the data rate conversion unit and storing the encoded program data in a storage medium; A program storage unit for recording a program by the encoding recording unit; An encoding decoder which reads a program recorded from the program storage unit and reduces it to a form before being encoded by the encoding recording unit; A data rate reduction unit for reducing the clock of the program to a data rate suitable for the satellite broadcast receiver by using a reference clock for reproducing the program through the satellite broadcast receiver; And a reference clock generator for generating a reference clock required for changing a clock of a program in the data rate converter and the data rate reducer. The apparatus of claim 1, wherein the data rate converter comprises: a program selector which selects only a program to be received from among programs of a bit stream type inputted from the satellite broadcasting receiver; A clock control signal generator for generating a clock control signal to provide a clock required for program storage using a program selected by the program selector and a reference clock generated by the reference clock generator; And a recording data rate converter which receives a clock control signal from the clock control signal generator and converts the data rate of the program selected by the program selector to output the program converted to the encoded recording unit. Data rate conversion device in. 3. The clock control signal generator of claim 2, wherein the clock control signal generator receives a reference clock generated by the reference clock generator to perform an upcounting to generate a portion (18 bits) of the packet head part, and recognizes the end of counting. A primary packet head generator for generating an enable signal; A counter initializer configured to receive an enable signal generated from the primary packet head generator and a six-track initialization signal from the outside to initialize the primary packet head generator; Secondary head generation enabled by the enable signal from the primary packet head generator and up-counting the reference clock generated by the reference clock generator 12 times with a counting clock to generate a portion (4 bits) of the packet head portion And a data rate converting device in a digital video recorder, comprising: a unit (123). 4. The method of claim 3, wherein the primary packet head generation unit initializes using an initialization signal from the counter initialization unit, up-counts the reference clock generated by the reference clock generation unit to generate an 18-bit output used for the packet head. A first counter unit and a first counter unit that receives the 18-bit output of the first counter unit so that the first counter unit counts only 225,000 times, and compares it with a predetermined value (225,000) to generate the enable signal at the same time point An apparatus for converting a data rate in a digital video recorder, comprising an initialization signal generator. The first packet head generator of claim 3, wherein the counter initializer is generated only when a six-track initialization signal input externally for track synchronization and an enable signal generated by the primary packet head generator are simultaneously generated. And an AND logic by initializing the initialization signal generator. 4. The method of claim 3, wherein the secondary head generator is enabled when an enable signal generated by the second initialization signal generator is generated, and is used in the packet head by counting up to a reference clock generated by the reference clock generator. The second counter unit generating a 4-bit output and the output (4 bits) of the first counter unit are input and compared with a preset value 12 to generate a signal for initializing the second counter unit at the same time point. An apparatus for converting a data rate in a digital video recorder, comprising: a second initialization signal generator that is generated. The data rate reducing unit of claim 1, wherein the data rate reducing unit receives a program having a data rate suitable for recording from the coded decoding unit, and reduces the data rate reducing unit to reduce the data rate required for reproduction by the satellite broadcasting receiver; A digital video comprising a packet head analyzing portion for analyzing a packet head portion of a program received from the reproduction data rate reducing portion using a reference clock generated by a clock generating portion, and reducing a time interval between packets before recording. Data rate conversion device in the recorder. A data rate converting method in a digital video recorder, comprising: selecting a program to be received from a bit stream type program input from a satellite broadcasting receiver and converting the data rate into a data rate for recording on a storage medium using a reference clock; A conversion step; An encoding recording step of encoding the program data input in the data rate conversion step and storing the encoded program data in a storage medium; A program storing step of recording a program by the encoding recording step; An encoding and decoding step of reading a recorded program from the program storing step and reducing it to a form before being encoded in the encoding and recording step; A data rate reduction step of reducing a clock of a program to a data rate suitable for the satellite broadcast receiver by using a reference clock for reproduction by the satellite broadcast receiver; And a reference clock generation step of generating a reference clock required to change a clock of a program in the data rate conversion step and the data rate reduction step. The method of claim 8, wherein the data rate conversion step comprises: a program selection step of selecting only a program to be received from among a program in the form of a bit stream input from the satellite broadcasting receiver; A clock control signal generation step of generating a clock control signal to provide a clock necessary for program storage using a program selected in the program selection step and a reference clock generated in the reference clock generation step; And a recording data rate conversion step of receiving a clock control signal from the clock control signal generation step, converting the data rate of the program selected in the program selection step, and outputting a program converted to the encoding recording step. How to convert data rates on video recorders. 10. The method of claim 9, wherein the clock control signal generation step includes receiving a reference clock generated in the reference clock generation step and performing up counting to generate a portion (18 bits) of the packet head part, and recognizes the counting end. A primary head generating step of generating an enable signal; A counter initialization step of receiving the enable signal generated from the primary head generation step and a six track initialization signal input from the outside and initializing the primary head generation step; Secondary head generation step, which is enabled by the enable signal from the primary head generation step, generates a part (4 bits) of the packet head by up counting the reference clock generated in the reference clock generation step 12 times as a counting clock. A data rate conversion method in a digital video recorder, characterized in that consisting of. The primary counter of claim 10, wherein the primary head generation step is initialized using an initialization signal from the counter initialization step, and is counted up to a reference clock generated in the reference clock generation step to generate an output of 18 bits of a packet head. And a primary comparison step of receiving the output (18 bits) of the primary counter step and comparing the predetermined value (225,000) to generate the enable signal at the same time point. How to convert data rates on recorders. 12. The method of claim 10, wherein the secondary head generating step comprises: a secondary counter step of generating an output (4 bits) used for a packet head by counting up to a reference clock generated in the reference clock generating step; Data rate in the digital video recorder, characterized in that the output (4 bits) is compared with the preset value 12 and the two signals are generated at the same time to generate a signal for initializing the secondary counter step Transformation method. The reproduction data rate reduction step of claim 8, wherein the data rate reduction unit receives a program having a data rate suitable for recording from the encoding decoding step and reduces the data rate to a data rate required for reproduction by the satellite broadcasting receiver; And a clock control signal analysis step of analyzing a packet head portion of a program received from the reproduction data rate reduction step by using a reference clock generated in a clock generation step, and reducing a time interval between packets before recording. Data rate conversion method in digital video recorder.

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