KR100216515B1 - TU Switching Matching Device for TU11 / TU12 Hybrid Line Distribution and Its Signal Configuration Method - Google Patents

Abstract

The present invention relates to a TU switching matching device and a signal configuration method for TU11 / TU12 mixed line distribution. The purpose is to allow a single module to mix TU11 and TU12 signals. The configuration includes an AU3 signal matching unit which receives an STM-n level signal at a predetermined number of 78 Mbps at a BTL level in the receiving direction, converts the signal into a TTL level, and performs a reverse function in the transmitting direction, and is included in the STM-n level signal. Terminating or forming 12 AU3 signals, connected to the AU3 signal matching unit and a predetermined number of 78 Mbps TTL signals, and processing an AU signal to convert to an VC signal or performing a reverse function, and a TU signal included in the VC signal. It consists of a VC3 signal processor which performs TU pointer processing by demultiplexing or multiplexing, and a TU1 time switching unit which accommodates front / rear time switch functions of a TST structure.

Description

TU Switching Matching Device for TU11 / TU12 Hybrid Line Distribution and Its Signal Configuration Method

The present invention relates to a TU switching matching device and a signal configuration method for TU11 / TU12 mixed line distribution.

In general, communication network technology for providing various services with the development of high-speed signal processing and image processing technology has emerged Broadband Intergrated Servece Digital Network (BISDN), SDH (Synchronous) with the evolution of BISDN network The transmission system of inter-national relay network based on Digital Hierarchy has also been promoted in high capacity and high speed. Therefore, DSK-n (Digital Signal Cross-connect-n) functions such as reconfiguration of transmission paths managed by manual operation in PDH basic transmission network, configuration of bypass route, relay line test function, etc. In the transmission system of the inter-station relay network based on Synchronous Digital Hierarchy, it was required to fully electronicize. To this end, a broadband circuit distribution system was developed to perform the DXC (Digital Cross-connect) function of the SDH.

Broadband line distribution system is located at the point where interworking between existing PDH transmission network and synchronous transmission network is required or at the network node where many high speed SDH signals are concentrated, and digital signal distribution and branch insertion capability of DSn signal is provided to accommodate existing transmission facilities. to provide. Where interworking with existing PDH transmission network is required, broadband circuit distribution system accepts T1 (TU11 formation) and E1 (TU12 formation) signals by interworking with switch function of AU (Adiministration Unit) signal to perform DXC function, which is the main function. Line distribution and branching of Tributary Unit (TU) signals is required. When the TU switch part of the broadband digital cross-connect system that requires interworking with the PDH transmission network maintains the clock of the synchronous hierarchy and uses the TU11 signal and the TU12 signal simultaneously to perform the circuit distribution and branching function. It is not easy to process TUG-2 signals using a standardized VC3 frame structure. Therefore, in the TU switch unit, a new frame and signal structure for distinguishing the TU11 signal and the TU12 signal multiplexed on the VC3 signal and processing the TUG-2 signal to be mixed for switching is required.

The transmission path configuration of the relay station between the existing PDH transmission network and the synchronous transmission network where the high speed SDH signal is concentrated is composed of the manual reconstruction of the transmission path, the configuration of the bypass route, and the relay line test function. There is a need for a broadband line distribution system that fully electronicizes the Digital Signal Cross-connect-n (DSX-n) function. Broadband line distribution system aims to reconfigure circuits on line, replace line, provide quick service, and strengthen network management function in case of failure through cross link between low speed signals included in high speed transmission signal. 1 is a block diagram of a general broadband circuit distribution system, and the configuration of the system is largely divided into a signal distribution subsystem 11, a signal branch subsystem 12, a device control subsystem 13, and a device management subsystem 14. It is composed. In the configuration of the system, the signal distribution subsystem 11 receives the STM-n signal, matches it, performs high-speed signal switching in units of AU3, and has an AU signal routing function for signal distribution, branching, broadcasting, and test. The switching function 111 receives the AU3 unit signal, matches it, performs low-speed signal switching of the TU1, and has a TU switching function 112 having a routing function of the TU11 and TU12 signals, an external timing connection function, and a clock of the system. The system synchronization function unit 113 having a generation function and a distribution function is configured as a basic function unit. The PDH (Plesiochronous Digital Hierarchy) basic transmission network is divided into North American TU11 signal and European TU12 signal. Currently, both systems are used in PDH transmission network in Korea. The TU switching function 112 of the system is required to switch between the North American TU11 signal and the European TU12 signal. According to the ITU-T multiplexing standard, the TU11 and TU12 signals become TUG-2, which multiplexes four TU11 signals or multiplexes three TU12 signals, and multiplexes the seven TUG-2 signals to form a VC3 signal. Since the North American and European DS1 signaling devices are used in the PDH transmission network, the distribution function of the TU11 and TU12 signals is required to be mixed in the circuit distribution system, but the TUG-2 signal is processed using the existing VC3 frame structure. In a circuit distribution system, it is difficult to mix TU11 and TU12 signals in one module. If the module for switching the TU signal is not mixed, the three VC3 signals included in the STM-1 signal accept one of the TU11 and TU12 signals according to the DS1 hierarchy signal device. This is required and the implementation of the system to handle this becomes very complicated.

Figure 2a is a TUG-2 frame according to the ITU-T multiplexing standard, Figure 2b is a VC3 frame structure to multiplex 28 TU11 signals, or 21 TU11 signals. Since the number and size of the TU11 and TU12 signals multiplexed on the seven TUG signals of the VC3 frame are different, it is difficult for the TU switching function to simultaneously switch the TU11 and TU12 signals as a single TU switch matching module. . Therefore, in the TU switching function of the conventional circuit distribution system manufactured by the multiplexing structure standardized in ITU-T, a switch matching module for TU11 and a switch matching module for TU12 must be manufactured separately for switching TU signals. there was.

An object of the present invention for solving the above problems is to enable the TU11 signal and the TU12 signal to be used in combination by one module. Features of the present invention for achieving the above object is an AU3 signal matching unit for receiving the STM-n-class signal at a predetermined number of 78Mbps speed of the BTL level in the receiving direction and converting it to the TTL level and performing a reverse function with respect to the transmitting direction. An AU3 signal processor for terminating or forming 12 AU3 signals included in the STM-n-class signal and connected to the AU3 signal matching unit with a predetermined number of 78 Mbps TTL signals and converting the AU signal into a VC signal or performing a reverse function; It consists of a VC3 signal processing unit for performing TU pointer processing by demultiplexing or multiplexing the TU signal included in the VC signal and a TU1 time switching unit accommodating the front / rear time switch functions of the TST structure.

The present invention processes the signal to perform switching according to the TU11 and TU12 signal units after demultiplexing the TU11 or TU12 signals multiplexed in the TUG-2 form to the VC3 signal in synchronization with the AU signal switch module. It consists of a module of functions. TU signal switch unit structure and 7 TUG-2 signals multiplexed in VC3 to configure the function block of the TU switch matching module to switch the TU11 signal and the TU12 signal at the same time and to perform the switching function The frame structure of the transmission signal connected between them is proposed.

In the present invention, the configuration of the TU switch unit and the TU signal switching function of the broadband circuit distribution system for receiving the STM-n (n = 1, 4, 16) signal to perform the line distribution and branching function of the TU11 or TU12 signal In order to switch the TU1 signal by mixing the TU11 and TU12 signals in the TUG-2 signal multiplexed in each VC-3 signal, the transmission signal frame structure between the proposed building blocks and the access signal according to the frame structure A form was suggested.

The characteristics of the present invention for achieving the above object are in the following.

The present invention is to process the AU3 signal to simultaneously perform the line distribution and branching function of the TU11 and TU12 signal among the TU switching function module that performs the line distribution and branching function for the Tributary Unit (TU) signal of the broadband circuit distribution system To implement the TU switch matching module, the functional blocks of the module are proposed for the switching of the TU11 and TU12 signals, and the transmission signal frame structure and the connection signal type between the proposed blocks are proposed.

1 is a block diagram of a broadband circuit distribution system,

2 is a frame structure diagram of a VC3 signal according to the 1TU-T standard,

3 is a configuration diagram of a TU switch matching module according to the present invention;

4 is a structural diagram of a signal frame and a connection signal from an AU3 signal processor to a VC3 signal processor of the present invention;

5 is a signal frame structure diagram from the VC3 signal processor of the present invention to the AU3 signal processor;

6 is a signal frame structure diagram between a VC3 signal processor and a TU1 time switch of the present invention.

As shown in FIG. 1, the TU switch function unit 112 accepts a signal capacity of STM-n (n = 1, 4, 16), and compares the TU11 or TU12 signal included in the VC3 signal. It is used to perform the line distribution and branching functions. It uses the TST switch structure to switch the TU11 and TU12 signals. In the present invention, the TU switch function unit 112 receives the AU3 signal multiplexed on the STM-n signal, matches the TU11 or TU12 signals included in the seven TUG-2 signals in the VC3 signal extracted by pointer processing the AU3 signal. It consists of a TU switch matching module and a space switch module to perform a time switching function, Figure 3 shows the structure of the TU switch matching module proposed in the present invention.

The structure of the TU switch matching module of FIG. 3 is largely composed of functional blocks such as the AU3 signal matching unit 31, the AU3 signal processing unit 32, the VC3 signal processing units 33, 34, 35, and 36, and the TU1 time switching unit 37. do.

The AU3 signal matching unit 31 receives STM-n (n = 1, 4, 16, e.g., n = 4) level signals at eight 78Mbps speeds of BTL level and converts them into TTL level in the receiving direction. To perform the dysfunction. The AU3 signal processing unit 32 is a function unit for terminating or forming 12 AU3 signals included in the STM-4 signal, and is connected to the AU3 signal matching unit 31 with eight 78 Mbps (STM-4 signal capacity) TTL signals. The VC3 signal processing units 33, 34, 35, and 36 are divided into four identical functional units in which the signal capacity of one VC3 signal processing unit is STM-1, as shown in the module structure diagram. Since the STM-1 signal includes three VC3 signals, one VC3 signal processing unit 33 to 36 is three TU1 signal processing units each processing one VC3 signal capacity in order to reduce implementation complexity and reduce operation repetition. The interface speed between the AU3 signal processor 32 and the TU1 time switching unit 37 is a 19.44 Mbps signal that maintains a clock of synchronous hierarchy, and is a signal obtained by sequentially byte multiplexing three TU signal processor output signals.

Since seven TUG-2s of one VC3 signal include 28 TU11 signals or 21 TU12 signals, each TU1 signal processor 331, 332, and 333 connected at the AU3 signal rate is included in the VC3 signal. It performs functions such as analyzing pointers of 28 TU11 signals and 21 TU12 signals, and has a new frame structure of AU3 signal rate in order to switch TU11 and TU12 signals mixed. The TU1 time switching unit 37 accommodates the front / rear time switch function among the front / rear time switch of the T-S-T structure and the space switch. In order to prevent blocking of the signal inside the switch when the front / back time switch function of the TU1 signal is performed, the number of timeslots can be extended by 2C-1. Plane).

Looking at the configuration function and signal frame and signal structure of the TU1 switch matching module according to the present invention for switching the TU11 signal and TU12 signal mixed, the main function of the AU3 signal processing unit 32 is the AU3 signal matching unit in the received signal The start point of the VC3 frame is extracted by analyzing the respective pointers of the 12 AU3 signals included in the section overhead (SOH) in the frame with respect to the STM-4 signal received through (31). The 12 VC3 signals extracted by the pointer method were divided into 4 signal groups of STM-1 signal capacity, which consist of 3 VC3 signals as a group, and each signal group maintains SDH based synchronization clock and simplifies implementation. The frame structure is based on the STM-1 signal of 155.52Mbps. The signal frame structure of three VC3 signals as one group is shown in FIG. 4, and the signal frame structure is a structure in which three VC3 data are multiplexed to easily accommodate 28 TU11 myths and 21 TU12 signals. The VC3 frame structure was changed to a 51.84 Md / s transmission signal in which a signal is accommodated as a single payload.

The signal interfaced between the AU3 signal processing unit 32 and the VC3 signal processing unit 33 distinguishes the multiplexed VC3 signals and indicates the starting point of the extracted VC3 frame for the operation of the TU1 signal processing unit which receives one VC3 signal. A Gapped 6.264 MHz signal is required which is a signal and a VC3 clock enable signal that is only enabled for the VC3 frame portion in the modified frame structure. Therefore, 8 MHz indicating the start point of the VC3 frame is output as shown in FIG. 4, but three VC3 clock enable signals and three VC3 data are multiplexed and output.

The AU3 signal processor 32 demultiplexes the transmission frame structure of the STM-1 size based on the 8KHz signal, inserts a pointer value to each of the VC3 signals, and multiplexes the STM-1. A total of four levels of data (8x19.44Mbps) are input, forming all 12 AU3 signals.

Eight 19.44 Mbps speed is a simple byte multiplexed form of the signal output from the three TU1 signal processing units (331, 332, 333) included in one VC3 signal processing unit 33, such as 8KMz signal indicating the starting point Is entered. In this case, the frame format of the transmission direction output from each TU1 signal processor 331, 332, 333 is also changed to maintain synchronization, and the frame structure thereof is based on FIG. 5 described in the VC3 signal processor. It is composed.

The VC3 signal processing units 33 to 36 are connected to the AU3 signal processing unit 32 at a signal rate of 19.44 Mbps, which is the frame structure of FIG. 4 in the receiving direction, and receives the VC3 frame offset signal from the AU3 signal processing unit 32 and the VC3 clock. The enable and VC3 days are received to terminate the path overhead of the VC3 signal. The capacity of one VC3 signal processor 33 is STM-1 class that accommodates three VC3-class signals, and consists of three TU1 signal processors 331, 332, and 333, and the TU signal processor is multiplexed onto one VC3 signal. By demultiplexing 28 TU11 signals or 21 TU12 signals included in the 7 TUG-2 signals, the pointer analysis function is performed on each of the TU11 / TU12 signals, and the path overhead monitoring function for the VC11 / VC12 signals is determined. This function inserts a signal label value for an unequipped signal. After the VC1 signals having these functions are written to the pointer buffer as the reception clock, the VC1 signals are aligned by regenerating the pointer value while reading the transmission signal as the transmission clock. The aligned TU1 signals are connected to the front / rear time switching unit 34 using the signal frame structure as shown in FIG. 6, and the access signal frame is the sixth signal rate of 8 × 19.44 Mbps to the front / rear time switching unit. A signal structure of 9 x 270 at the STM-1 transmission rate is obtained by sequentially multiplexing three signal frames shown in FIG.

The function of the transmission direction of the VC3 signal processor 33 inserts the VC3 path overhead for the multiplexed 21 TU12 received signals or 28 TU11 signals output from the TU1 signal switching unit and outputs the VC3 path overhead to the AU3 signal processor. In this case, the frame format of the transmission direction output from each of the TU1 signal processing units 331 to 333 is also changed to an AU3 transmission rate of 51.84 Mbp / s to maintain synchronization with the AU3 signal processing unit. Transmit 8KHz signal. The connection speed with the AU3 signal processor is 19.44 Mbps, which is formed by simply multiplexing three TU signal processors as shown in FIG. 5, and performs the same transmission function as the TU12 signal for the 28 TU11 signals in the TU11 signal.

As described above, the TU switch matching module of the present invention performs a matching function of a signal for switching irrespective of the TU11 and TU12 signals included in the VC3 signal, thereby simplifying operation and implementation of the system. In addition, TU11 or TU12 signals multiplexed to the AU3 signal are multiplexed and demultiplexed in synchronization with the AU signal switch module based on the STM-1 signal, so that the clock system can be unified in the synchronous hierarchy so that the entire system and the TU switch can be unified. The advantage is that the clock system of the matching module can be simplified. The TU switch module structure and frame structure of the proposed broadband circuit distribution system are accommodated by ASIC, and it will be usefully applied to the DXC system requiring the distribution / branching function of the TU11 and TU12 signals. Since the TU switch matching module of the present invention performs the matching function of the signal for switching irrespective of the TU11 and TU12 signals included in the VC3 signal, the operation and implementation of the system are simplified, and the clock of the synchronous hierarchy is implemented. By eliminating the complexity, the clock system of the entire system and the TU switch matching module is simplified.

Claims (5)

AU3 signal matching unit which receives STM-n level signal at a certain number of 78Mbps of BTL level in the receiving direction and converts it into TTL level, and performs a reverse function in the transmitting direction, and n × 3 signals included in the STM-n level signal AU3 signal processing unit for terminating or forming an AU3 signal and terminating or forming the AU3 signal matching unit and a predetermined number of 78 Mbps TTL signals, and converting the AU signal to a VC signal or performing a reverse function, and the AU3 signal processing unit and 19.44 Mbps A VC3 signal processor for demultiplexing or multiplexing a TU signal included in the VC signal to perform TU pointer processing, and a TU1 time switching unit for accommodating a front / rear time switch function of a TST structure; TU switching matching device for TU11 / TU12 mixed line distribution. 2. The TU11 / TU12 mixed circuit distribution scheme according to claim 1, wherein the interface speed between the AU3 signal processor and the VC3 signal processor is a fixed fill bit signal to make a 19.44 Mbps signal for maintaining a clock of a synchronous hierarchy. TU switching matching device. 2. The apparatus of claim 1, wherein each of the TU1 signal processing means connected at an AU3 signal rate is used to interpret a pointer of 28 TU11 signals and 21 TU12 signals included in a VC3 signal using an enable signal and an 8 KHz reference clock. TU switching matching device for TU11 / TU2 line distribution, characterized in that to perform the function. The TU switching matching device for TU11 / TU12 mixed line distribution according to claim 1, wherein the TU1 time switching unit comprises two planes. The TU switching matching device according to claim 1, wherein the VC3 signal processing unit is composed of three TU1 signal processing units each processing one VC3 signal capacity.