KR0186077B1 - Ambient Exposure Mask for Semiconductor Wafer and Ambient Exposure Method Using the Same - Google Patents
Ambient Exposure Mask for Semiconductor Wafer and Ambient Exposure Method Using the Same Download PDFInfo
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- KR0186077B1 KR0186077B1 KR1019950005482A KR19950005482A KR0186077B1 KR 0186077 B1 KR0186077 B1 KR 0186077B1 KR 1019950005482 A KR1019950005482 A KR 1019950005482A KR 19950005482 A KR19950005482 A KR 19950005482A KR 0186077 B1 KR0186077 B1 KR 0186077B1
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- wafer
- light
- exposure
- peripheral exposure
- mask
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- 238000000034 method Methods 0.000 title claims abstract description 18
- 239000004065 semiconductor Substances 0.000 title claims abstract description 15
- 230000002093 peripheral effect Effects 0.000 claims abstract description 53
- 229920002120 photoresistant polymer Polymers 0.000 claims description 14
- 230000000903 blocking effect Effects 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 abstract description 77
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 abstract description 7
- 229910052804 chromium Inorganic materials 0.000 abstract description 3
- 239000011651 chromium Substances 0.000 abstract description 3
- 239000011521 glass Substances 0.000 abstract description 3
- 239000000758 substrate Substances 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
- G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
- G03F7/2026—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure for the removal of unwanted material, e.g. image or background correction
- G03F7/2028—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure for the removal of unwanted material, e.g. image or background correction of an edge bead on wafers
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
본 발명은 반도체 웨이퍼의 주변노광방법에 관한 것으로, 종래에는 단순히 웨이퍼의 가장자리만을 감지하여 일정한 각도로 노광을 조사하기 때문에 허용되는 오차가 통상 ±1mm정도로 크게 발생되는 문제가 있다. 따라서 , 이를 방지하기 위하여 주기적으로 장비의 상태를 점검해주어야 하고, 작업완료된 웨이퍼의 확인작업이 이루어져야 하는 등 작업이 번거로와지는 어려움이 있었는 바, 빛이 투과되는 투명유리기판(10)에 노광되지 않는 웨이퍼(1)에 해당되는 부위만큼 빛을 투과시키지 않는 크롬(11)이 형성된 주변노광용 마스크를 사용한 웨이퍼의 주변노광방법인 본 발명을 제공하여 마스크 상에 설정된 주변노광폭의 변동량이 ±5㎛이내로 감소되어 주변노광폭을 안정적으로 유지관리할 수 있게 되고, 노광전 자동정렬을 실시하므로 주변노광되는 웨이퍼의 가장자리에 대한 위치의 변동크기가 ±1㎛이내로 유지되어 웨이퍼 가장자리 상태에 의한 주변노광위치 즉, 폭의 변동이 없어지도록 한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a peripheral exposure method of a semiconductor wafer, and in the related art, since only the edge of the wafer is sensed and the exposure is irradiated at a predetermined angle, there is a problem that an allowable error is largely generated, typically about ± 1 mm. Therefore, in order to prevent this, it is necessary to periodically check the state of the equipment, and it is difficult to troubleshoot the work, such as checking the completed wafers, so that the light is not exposed to the transparent glass substrate 10 through which light is transmitted. The amount of variation in the peripheral exposure width set on the mask by providing the present invention, which is a peripheral exposure method of a wafer using a peripheral exposure mask on which chromium 11 is formed that does not transmit light as much as a portion corresponding to the wafer 1 that is not provided, is ± 5 μm. It can be reduced within the range so that the surrounding exposure width can be stably maintained and the automatic exposure alignment is performed before exposure so that the variation of the position of the edge of the exposed wafer is kept within ± 1 μm. That is, the fluctuation of the width is eliminated.
Description
제1도는 웨이퍼의 주변노광을 위해 웨이퍼를 클램프가 고정시킨 상태를 보인 단면도.1 is a cross-sectional view illustrating a state in which a clamp is fixed to a wafer for peripheral exposure of the wafer.
제2도는 반도체 웨이퍼의 주변노광순서를 보인 것으로, a도는 웨이퍼 위에 포토 레지스트를 도포한 상태를 보인 평면도2 is a peripheral exposure sequence of a semiconductor wafer, and a is a plan view showing a state in which photoresist is applied on the wafer.
b도는 주변노광 완료후 웨이퍼의 형태를 보인 평면도.b is a plan view showing the shape of the wafer after the completion of ambient exposure.
c도는 주변노광 완료후 클램프가 웨이퍼를 고정시킨 상태의 평면도.c is a plan view of the state in which the clamp is fixed after the completion of ambient exposure.
제3도는 종래 주변노광장치의 구성 및 작업상태를 보인 공정도.3 is a process diagram showing the configuration and operation of the conventional peripheral exposure apparatus.
제4도는 본 발명에 의한 주변노광용 마스크를 이용한 주변노광의 상태도.4 is a state diagram of ambient exposure using the mask for ambient exposure according to the present invention.
제5a,b도는 자동정렬용 패턴이 형성된 주변노광용 마스크 및 웨이퍼 각각의 평면도.5A and 5B are plan views of a peripheral exposure mask and a wafer on which an automatic alignment pattern is formed.
제6도는 제5a,b도의 주변노광용 마스크와 웨이퍼를 정렬시킨 후 주변노광을 실시한 상태도.6 is a state in which the peripheral exposure is performed after aligning the wafer for peripheral exposure masks of FIGS. 5A and B with the wafer.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 웨이퍼 10 : 투명유리기판1 wafer 10 transparent glass substrate
11 : 크롬 12 : 자동정렬패턴11: Chrome 12: Automatic Sort Pattern
본 발명은 반도체 웨이퍼의 주변노광방법에 관한 것으로, 특히 웨이퍼의 주변노광폭의 오차를 최소화하도록 하는데 적합한 반도체 웨이퍼의 주변노광방법에 관한 것이다.The present invention relates to a peripheral exposure method of a semiconductor wafer, and more particularly to a peripheral exposure method of a semiconductor wafer suitable for minimizing the error of the peripheral exposure width of the wafer.
반도체 제조공정 중 웨이퍼 가공시에 웨이퍼를 식각하는 에치공정은 웨이퍼를 에치장비에 로딩한 후, 웨이퍼의 가장자리부위를 클램프로 고정시켜 에치공정응 수행하게 된다.In the etch process of etching a wafer during wafer processing in a semiconductor manufacturing process, the wafer is loaded into an etch apparatus, and then the edge of the wafer is clamped to clamp the wafer.
이와 같은 에치공정을 수행하기 위해서의 제1도에 도시한 바와 같이, 웨이퍼(1)의 상면에 도포된 포토 레지스트(2)와 클램프(3)가 겹쳐지지 않도록 소정간격만큼 이격되어 있어야 하며, 만약 웨이퍼(1)의 상면에 도포되는 포코 레지스트(2)가 클램프(3)에 눌리게 되면, 클램프에 포토 레지스트 성분이 묻어 클램프가 오염됨으로써 에치되는 웨이퍼를 오면시키게 된다.As shown in FIG. 1 for performing such an etching process, the photoresist 2 and the clamp 3 applied to the upper surface of the wafer 1 should be spaced apart by a predetermined interval so as not to overlap. When the poco-resist 2 applied to the upper surface of the wafer 1 is pressed by the clamp 3, the photoresist component is buried in the clamp and the clamp is contaminated so that the wafer is etched.
따라서, 포토 레지스트와 클램프가 겹쳐지지 않도록 하기 위해 제2도에 도시한 바와 같이, 포토오정 진행시에 웨이퍼의 주변부에 잔류하는 포토 레지스트르 주변노광장치를 사용하여 제거하도록 하고 있다.Therefore, in order to prevent the photoresist and the clamp from overlapping, as shown in FIG. 2, the photoresist peripheral exposure apparatus remaining in the peripheral portion of the wafer during the photocorrection process is removed.
첨부도면 제2도의 (a)내지 (c)를 구체적으로 설명하면, (a)는 웨이퍼 위에 포토 레지스트를 도포한 상태를 보인 평면도로서, 포토 레지스트 도포시 웨이퍼 뒷면의 가장자리쪽에서 린스(Rinse)용액을 분사하기 때문에 웨이퍼 가장자리 부근 약간에는 포토 레지스트가 존재하지 않는다.Referring to (a) to (c) of FIG. 2, specifically, (a) is a plan view showing a state in which photoresist is applied onto a wafer, and when a photoresist is applied, a rinse solution is applied to the edge of the back side of the wafer. Because of the spraying, there is no photoresist slightly near the wafer edge.
또한, (b)는 주변노광을 실시한 후의 웨이퍼의 상태도로서, 웨이퍼 가장 자리의 포토 레지스트가 존재하지 않는 영역이 (a)도 보다 약간 넓게 된다. (c)는 주변노광 완료 후 클램프가 웨이퍼를 고정시킨 상태의 평면도이다.In addition, (b) is a state diagram of the wafer after ambient exposure, and the area where the photoresist at the edge of the wafer does not exist is slightly wider than (a). (c) is a top view of the state in which the clamp fixed the wafer after the peripheral exposure was completed.
도면에서 보는 바와 같이, 클램프가 포토 레지스트와 겹쳐지는 것을 방지하기 위한 안정된 주변노광폭은 BA, B'A'이지만, B 혹은 B'의 크기가 너무 클 경우(도면에서 A,A'는 웨이퍼 가장자리를 클램프가 누르는 폭이고, B,B'는 주변노광완료후 웨이퍼 가장자리와 포토 레지스트간의 폭이며, C,C'는 주변노광시 노광되는 폭이다)에 웨이퍼에 형성된 반도체 칩에 영향을 주게 되는 문제가 있으므로, 최대치는 통상적으로 4.5∼5mm 이내로 관리되고 있다.As shown in the figure, the stable ambient exposure width to prevent the clamp from overlapping the photoresist is BA, B'A ', but if the size of B or B' is too large (A, A 'in the figure is the wafer edge). Is the width of the clamp pressed, B and B 'is the width between the wafer edge and the photoresist after ambient exposure is completed, and C and C' is the width exposed during ambient exposure. Therefore, the maximum value is usually managed within 4.5 to 5 mm.
상기의 BA, B'A'조건을 만족하기 위한 주변노광장치의 재현성 및 웨이퍼 주변부 B의 폭 크기를 일정하게 유지관리하기 위하여 종래에는 제3도에 도시한 바와 같은 주변노광장치를 사용하여 웨이퍼의 주변가장자리를 감지하도록 하여 웨이퍼가 원형으로 회전하면서 고정된 노광빛에 주변부위가 노출됨으로써 감광이 이루어지도록 하고 있으며, 이러한 주변노광장치의 구성은 웨이퍼(1)를 로딩 및 언로딩하는 로딩/언로딩부(도면에는 도시되지 않음)와, 웨이퍼(1)의 가장자리부(edge)를 감지하는 감지부(4)(5)와, 가장자리의 일정부위를 노광하는 광공급 및 조사부(6)와, 웨이퍼의 노광시 웨이퍼를 회전시키는 웨이퍼척(7)로 구성되어 있다.In order to maintain the reproducibility of the peripheral exposure apparatus and the width of the wafer peripheral portion B in order to satisfy the above BA and B'A 'conditions, the wafer is conventionally used using the peripheral exposure apparatus as shown in FIG. The peripheral edge is detected so that the wafer is rotated in a circular manner so that the peripheral portion is exposed to the fixed exposure light, and the photosensitive is achieved. The configuration of the peripheral exposure apparatus is loading / unloading to load and unload the wafer 1. A portion (not shown in the drawing), a sensing portion 4 (5) for detecting an edge of the wafer 1, a light supply and irradiation portion 6 for exposing a predetermined portion of the edge, and a wafer The wafer chuck 7 is configured to rotate the wafer during exposure.
미설명 부호 8은 노광광, 9는 노광된 부위를 나타낸 것이다.Reference numeral 8 denotes exposure light, and 9 denotes an exposed portion.
그러나, 종래의 주변노광장치는 단순히 웨이퍼의 가장자리만을 감지하여 일정한 각도로 노광를 조사하기 때문에 허용되는 오차가 통상 ±1mm정도로 크게 발생되는 문제가 있다. 따라서, 이를 방지하기 위하여 주기적으로 장비의 상태를 점검해주어야 하고, 작업완료된 웨이퍼의 확인작업이 이루어져야 하는 등 작업이 번거로와지는 어려움이 있었다.However, the conventional peripheral exposure apparatus merely detects the edge of the wafer and irradiates the exposure at a predetermined angle, thereby causing a problem in that an allowable error is generally large, about ± 1 mm. Therefore, in order to prevent this, it is difficult to check the status of the equipment periodically, and work has to be cumbersome, such as checking the completed wafer.
이와 같은 문제점을 감안하여 안출한 본 발명의 목적은 주변노광시 주변노광폭의 재현성 유지관리에 있어 항시 일정한 각도로 노광이 이루어지도록 하여 허용되는 오차를 최소화시켜 작업생산성을 향상시키려는데 적합한 반도체 웨이퍼의 주변노광방법을 제공함에 있다.In view of the above problems, an object of the present invention is to provide a semiconductor wafer suitable for improving work productivity by minimizing an allowable error so that exposure is performed at a constant angle at all times in maintaining reproducibility of ambient exposure width during ambient exposure. Ambient exposure method is provided.
상기와 같은 본 발명의 목적을 달성하기 위하여 반도체 웨이퍼의 주변노광방법에 있어서, 빛을 차단할 수 있는 광차단부와 빛이 통과되는 광통과부가 형성된 주변노광용 마스크를 포토레지스트가 도포된 웨이퍼와 일정거리를 두고 설치한 다음 상기 광차단부와 웨이퍼의 소자형성영역이 빛의 방향에 대하여 일치되도록 얼라인 하는 얼라인공정을 수행하는 단계와, 상기와 같이 설치된 웨이퍼의 반대쪽에서 주변노광용 마스크에 빛을 주사하여 광통과부를 통하여 통과되는 빛이 웨이퍼의 에지부분에 도포되어 있는 포코레지스트를 노광시키는 빛주사공정을수행하는 단계를 순차적으로 실시하는 것을 특징으로 하는 반도체 웨이퍼의 주변노광방법이 제공된다.In the peripheral exposure method of a semiconductor wafer in order to achieve the object of the present invention as described above, the peripheral exposure mask formed with a light blocking portion that can block light and a light passing portion through which light passes a predetermined distance from the photoresist-coated wafer And then aligning the light blocking portion and the device forming region of the wafer so as to coincide with the direction of light, and scanning the light on the peripheral exposure mask from the opposite side of the wafer. Thereby, a method of peripheral exposure of a semiconductor wafer is provided, which sequentially performs a light scanning process of exposing the focoresist which is passed through the light passing portion to the edge portion of the wafer.
이와 같은 본 발명에 의한 반도체 웨이퍼의 주변노광용 마스크를 사용함으로써 웨이퍼의 주변노광폭의 오차를 최소화하여 주변노광폭을 안정적으로 유지관리할 수 있게 되고, 노광 전 자동정렬을 실시하므로 주변노광되는 웨이퍼의 가장자리에 대한 위치의 변동크기가 ±1㎛이내로 유지되어 웨이퍼 가장자리 상태에 의한 주변노광위치 즉, 폭의 변동이 없어지는 효과가 있으며, 주변노광위치에 의해 영향을 받는 웨이퍼에 형성된 칩의 로스가 없어지게 되며, 작업속도가 현저하게 향상되는 등의 효과가 있다.By using the peripheral exposure mask of the semiconductor wafer according to the present invention as described above, it is possible to stably maintain the peripheral exposure width by minimizing the error of the peripheral exposure width of the wafer, and to perform the automatic alignment before exposure so that the peripheral exposure of the wafer is performed. The fluctuation size of the position with respect to the edge is maintained within ± 1 μm, thereby eliminating the variation of the peripheral exposure position, that is, the width, due to the wafer edge state, and there is no loss of the chip formed on the wafer affected by the peripheral exposure position. And the work speed is remarkably improved.
이하, 상기한 바와 같은 본 발명을 첨부도면에 도시한 일실시례에 의거하여 보다 상세하게 설명한다.Hereinafter, the present invention as described above will be described in more detail based on one embodiment shown in the accompanying drawings.
첨부도면 제4도는 본 발명에 의한 주변노광용 마스크를 이용한 주변노광의 상태도이고, 제5도의 (a)(b)는 자동정렬용 패턴이 형성된 주변노광용 마스크 및 웨이퍼 각각의 평면도이며, 제6도는 상기 제5도 (a)(b)의 주변노광용 마스크와 웨이퍼를 정렬시킨 후 주변노광을 실시한 상태도이다.4 is a plan view of the peripheral exposure using the peripheral exposure mask according to the present invention, and FIG. 5 (a) and (b) are plan views of the peripheral exposure mask and the wafer on which the automatic alignment pattern is formed, and FIG. The peripheral exposure mask is performed after aligning the wafer for peripheral exposure mask of FIG. 5 (a) and (b) with the wafer.
이에 도시한 바와 같이, 본 발명에 의한 반도체 웨이퍼의 주변노광용 마스크는 웨이퍼의 노광되지 않는 부위에 해당되는 부위는 빛이 투과되지 못하는 광차단부로서, 크롬(11)이 형성되어 있고, 나머지 부위는 빛을 투과하는 광통과부로서, 투명유리판(10)으로 되어 있어 빛이 통과되어 웨이퍼의 주변노광이 이루어지도록 하며, 또한 상기 크롬(11)의 중앙부에는 웨이퍼에 형성되어 있는 오토정렬(Auto Alignment)용 패턴과 대응되는 정렬용 패턴(12)을 형성함으로써 주변노광부위를 오픈 시켜 노광광이 투과하여 웨이퍼에 조사될 수 있도록 마스크를 제작함과 아울러 주변노광폭 및 제현성을 안정되게 유지할 수 있도록 웨이퍼(1)에 형성된 오토 정렬용 패턴(la)을 이용하여 재현성이 안정적으로 이루어지도록 한 것이다.As shown in the figure, the peripheral exposure mask of the semiconductor wafer according to the present invention is a light blocking portion through which light is not transmitted, and a portion corresponding to an unexposed portion of the wafer is formed with chromium 11, and the remaining portions are As a light passing portion that transmits light, the transparent glass plate 10 is formed so that light passes through the wafer to expose the wafer, and an auto alignment is formed at the center of the chrome 11. By forming the alignment pattern 12 corresponding to the dragon pattern, the peripheral exposure area is opened to produce a mask so that the exposure light can be transmitted and irradiated onto the wafer, and the wafer can be stably maintained in the peripheral exposure width and reproducibility. Reproducibility was made to be stable using the auto alignment pattern la formed in (1).
상기한 바와 같은 주변노광용 마스크는 주변노광을 웨이퍼의 직경(W)을 기준으로 하여 마스크의 직경(M)을 산출함으로써 제작하는 것이며, 이 때 웨이퍼와 자동정렬을 하기 위한 마스크의 자동정렬용 패턴을 스크라이브 레인(Scribe lane)(L)내에서 선정하여 크롬을 오픈시켜 패턴을 만들고, 이외의 모든 영역은 크롬(11)으로 닫아줌으로써 노광시 빛이 통과하지 않도록 제작한다.The above-mentioned peripheral exposure mask is manufactured by calculating the diameter (M) of the mask based on the peripheral exposure of the diameter (W) of the wafer. At this time, the automatic alignment pattern of the mask for automatic alignment with the wafer is formed. Selected in the scribe lane (L) to open the chrome to form a pattern, and close all other areas with chrome (11) to prevent light from passing through.
미설명 부호 c는 웨이퍼에 형성된 칩을 보인 것이다.Reference numeral c denotes a chip formed on the wafer.
이와 같이 제작된 주변노광용 마스크가 설치된 얼라이너 장치에서의 반도체웨이퍼의 주변노광공정은 웨이퍼가 로딩되면, 웨이퍼에 형성되어 있는 자동정렬용 패턴(12)을 이용하여 자동으로 정렬이 이루어져 웨이퍼(W)의 중심과 마스크(M)의 중심이 정확하게 일치하게 되고, 노광시 마스크에 광차단부로서의 크롬(11)이 형성되어 있는 부분은 빛이 투과하지 못하고, 그 이외는 광통과부로서의 일정부분(10)만 빛이 투과되어 웨이퍼의 주변노광폭의 오차를 줄만큼을 노광시켜 주게 된다.In the peripheral exposure process of the semiconductor wafer in the aligner device provided with the peripheral exposure mask fabricated as described above, the wafer W is automatically aligned using the automatic alignment pattern 12 formed on the wafer. The center of the mask and the center of the mask M are exactly coincident with each other, and the portion where the chromium 11 as the light blocking portion is formed in the mask during exposure does not transmit light, and other portions of the mask M as the light passing portion 10 Only light is transmitted to expose the light enough to reduce the error of the peripheral exposure width of the wafer.
이상에서 설명한 바와 같은, 본 발명에 의한 반도체 웨이퍼의 주변노광장치는 마스크 상에 설정된 주변노광폭의 변동량이 ±5㎛이내로 감소되어 주변노광폭을 안정적으로 유지관리할 수 있게 되고, 노광 전 자동정렬을 실시하므로 주변노광되는 웨이퍼의 가장자리에 대한 위치의 변동크기가 ±1㎛이내로 유지되어 웨이퍼 가장자리 상태에 의한 주변노광 위치 즉, 폭의 변동이 없어지는 효과가 있다.As described above, in the peripheral exposure apparatus of the semiconductor wafer according to the present invention, the amount of variation in the peripheral exposure width set on the mask is reduced to within ± 5 μm, so that the peripheral exposure width can be stably maintained and automatically aligned before exposure. Since the fluctuation size of the position with respect to the edge of the wafer to be peripherally exposed is maintained within ± 1 μm, there is an effect that the variation of the peripheral exposure position, that is, the width due to the wafer edge state is eliminated.
또한, 주변노광위치에 의해 영향을 받는 웨이퍼에 형성된 칩의 로스가 없어지게 되며, 작업속도가 현저하게 향상되는 등의 효과가 있다.In addition, the loss of the chip formed on the wafer affected by the ambient exposure position is eliminated, and the work speed is remarkably improved.
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Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950005482A KR0186077B1 (en) | 1995-03-16 | 1995-03-16 | Ambient Exposure Mask for Semiconductor Wafer and Ambient Exposure Method Using the Same |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950005482A KR0186077B1 (en) | 1995-03-16 | 1995-03-16 | Ambient Exposure Mask for Semiconductor Wafer and Ambient Exposure Method Using the Same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR960035154A KR960035154A (en) | 1996-10-24 |
| KR0186077B1 true KR0186077B1 (en) | 1999-04-01 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019950005482A KR0186077B1 (en) | 1995-03-16 | 1995-03-16 | Ambient Exposure Mask for Semiconductor Wafer and Ambient Exposure Method Using the Same |
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| Country | Link |
|---|---|
| KR (1) | KR0186077B1 (en) |
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