KR0178996B1 - Method for manufacturing the capacitor of semiconductor memory device - Google Patents
Method for manufacturing the capacitor of semiconductor memory device Download PDFInfo
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- KR0178996B1 KR0178996B1 KR1019910002281A KR910002281A KR0178996B1 KR 0178996 B1 KR0178996 B1 KR 0178996B1 KR 1019910002281 A KR1019910002281 A KR 1019910002281A KR 910002281 A KR910002281 A KR 910002281A KR 0178996 B1 KR0178996 B1 KR 0178996B1
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Abstract
본발명은 커패시터 용량을 증대시킬 수 있도록 한 반도체 메모리소자의 커패시터 제조방법에 관한 것으로, 반도체기판상에 소자격리용 필드산화막, 다결정실리콘과 캡산화막이 적층구조로 된 게이트, 소오스 및 드레인영역을 차례로 형성한 후 전면에 질화막, 산화막을 차례로 도포하고 산화막을 RIE 하는 공정과, RIE 에 의해 남은 산화막을 마스크로 하여 노출된 질화막을 제거하고 캡산화막이 소정의 두께가 되도록 식각하는 공정과, 그위의 소정부분에 스토리지 노드, 유전체막, 플레이트로 된 커패시터를 형성하는 공정으로 이루어진다.The present invention relates to a method of manufacturing a capacitor of a semiconductor memory device capable of increasing the capacitance of the capacitor, in which a field isolation film for isolation of a device, a gate in which a polycrystalline silicon and a cap oxide film are laminated on a semiconductor substrate, and a source, a drain region Forming a nitride film, an oxide film on the entire surface and then RIE the oxide film; removing the nitride film exposed by using the remaining oxide film as a mask, and etching the cap oxide film to a predetermined thickness; The process consists of forming a capacitor consisting of a storage node, a dielectric film, and a plate.
산화막과 질화막으로 된 측벽을 마련하여 질화막을 돌출된 형상으로 해서 스토리지 노드의 굴곡효과를 증대시키기 때문에 커패시터의 용량이 증가되게 된다. 또한, 스토리지 노드와 콘택의 자동정렬에 따라 포토에칭 공정을 생략할 수 있는 공정 단순화의 이점도 있다.Since the sidewalls of the oxide film and the nitride film are provided to increase the bending effect of the storage node by protruding the nitride film, the capacitance of the capacitor is increased. In addition, there is an advantage of the process simplification that can omit the photo etching process according to the automatic alignment of the storage node and the contact.
Description
제1도는 종래의 방법으로 제조된 반도체 메모리소자의 단면도.1 is a cross-sectional view of a semiconductor memory device manufactured by a conventional method.
제2도(a)~(c)는 본발명에 따른 제조공정도이다.2 (a) to 2 (c) are manufacturing process drawings according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
11 : 반도체 기판 12 : 필드산화막11 semiconductor substrate 12 field oxide film
13 : 게이트 14 : 소오스 및 드레인영역13 gate 14 source and drain regions
15 : 질화막 16 : 산화막15 nitride film 16 oxide film
17 : 스토리지 노드 18 : 유전체막17: storage node 18: dielectric film
19 : 플레이트19: plate
본발명은 반도체 메모리소자에 관한 것으로, 특히 커패시터의 용량을 증대시킬 수 있도록 한 반도체 메모리소자의 커패시터 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor memory device, and more particularly, to a method of manufacturing a capacitor of a semiconductor memory device capable of increasing the capacity of a capacitor.
종래에는, 반도체기판(1)상에 소자격리를 위한 필드산화막(2)을 형성한 후 소정의 부분에 게이트(3)를 형성하고 소오스 및 드레인영역(4)에 불순물을 이온주입한 다음 게이트(3)의 측면에 산화막으로 된 측벽(5)을 형성하고 소정의 범위에 스토리지 노드(6), 유전체막(7), 플레이트(8)로 된 커패시터를 형성하여 제1도와 같은 반도체 메모리소자의 커패시터를 제조하였다.Conventionally, after forming the field oxide film 2 for device isolation on the semiconductor substrate 1, the gate 3 is formed in a predetermined portion, and the ion is implanted into the source and drain regions 4, and then the gate ( A sidewall 5 made of an oxide film is formed on the side of 3), and a capacitor made of a storage node 6, a dielectric film 7, and a plate 8 is formed in a predetermined range to form a capacitor of the semiconductor memory device as shown in FIG. Was prepared.
그러나, 이러한 종래기술에 의한 커패시터는 현재의 고집적화 추세에 따른 커패시터 유효부분의 축소에 의하여 필요한 커패시터 용량을 얻기 불가능한 문제점이 있었다.However, such a capacitor according to the prior art has a problem that it is impossible to obtain the necessary capacitor capacity by reducing the capacitor effective portion according to the current high integration trend.
본발명은 이와같은 문제점을 해결하기 위한 것으로, 본발명의 목적은 게이트의 측벽을 산화막과 질화막으로 마련하여 스토리지 노드의 굴곡을 증대하여 커패시터 용량을 증가시킨 반도체 메모리소자의 커패시터 제조방법을 제공하는 것이다.The present invention is to solve such a problem, an object of the present invention is to provide a capacitor manufacturing method of a semiconductor memory device by increasing the capacitance of the storage node by increasing the bending of the storage node by providing the sidewall of the gate as an oxide film and a nitride film. .
이하, 본발명을 첨부도면에 의하여 상세히 설명한다.Hereinafter, the present invention will be described in detail by the accompanying drawings.
제2도(a)~(c)는 본발명에 따른 제조공정도로서, 우선 제2도(a)에 도시한 바와 같이 반도체기판(11)상에 소자격리를 위한 필드산화막(12), 다결정실리콘과 캡 산화막이 적층구조로 된 소정부분의 게이트(13), 소오스 및 드레인 영역(14)을 차례로 형성한 후 전면에 질화막(15), 산화막(16)을 차례로 도포하고 산화막(16)을 RIE(Reactive Ion Etching)한다.2 (a) to 2 (c) are manufacturing process diagrams according to the present invention. First, as shown in FIG. 2 (a), the field oxide film 12, polycrystalline silicon, After the cap oxide film is formed of the gate 13, the source and the drain region 14 of a predetermined portion in a stacked structure, the nitride film 15 and the oxide film 16 are sequentially coated on the entire surface, and the oxide film 16 is RIE (Reactive). Ion Etching).
여기서, 게이트(13)가 되는 캡산화막은 다음 공정에서 소정의 두께만큼 더 식각되므로 종래의 기술보다 두껍게 형성하여야 한다.Here, the cap oxide film serving as the gate 13 is etched by a predetermined thickness in the next step, so that the cap oxide film needs to be formed thicker than the conventional technology.
그다음, 제2도(b)와 같이 RIE 에 의하여 남은 산화막(16)을 마스크로 사용하여 노출된 질화막(15)을 제거하고 게이트(13)가 되는 캡산화막을 소정의 두께가 되도록 식각한다. 이때, RIE 에 의하여 남은 산화막(16)도 어느 정도 식각이 되게 된다.Next, as shown in FIG. 2B, the nitride oxide film 15 exposed by the RIE is used as a mask to remove the exposed nitride film 15 and the cap oxide film serving as the gate 13 is etched to have a predetermined thickness. At this time, the remaining oxide film 16 is etched to some extent by RIE.
이와같이 실행되는 것에 의하여 측벽으로 사용되는 질화막(15)이 돌출된 형상을 갖게 되어 스토리지 노드의 굴곡을 증대시키게 된다.In this way, the nitride film 15 used as the sidewall has a protruding shape, thereby increasing the bending of the storage node.
이후, 제2도(c)에 도시한 바와 같이 소정의 부분에 스토리지 노드(17), 유전체막(18), 플레이트(19)로 된 커패시터를 형성하면 본발명에 따라 용량이 증가된 반도체 메모리소자의 커패시터를 얻을 수 있게 된다.Subsequently, as shown in FIG. 2C, when a capacitor including the storage node 17, the dielectric film 18, and the plate 19 is formed in a predetermined portion, a semiconductor memory device having increased capacitance according to the present invention. The capacitor of can be obtained.
이상 설명한 바와 같이, 본발명에 따르면 산화막과 질화막으로 된 측벽을 마련하여 질화막을 돌출된 형상으로 해서 스토리지 노드의 굴곡효과를 증대시키기 때문에 커패시터의 용량이 증가되게 된다.As described above, according to the present invention, since the sidewalls of the oxide film and the nitride film are provided to increase the bending effect of the storage node by protruding the nitride film, the capacity of the capacitor is increased.
또한, 스토리지 노드와 콘택의 자동정렬에 따라 포토 에칭공정을 생략할 수 있는 공정 단순화의 이점도 있다.In addition, there is an advantage of the process simplification that can omit the photo etching process according to the automatic alignment of the storage node and the contact.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019910002281A KR0178996B1 (en) | 1991-02-11 | 1991-02-11 | Method for manufacturing the capacitor of semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019910002281A KR0178996B1 (en) | 1991-02-11 | 1991-02-11 | Method for manufacturing the capacitor of semiconductor memory device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR0178996B1 true KR0178996B1 (en) | 1999-03-20 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019910002281A KR0178996B1 (en) | 1991-02-11 | 1991-02-11 | Method for manufacturing the capacitor of semiconductor memory device |
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| Country | Link |
|---|---|
| KR (1) | KR0178996B1 (en) |
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1991
- 1991-02-11 KR KR1019910002281A patent/KR0178996B1/en not_active IP Right Cessation
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