KR0177501B1 - Convergence adjustment device for color video projector - Google Patents

Abstract

The present invention relates to a convergence adjusting apparatus for a color video projector having three monochromatic projecting tubes each projecting a given color and an image on a screen, wherein the convergence adjusting apparatus comprises a second projection tube and a second projection tube, 3 acts on the scanning of the second and third projection tubes to superimpose the image of the projection tube on the screen.

The convergence adjusting device is in a digital form. The apparatus includes a RAM in which correction values are stored corresponding to the correction of a scanning current for different regions in which an image is divided. These values are restored in synchronization with scanning of the areas during normal operation. The convergence device also includes a microprocessor which, during the adjustment step, changes the value stored as a function of the command generated by the user making the adjustment into a group of regions by observation of the image.

Description

Convergence adjustment device for color video projector

1 is a schematic view of a video projector having three monochromatic video projection tubes;

Figure 2 is a general schematic diagram of a circuit according to the invention;

Figure 3 shows a geometry adjustment part;

FIG. 4 is a view showing a state in which an image is divided into a plurality of areas; FIG.

5 is a schematic diagram of an address generator included in a circuit according to the present invention;

6 (a) through 6 (f) show various signals according to an address generator.

Figure 7 shows a test pattern and a slider generator forming part of a circuit according to the invention;

Fig. 8 shows a test pattern and a slider. Fig.

Figures 9 (a) and 9 (b) show circuit operating characteristics of Figure 2;

FIG. 10 is a schematic view of an interpolator forming part of a circuit according to the invention; FIG.

11 (a) through 11 (f) are schematic diagrams showing the operation of the interpolator of FIG. 10;

FIG. 12 shows another part of the circuit of FIG. 3; FIG.

Figure 13 shows another part of the circuit of Figure 2;

Figure 14 is a schematic view of a remote control device forming part of the device of the present invention;

FIG. 15 is a diagram for explaining an adjustment sequence. FIG.

DESCRIPTION OF THE REFERENCE NUMERALS

10: Video projector 11, 12, 13: Monochrome video projection tube (CRT)

14: Horizontal deflection unit 18: Geometric correction circuit

27: microprocessor 31: integrator

35: adder 46: potentiometer

63: phase loop 65: frequency divider

80: control circuit 86: slider

90: displacement register 100: routing circuit

117, 118, 119: key

The present invention relates to a convergence adjusting apparatus of video-projectors having a plurality of video projection tubes (projection tubes).

One video projector is a kind of television receiver that projects an image on a screen having a size larger than a normal screen of a video projection tube. The most widely used form is provided with three video projection tubes for reproducing the three primary colors, i.e., red, blue and green, respectively, and has lenses for projecting images onto the screen for their respective video projection tubes. The images formed by the three video projection tubes must be completely superimposed on the screen. However, it is virtually impossible to obtain a complete superimposition of the image by simple orientation of the video projection tube and the lens. There are various reasons for this impossibility, which are the dispersion of light in the form of images formed by each projection tube inherent in mass production, and a lens refurbished with a plastic material, especially for economic reasons. The lens of such a plastic material is not provided with chromatic aberration correction and therefore does not have the same refractive index with respect to the three primary-color light. Moreover, not all of the axes of the three projection tubes can be perpendicular to the projection screen. Generally, the axis of the projection tube projecting the green image is theoretically perpendicular to the projection screen, but the axis of the projection tube projecting the red and blue images is inclined in opposite directions with respect to the vertical. Thus, the green image has a rectangular shape while the red and blue images have a trapezoidal shape having a vertical flat edge.

Thus, the video projector is equipped with a convergence correction or adjustment device. The convergence adjusting device generates currents supplied to the coils causing horizontal deflection and vertical deflection of the respective electron beams of the red and blue projection tubes so that the image projected onto the screen by the first projection tube, The red and blue images can be adjusted so as to be superimposed on each other. The correction is carried out directly on the horizontal deflection coil and the frame deflection coil using active elements and modulators, or by means of auxiliary deflector means.

[Problems to be solved by the invention]

Up to now, in order to adjust such a convergence, an analog circuit having a potentiometer is suitable for installing a convergence adjusting device in a video projector. The potentiometer generates and outputs a convergence correcting signal which can change from one region of the image to another .

On the other hand, the circuit of the present invention is configured in a digital form, and is inexpensive, and in particular, to provide a convergence adjustment device capable of a large number of adjustments without requiring a specific function suitable for the operation.

[MEANS FOR SOLVING THE PROBLEM]

In the present invention, the convergence adjustment circuit of a video projector having three projection tubes is provided with a random access memory (RAM) for storing a value indicative of a correction to be applied to a scanning current for each of N regions where an image is divided into N regions, ) 28 and an area or group of areas through, for example, observing the image of the operator to superimpose two sliders or cursors (simple shapes) of different colors, A processing device, such as a microprocessor, which performs the content modification of the memory as a function of the command, and a correction value stored in the memory that is automatically operated and executed upon normal use of the video projector, And means for providing an automatic adjustment sequence with a number of steps.

In the first step, the adjustment is made by observing the slider at the center of the image, and the microprocessor controls the change of the correction value in the memory to move the entire red image and the entire blue image, that is, do. In the following subsequent steps, the number of regions affected by the adjustment gradually decreases.

The automatic adjustment sequence has the advantage that it can be executed more quickly than adjusting each for each area. In addition, since the first adjustment step affects the entire image, that is, the adjustment is not performed for each divided area, but the first overall adjustment of the image is performed, the time in the first step is much shorter .

In order to carry out the adjustment, in one embodiment of the present invention, the operator can use a remote control device, which is in the form of a normal infrared light with a plurality of keys installed, Can be stored in the memory. As a result, a slider of a given color on the screen moves in a given direction (vertical and horizontal). Therefore, four correction signals are included in each region of the RAM. That is, the first signal is a correction signal for horizontal red, the second signal is a correction signal for vertical red, the third signal is a correction signal for horizontal blue, and the fourth signal is a correction signal for vertical blue. When adjustment is made for each area, the blue slider must be moved to overlap the slider for each area, and the same must be done for red. That is, the red slider must be moved to overlap the green slider.

Furthermore, it is preferable that adjustment is made by moving the slider by an amount of increase in which each correction value in the area of the memory corresponding to each step is increased (or decreased) with respect to the adjustment made at various stages.

In this case, in order to avoid accumulation of inaccuracies due to the characteristics of the multi-value signal at each step, it is advantageous that the correction value stored in the memory is changed in the following manner at each step. Subtracts n increments from the contents of the memory. Where n represents the number of steps previously made for the final movement of the slider. The increment of (n + 1) or (n-1) times is added to the result of the subtraction according to the direction of movement.

In a preferred embodiment of the present invention, the video projector is in a form that is usable in a television system with a different number of scanning lines, and the microprocessor is adapted to calculate a change in the correction signal value without having to re-adjust when the image changes. Thus, a video projector that has been adjusted by the operator with the SECAM method (625 lines) can be used for an NTSC video tape recorder with 525 scan lines per frame instead of 625 scan lines automatically without any further adjustments.

An address generator is used to divide an image into regions. The address generator has an oscillator that operates at an even multiple of the horizontal scanning frequency, for example, 64 times the frequency, and is in synchronization with the line scanning signal going on in the oscillator. The address generator also has at least one frequency divider with a parallel output, from which a reduced frequency signal appears. Some of the states of the pulse signals at those frequencies are used to represent the horizontal coordinates of the divided regions and other pulse signals of the lower frequencies are used to represent the vertical coordinates of the regions according to the respective states. Preferably, the highest one of the first two outputs of the divider controls a sequence for reading or adjusting the four correction signals of each region of the memory.

In a multi-mode video projector, the divider has two parts. The first part is for generating a pulse for reading the correction signal of each area and the address pulse in the horizontal direction and the second part is for generating the address pulse in the vertical direction. The second part receives the supply from the first part, and includes 24 lines for the SECAM method and 20 lines for the NTSC, but it is programmable so as to change the number of lines in the area depending on the method .

Video projectors typically include a geometric correction circuit. For convergence adjustment, it works on the scanning of two projection tubes, but the geometry correction circuit works on the scanning of the three projection tubes. By such an action, a normal distortion of a television image such as a horizontal distortion and a horizontal distortion is corrected, together with distortion peculiar to the video projector due to inclination of the axis of the projection tube with respect to the perpendicularity to the screen surface. In fact, in most cases, the axes of the plurality of projection tubes relative to the vertical screen are not within a horizontal plane, but within a horizontal plane that is inclined upward relative to the projection direction. In addition, the shape on the projection surface also causes geometric distortion. Similar to the convergence defect, such geometry defects are corrected by acting on the horizontal and vertical deflection fields by the geometry correction circuit. Some geometric corrections are independent of the orientation of the projection tube or the shape of the screen relative to the screen. These corrections are usually made by the manufacturer. Other corrections are made by the operator (or installer). These corrections are defects such as horizontal trapezoid, vertical linearity and vertical amplitude. The vertical amplitude defect is the divergence of the height with respect to the vertical, the vertical linearity defect is the nonconservation of the distance in the vertical direction, and the horizontal trapezoidal defect is the deformation of the image, Lt; RTI ID = 0.0 > horizontal < / RTI > edge. In addition to the convergence adjustment circuit, the adjustment device of the present invention preferably includes a geometry adjustment circuit that can be used by the operator, and the adjustment such as convergence adjustment is preferably operable by a remote control device.

[Example]

Other features and advantages of the present invention will become apparent from the following description of embodiments with reference to the accompanying drawings.

FIG. 1 is a schematic view showing a video projector of an embodiment. FIG. In the first figure, the video projector 10 of the embodiment includes three projection tubes 11, 12 and 13 for three monochromatic images, each of which has a rust (V), red (R) and blue A monochromatic image is projected on the screen 9 through the respective lenses 11 ₁ , 12 ₁ , and 13 ₁ . Each projection tube has a main deflector for horizontal and vertical main use of the electron beam generated from the electron gun and a pair of auxiliary deflectors acting on the electron beam for geometric and convergence correction. In Fig. 1, it is shown that the green projection tube 11 is comprised of a main deflector pair denoted by reference numeral 11 ₂ and a pair of auxiliary deflectors denoted by reference numeral 11 ₃ .

As shown in FIG. 2, each pair of deflectors is formed of two coils, one for horizontal deflection and the other for vertical deflection. Reference numerals in FIG. 2 add G, R and B suffixes for indicating projection tubes for green (G), red (R) and blue (B), respectively. Each deflection coil is supplied with a current by a corresponding convergence amplifier. Reference numeral 16 denotes a convergence amplifier for horizontal deflection, and reference numeral 17 denotes a convergence amplifier for vertical deflection. Each of the amplifiers 16 and 17 outputs a current proportional to each input voltage. For example, the deflection of the spot relative to a nominal position on the screen is proportional to the density of the current flowing through the deflector.

In the second figure, the geometric correction circuit 18 and the convergence adjustment circuit 19 are shown. The geometry correction circuit 18 has three outputs 18 ₁ , 18 ₂ and 18 ₃ , the outputs 18 ₁ and 18 ₃ being connected to the inputs of all horizontal and vertical convergence amplifiers and the third output 18 ₃ control the east-west modulator (not shown) associated with the main deflector. 3, the main part of the geometric correction circuit 18 is shown. The geometric correction circuit 18 has two inputs 18 ₄ and 18 ₅ each of which has a horizontal (or line) scanning frequency fh and a vertical (or frame) scanning frequency fv, Lt; / RTI >

The geometric correction circuit 18 is connected to the three pairs of convergence amplifier (16 _G and 17 _G, 16 _R and 17 _R, 16 _B and 17 _B). On the other hand, the convergence correction circuit 19 is connected to only two pairs of convergence amplifiers for the red projection tube 12 and the blue projection tube 13. In order to simultaneously provide the outputs of the circuits 18 and 19 to the convergence amplifiers 16 _R , 16 _B , 17 _R and 17 _B , adders 20 _R , 20 _R, 20 _B , 20 _B ) is provided.

Like the circuit 18, the circuit 19 is also provided with two inputs 19 ₁ and 19 ₂ to which the horizontal scanning frequency (low) and the vertical scanning frequency fv are inputted. A digital-to-analog converter (not _shown ) is provided in front of the outputs 19 ₃ , 19 ₄ , 19 ₅ and 19 _{6 of} the convergence circuit 19 for inputting to the adders 20 _R and 21 _R , 20 _B and 21 _B , (22 _R , 23 _R , 22 _B , 23 _B ) are provided. The convergence adjustment circuit 19 is provided to superimpose the red and blue images on the green image. The operation is performed by dividing the image on the screen into 208 divided areas. That is, as shown in FIG. 4, the image on the screen is divided into 16 regions in the horizontal direction from 0 to 15, and an initial region 24 corresponding to the next frame suppression interval is obtained. . In Fig. 4, the rectangle 25 defined by the thick dashed line represents the visible region of the image on the screen. The sagittal shows the ss time (t) in the horizontal direction together with the area number, and the vertical axis shows the scanning line of SECAM or PAL first half frame with 625 scanning lines per picture from the top to the bottom have.

Each region is assigned four correction values, i. E., The signals of outputs 19 ₃ through 19 ₆ .

The segmentation of the image is performed by an address generator 26 which operates in accordance with the frequencies fh and fv. In the case of the method conversion, a microprocessor 27 forming part of the convergence circuit 19 is used to correct the sequence of the address signal, and a signal from the remote control device (FIG. 14) is received at its input 27 ₁ . The microprocessor 27 may calculate the correction signal.

These correction signals are stored in the RAM 28 having a 2K byte capacity. The RAM 28 has an input 28 ₁ connected to the output of the address generator 26 and an input 28 ₂ connected to the input-output 27 ₂ of the microprocessor 27. A battery (not shown) is coupled to the RAM to safely protect the contents of the memory when the circuit is powered off from the power supply.

The output 28 ₃ of the RAM 28 is connected to the input of the interpolator 29. The interpolator 29 serves to smooth the correction value from one vertical region to another region in the same row, as described later. The output signal of the interpolator 29 is supplied to a demultiplexer 30 connected to four outputs 19 ₃ to 19 ₆ output by the digital-to-analog converters 22 and 23 in series, .

The microprocessor 27 is used in the convergence adjustment step to change the contents of the RAM 28 as a command function caused by the operator. In addition, the microprocessor 27 can be used in the memory 28, for example, in response to a change in the video mode without arbitrary adjustment of the operator, when converting from the SECAM system to the NTSC standard system having 525 scan lines. Is used to automatically convert the correction value stored in the memory. In other words, there is no need for any new adjustments in the case of transformation.

[Geometric Correction Circuit 18 (FIG. 3)]

3, the main part of the geometric correction circuit 18 is shown. The circuit 18 generates a signal for correcting the geometrical defects of the image inherent to the television scanning which is usually performed. The change of the signal can not be changed by the operator. In addition, the circuit 18 generates a signal adjustable by an operator via a remote control device connected to an input (18, _6). Adjustments that can be made by the operator are adjustments to compensate for the non-perpendicularity of the three beams of light projected by the lenses 11 ₁ , 12 ₁ , 13 ₁ to the screen 9. The adjustment first affects all vertical amplitudes, i.e., changes the height of the image. In addition, such adjustment also acts on the perpendicularity in the vertical direction, i.e., the distance in the vertical direction is reset by such adjustment. Finally, the operator may make horizontal trapezium adjustments. The adjustment is for adjusting the length of the line so that the image is formed into a rectangular shape.

Also, what can not be controlled by the operator are vertical amplitude, vertical linearity, and horizontal trapezoidal shape adjustment. Furthermore, there are correction for horizontal linearity, horizontal amplitude, horizontal curvature, north-south cushion and east-west cushion.

(F _h ) and frame frequency (f _v ) so as to form respective signals proportional to x, x ² , y, y ² , xy and x ² y for fixed geometrical shape correction, The reference voltage V _ref is integrated. Where x and y represent the horizontal and vertical marks of the spot on the screen, respectively.

For adjustable so-called variable geometry correction by the operator, the control voltage (V _cont) for the adjustable value by the operator from the remote control device is integral with the frame frequency so as to form a signal proportional to y, and y ^2.

The reference voltage signal V _ref is supplied to an input of a first integrator 31 reset to a line frequency f _h and an input of an integrator 32 reset to a frame frequency f _v . The integrator 31 outputs the signal x and its output is supplied to the input of the second integrator 33 which is controlled by the frequency f _h . The second integrator 33 outputs the signal x ₂ .

The output of the integrator 31 is connected to the first input of the multiplier 34. The output signal y of the integrator 32 is received at the second input of the multiplier 34. The output of the multiplier 34 thereby generates a signal xy which is applied to the input 35 ₁ of the adder 35 via the horizontal trapezoidal adjustment potentiometer 36.

The output signal of the integrator 31 is also applied to the second input of the adder 35 ₂ via a potentiometer 37 for adjusting the horizontal amplitude. The adder 35 has a third input 35 ₃ and at its input receives the output signal x ² of the integrator 33 together with a coefficient according to the adjustment of the horizontal linearity potentiometer 39. The output of the adder 35 forms the horizontal correction output 18 ₁ of the generator 18.

The output signal x ² of the integrator 33 is also applied to the first input 41 ₁ of the other adder 41 via the potentiometer 42 for adjusting the horizontal curvature. The output of the adder 41 forms the vertical correction output 18 ₂ of the generator 18.

The output xy of the multiplier 34 is applied to the input of another integrator 43 controlled by the frequency f _h and the output signal x ² y of the integrator 43 is fed via the potentiometer 44 to the adder 43, Is supplied to the second input 41 ₂ of the switch 41. The signal of the second input 41 ₂ of the adder 41 is applied to the vertical distortion correction.

The output of the integrator 32 which generates the signal y is supplied to the third input 41 ₃ of the adder 41 via a potentiometer 45 which adjusts the vertical amplitude. The output signal of the integrator 32 is also supplied to the first input 47 ₁ of the adder 47 via the potentiometer 46. The output of the adder 47 forms the output 18 ₃ of the circuit 18 connected to the horizontal modulator, i. E., The circuit performing the x-fold multiplication. The signal supplied to the input 47 ₁ is applied to horizontal trapezoidal correction.

The output signal y of the integrator 32 is applied to the input of another integrator 48 controlled by the frame scan frequency and the output signal y ² of the integrator 48 is applied to the adder 41 via potentiometer 49 ) it is supplied to the fourth input (41 _4). The signal applied to its input 41 ₄ contributes to the vertical linearity correction. The signal y ² is also supplied to the second input 47 ₂ of the adder 47 through the potentiometer 50 which performs the horizontal distortion correction.

The adjustable control voltage (V _cont) by the operator through the key 130 of the remote controller 14 degrees are supplied to the input of the integrator 51 is controlled by a vertical frequency (f _v). The output of the integrator 51 accordingly outputs a signal proportional to y, that is,? Y. The signal y is supplied to a fifth input 41 ₅ of the adder 41 via a resistor 52 (or several resistors) that multiplies the coefficient K ₁ . The signal (K _1? Y) of the input 41 ₅ enables the vertical amplitude correction.

The output signal y of the integrator 51 is supplied to the third input 47 ₃ of the adder 47 through the resistor 53 (or several resistors) which multiplies the coefficient K ₃ . The signal applied to the third input 47 ₃ contributes to horizontal trapezoidal correction.

Finally, the signal? Y is supplied to an input of an integrator 54 controlled by a vertical scanning frequency and the output signal? Y ² of the integrator 54 is multiplied by a coefficient K ₂ , with over resistor 55 it is supplied to the sixth input (41 ₆₎ of the adder (41). The signal (K _2? Y ² ) applied to the input 41 ₆ contributes to the vertical linear correction.

A horizontal modulator that receives the output signal of adder 47 and forms part of the basic circuitry of the video projector performs the largest amplitude correction, and is particularly useful for performing horizontal keystone correction, which is the most important correction.

Finally, the reference voltages of the integrators 32, 48, 51, 54 for the vertical direction frequency can be adjusted under the control of the microprocessor 27 during the conversion of the system. Further, as will be seen from the following description, the reference voltages of the converters 22 and 23 are also adjustable for the same reason.

[Convergence adjustment circuit (19)]

[Ⅰ. Address generator 26 (FIG. 5)

5, the shaping circuit 60 for converting a substantially sinusoidal pulse into a stepped (rectangular) pulse has two inputs 19 ₁ and 19 ₂ , each of which has a frequency f _h And f _v ) signals are supplied.

The shape of the shaping circuit 60 is shown in Figures 6 (a) and 6 (b) for the signal at the horizontal scanning frequency. A signal 61 as shown in FIG. 6 (a) is supplied to the input 19 ₁ of the shaping circuit 60. The signal appears between 0 and 12 μsec of each line, ie, between line scanreturn periods. The pulse signal 61 substantially changes to a sinusoidal wave, and its maximum value is at t = 6 mu sec. At the output 60 ₁ , the signal f _h 'is also obtained at the horizontal scanning frequency. However, the signal f _h " 'is a spherical pulse 62 as shown in FIG. 6 (b).

The signal f _h 'is supplied to the phase Pupp 63. The phase loop 63 includes a VCO 64 and the output 64 ₁ of the VCO 64 generates a 1 MHz frequency signal in a synchronous period 65, The synchronization of the signal of the oscillator 64 with the input signal f _h 'is obtained by connecting the output 65 ₅ of the frequency divider 65 to the second input of the multiplier 66, 1 input receives the signal f _h 'and its output is connected to the control input 64 ₂ of the oscillator 64.

The synchronous frequency divider 65 has six outputs 65 ₀ through 65 ₅ each of which has the signals A ₀ through A ₅ shown in Figures 6 (c) through 6 (h) . The signal A ₀ is a periodic square wave signal with a cyclic ratio of 1/2 of the frequency of 0.5 MHz which is 1/2 of the output signal frequency of the oscillator 64 and the signal A ₁ is the frequency of the signal A ₀ The frequency of the signal A ₂ is 1/2 of the signal A ₁ and the signals A ₃ to A ₅ are also the same frequency as described above. As a result, the signal A ₅ has a frequency of 15,625 Hz, that is, a line scanning frequency f _h .

The signals A ₀ and A ₁ are used in each region to control the read-in (or read-out) timing of the correction signal for the convergence amplifier. Hence, when A ₀ = 0, the correction signal is read-in (or read-out) for the auxiliary horizontal convergence change. For example, when A ₀ = 1, it is a correction signal for a read-in or a read-out vertical change. If A ₁ = 0, the red channel R is stored (or activated), and if A ₁ = 1, it is associated with the blue channel B.

The four remaining signals (A ₂ through A ₅ ) form a binary number of bits representing sixteen horizontal columns or one number in the region (FIG. 4).

The number of rows or regions in the vertical direction is obtained by a programmable divider 68 whose outputs 68 ₆ through 68 ₉ are in programmable divider 68 and whose respective outputs are 4 It is generated a signal indicative of the bits (a ₆ to a _9). A reset pulse is applied to the input 68 ₁ of the divider 68 to be reset at the beginning of each frame, which reset pulse is applied by the control circuit 69. To reset each frame start of the respective said control circuit (69) input (69 _1), the rectangle signal (f of the vertical scanning frequency is connected to the output of the shaping circuit 60, at its input (69 ₁₎ of _v ').

In and provided with the control circuit 69 has another input (69 _2), the input (69 ₂₎ to the television system, i.e. the signal representing the number of each of the lines per frame. In fact, when a row in a picture is divided into a predetermined number 13, the number of lines per area varies depending on the method. As a result, in the case of the scheme having the number of lines of 625, each area has 24 lines per half frame, and in the scheme having 525 lines, each of the areas has 20 lines in 1/2 frame. The control circuit 69 has four parallel outputs 69 ₃ to 69 ₆ input to the divider 68 so that the division factor is set such that each region is divided into lines And the like.

Finally, the control circuit 69 has an output 69 ₇ , as described below, and its output 69 ₇ is transferred from the RAM 28 to an integrator forming part of the interpolator 29, .

The purpose of the interpolator 29 is to smoothen the correction values from the vertical area to the other vertical areas.

Ⅱ. Smoothing between successive regions in the horizontal direction necessarily occurs due to the response time of the auxiliary coils and the convergence amplifier. The response of the convergence amplifier to the associated coils is shown in Figures 9 (a) and 9 (b). Figure 9 (a) shows the signal (v) supplied to the input of the convergence amplifier, and Figure 9 (b) shows the signal (Δx) obtained in the corresponding coil. The assembly of the amplifier and the coil has a rise time Bessel response equal to one region width in the horizontal direction (4 μs).

[III. Interpolator 29 (FIGS. 10 and 11)

The problem of smoothing in the vertical direction (the problem compared with horizontal smoothing) depends on whether the area concerned is not contiguous in time.

Prior to describing the interpolator with reference to FIG. 10, the principle of the above-described Sunny type interpolation will be described with reference to FIGS. 11 (aa) to 11 (f).

Linear interpolation is achieved by assigning a constant value appearing in segment 71 of segment 11 of FIG. 11 (aa) and segment 71 of FIG. 11 (bb) to each initial region between frame returns. On the other hand, the correction signal does not remain constant in other regions of the same vertical row (column), but changes linearly. The linear variation is shown by the segments 71 ₁ , 71 ₂ , ... of the eleventh (bb) diagram. The linear rate of change is generally different for each region. That is, for each region, the inclination of the segment 71 ₁ , 72 ₂ , etc., i.e., the rate of change of the correction signal of the region is assigned. Therefore, in FIG. 11 (a), the inclination of the first visible region of the image is shown as a segment 70 ₁ ..., And the inclination of the second visible region is shown as a segment 70 ₂ .

Of course, adjacent segments of the eleventh (bb) are connected to each other. That is, there is no discontinuity with respect to the change of each region in the vertical direction, but the change with time is simple. For example, in a certain region z, the correction signal V _si shown in FIG. 11 (bb) changes as follows.

V _si = V _si-1 + (1 / t) V _ei (tt _i-1 ) (One)

In the above equation, t represents the duration of one region in the vertical direction, that is, the period of 24 lines in the 625 scanning method or the period of 20 lines in the 525 scanning method. V _si-1 represents a value reaching the signal (Vs) of the last line of the preceding area, and tt _i-1 is the start time of the area.

Segments (70, 70 ₁₎ is the duration of the 11 (bb) separate segments (71, 71 _1, 71 _2, ...), etc. Similarly, represents the signal envelope, each of the lines [width of one row (column); 0.0 > 1/16 < / RTI > That is, the segments 70 and 71 are not continuous segments as shown but are continuous segments parallel to the axis of the abscissa.

In the column of the visible image, when it is desired to change the correction signal, the slope in the region is increased (or decreased). That is, the signal Ve for the region is increased (or decreased) by (DELTA Ve). However, in order not to affect the continuous region, the signal in the succeeding vertical region is reduced (or increased) by the same amount (DELTA Ve) (FIG. 11 (c)). Therefore, as shown in FIG. 11 (d), the signal Vs can be changed only for the problem area and the next area. As a variation, the previous area can be taken for the change instead of the next continuous area.

As shown in FIG. 11 (f), in order to correct the same value for all the regions in the same column, the correction is performed in the initial region (frame retrace) by a corresponding amount to obtain a desired result It is sufficient to shift the assigned signal Ve.

Four correction values correspond to each area. That is, there are horizontal red, vertical red, horizontal blue, and vertical blue. In other words, for each column, four segments 70 are provided in the initial region, and four slope values are provided for the visible region.

An interpolator providing the functions described with reference to Figures 11 (aa) through 11 (f) is shown in Figure 10. The interpolator includes a multiplexed digital integrator formed of a buffer memory 75 having a capacity of 64 words of mainly 12 bits and an adder 76 for adding 12-bit words.

The integration is intended to increase the contents of the memory 75 by an increment value which is a function of the signal value Ve of the area shown in FIG. 11 (aa), for each line. The increase is accomplished by an adder 76. With reference to equation (1), the increment has an increase of V _ei / 20 for the NTSC scheme, with a V _ei / 24 for the 625 line scheme.

The integrator receives the information from the memory 28 and controls the signal of the address generator 26.

In FIG. 10, lead 77 is connected to the output of memory 28. This supplies a digital 8-bit signal to the input 76 ₁ of the adder 76 while supplying the same digital signal to the input 78 ₁ of the holding circuit 78 as well. The signal provided by the address generator 26 is a ₁ MHz signal on the lead 79 connected to the input 80 ₁ of the control circuit 80 and a 1 MHz signal on the lead 79 connected to the input 80 ₂ of the control circuit 80 81) a signal (V ₁₎ for controlling the initial value in the frame retrace end of the line 22 of the PAL-SECAM system it is delivered by. The address signals A ₀ to A ₅ corresponding to the number of columns are also transferred to the input 75 ₁ of the buffer memory 75 by the conductor 82. The control circuit 80 not only forwards the R / W signals to the respective inputs 78 ₂ and 83 ₁ of the latch circuits 78 and 83 but also to the corresponding input 75 ₂ to the memory 75, .

The buffer memory 75 has an input-output 75 ₃ of data. The input-output 75 ₃ of the data is connected to the output 78 ₃ of the latch circuit, the second input 76 ₂ of the adder 76 and the output 83 ₃ of the second latch circuit 83 have. The data input 83 ₃ of the second latch circuit 83 is connected to the adder 76.

The interpolators described with reference to Figure 10 operate in multiple ways and operate according to Figures 11 (aa) through 11 (f).

That is, at the end of the frame retrace on line 22 when using the PAL or SECAM system, the address generator adds an initial signal to the input 80 ₂ of the control circuit 80. The initial signal is an 8-bit 64-word buffer memory 75 supplied by the memory 28 (second diagram) corresponding to the signal Ve in the initial region (also in FIG. 11 (aa) To the input 78 ₂ of the latch circuit 78 for delivery to the latch circuit 78. Each of them has four correction values, i.e., horizontal red, vertical red, horizontal blue, and vertical blue.

As the buffer memory 78 has a 12 bit capacity, the 8 bits of the word supplied by the memory 28 are the most significant bits, while the 4 least significant bits of each word of the memory 75 are at this stage Reset.

The loading step of the buffer memory 75 may continue between one line or several lines.

In the next line, after the loading of the memory 75, the integrating operation is performed as follows. For example, the first correction value Ve, which is a visible signal corresponding to the horizontal red color for the area 0, is transmitted to the input 76 ₂ of the adder 76, ₁ ) < / RTI > The value of the increment becomes V _0/24 when each vertical area includes 24 lines as in the conventional equation (1).

The signal Vs is thus obtained at the output 76 ₃ of the adder 76 and the signal Vs corresponds to the first point 71 (also eleventh (bb)) of the segment 71. The result of the addition, that is, the signal Vs which is a word of 12 bits, is supplied to the memory 75 via the latch circuit 83, and the result is substituted for the initial value V ₀ recorded in the memory 75 do. The signal Vs at the output 83 ₂ of the latch circuit 83 is transferred to the demultiplexer 30 (FIG. 2) via the lead 84.

The entire operation is continued for 1 [mu] s. The new value is read into the memory 75 according to the control of the signal change delivered by the leads 79 and 82. [ That is, the value corresponds to the vertical red color of the initial region (frame retrace line). Thus, the process described above is restarted. That is, the first integration step is performed. As the duration of one line is 64 μs, 64 correction signals per line are easily processed.

In the next line, the integral operation continues. That is, through the segment 71 ₁ . After the 24 frame line, at the end of the first column (row), under the control of the address generator, the memory 28 delivers a new value Ve for each of the 64 correction signals. Thus, the segment 71 ₂ is covered and the operation continues to the end of the frame.

[IV. Cover and pattern generator (FIGS. 7 and 8)]

In order to facilitate convergence adjustment, a cross-shaped slider formed by two bright lines is projected onto the screen. The cross shape is formed by a red or blue vertical line 85 ₁ and a horizontal line 85 ₂ , and the cross shape is adjusted. The green slider 86 is also the same. Each of these sliders is in the area to be adjusted.

The operator adjusts the movement of the slider 85 by manipulating the movement of the slider 85 in order to superimpose the slider 85 on the slider 86.

Further, in order to facilitate the adjustment, the pattern areas 87 formed by the horizontal or vertical lines of red or blue to be adjusted and the pattern 88 of the same pattern as the pattern 87 are projected on the screen . The luminance of the patterns 87 and 88 is lower than the luminance of the sliders 85 and 86. [

To form the slider and the pattern, the circuit of FIG. 7 is used. The circuit of FIG. 7 includes a shift register 90, together with the input 90 ₁ received by the microprocessor 27, the address of the region to be adjusted. The address is formed by a 4-bit word for the horizontal axis and a 4-bit word for the vertical axis. The microprocessor 27 also outputs the clock signal H to the input 90 ₂ of the register 90. The parallel output of the register 90 is connected to the first input 91 ₁ of the comparator 91. The second input 91 ₂ of the comparator 91 receives the words (A ₂ , A ₃ , ..., A ₉ ) indicating the scanning of the screen area, as described above.

Therefore, a signal is obtained only when an associated region appears in the output 91 ₃ of the comparator 91. This signal is supplied to the input 92 ₁ of the generator 92 of the slider 85 or 86. The slider generator 92 generates a horizontal segment 85 ₂ and a vertical segment 85 ₁ . The generator 92 is also provided with an enable input 92 ₂ for receiving an enable signal by the microprocessor 27 and _two inputs 92 for receiving the signals A ₁ and A ₆ by the address generator, ₃ and 92 ₄ ). These two inputs are used to generate a slider (cursor) due to the transitions of the signals A ₁ and A ₆ simultaneously with the output of the comparator 91.

In addition, signals A ₁ and A ₆ are used by pattern generator 93 to generate patterns 87 and 88. The pattern generator 93 includes an input 93 ₃ for receiving an enable signal from the microprocessor 27 along with two inputs 93 ₁ and 93 ₂ for receiving the signals A ₁ and A ₆ .

The output of the slider generator 92 is connected to the first input 94 ₁ of the adder 94 and the output of the pattern generator 93 is connected to the second input 94 ₂ of the adder 94. However, a signal coefficient (1/2) is assigned to the second input 94 ₂ of the adder 94. Thus, the slider 85 or 86 is brighter than the pattern 87 or 88. [

The image areas are located by the patterns 87, 88. However, as described below, in the so-called automatic operation mode, the pattern is not projected on the screen. This is because the disable signal is applied to the input 93 ₃ of the generator 93. In this case, the slider automatically moves to the area to be steered. The movement from one area to another is provided in a sequence controlled by the microprocessor 27.

[V. Demultiplexer 30 and digital-to-analog converters 22 and 23 (FIG. 12)

Output leads 84 of the interpolator 29 is connected to a respective input of the latch circuit _{(96 R, 96 B, 97} R, 97 B). The latch circuit 96 _R stores correction signals for red and vertical directions, the latch circuit 96 _B stores correction signals for blue and vertical directions, and the latch circuits 97 _R and 97 _B store correction signals for horizontal and vertical directions And red correction signals, and horizontal and blue correction signals, respectively. The selective storage is performed in accordance with a control signal output by a control circuit not shown. The control circuit outputs clock signals (H _RV , H _BV , H _RH , and H _BH ) to the latch circuit when the correction signal corresponding to the lead 84 appears by the signals (A0, A1). Further, latch circuits _{(96 R, 96 B, 97} R, 97 B) is to return the calibration signal is applied in series with their input in phase.

The DA converters 23 _R and 23 _B , which convert the correction signal for the vertical deflector, have a zero amount of 12 bits to avoid vertical discontinuity. On the other hand, the discontinuity in the horizontal direction is less problematic. This is because the DA converters 22 _R and 22 _B are in the form of 8 bits.

Further, DA converters (23 _R and 23 _B) provided between the auxiliary vertical convergence deflector corresponding to the respective sample-and-hold circuit (99 _R and 99 _B) that is inserted. The holding circuits (99 _R and 99 _B) each of which supplies a control signal (S _RV and S _BV) by the pulse (A ₀ and A ₁₎ of the control circuit, the supplied signal (S _RV and S _BV) As a control signal. Sampling and holding circuit, such as that can overcome the transducer (23 _R and 23 _B) middle status parasitic (parasite intermediate states) obtained from the output of the [so-called the rich (glitch)].

[VI. RAM 28 and microprocessor 27 (FIG. 13)

The RAM 28 having a 2K byte capacity has a correction signal supplied to the auxiliary convergence deflector in normal use of the video projector. The RAM 28 is loaded under the control of the microprocessor 27 during the preliminary adjustment step. The address input 28 ₁ of the RAM 28 is thus connected to the address generator 26 via the path indicating circuit 100 and to the center unit 102 of the microprocessor 27 via another path indicating circuit 101 And the address output 27 ₃ of the flipflop. The path designation circuits 100 and 101 only transmit information in the direction of the address input 28 ₁ side. Thus, when one circuit becomes impossible, another circuit is controlled to be possible.

The circuit 100 transfers a signal A ₀ to A ₉ of 10 bits or more to the input 28 ₁ of the RAM 28. The output 27 ₃ of the microprocessor supplies a 10 bit address signal to the RAM 28 in the adjustment step.

The microprocessor 27 includes a central processing unit 102 and an EPROM memory 103. The EPROM memory 103 has a capacity of 4 Kbytes including a program or program data for a central processing unit and the EPROM memory 103 has an address input connected to the address output 27 ₃ of the central processing unit 102 103 ₁ ). The address signal supplied to the input 103 ₁ is 12 bits. The data output 103 ₂ of the EPROM memory 103 is connected to the data input-output 27 ₂ of the microprocessor and is also connected to the same bus 105 or data lead Output 28 ₂ of the memory 28 by the data input /

The path indicating circuit 106 is enabled in one direction or another direction according to the received order.

14. The method of claim 13 also, the input to the microprocessor a signal from a remote control unit showing a signal receiving input (27 ₁₎ and 525 or 625 scanning lines supply system (27, ₄₎ is shown. Further, it connected to the enable input (93 ₃₎ of the pattern generator 93 (the seventh) output (27, _5), the input (90 ₁₎ of the register (90) for outputting an address of the slider (85 or 86) an output (27, ₆₎ and a memory output (27, ₇₎ for controlling (28 and 103) and a path indication circuit (100, 101, 106) together connected to is shown.

[Change of television system]

In the normally used display mode after adjustment, the microprocessor 27 is used to control the change of the area and the correction signal when the signal of the input 27 ₄ indicates a change of manner. The signal supplied to the input 27 ₄ of the microprocessor 27 is output by a scheme detection circuit (not shown) having, for example, a simple contact stud switch. Further, the signal of the mode detection circuit is also supplied to the input 69 ₂ of the circuit 69. The circuit 69 is connected to the address generator 26 (FIG. 5) to change the division ratio of the divider 68 in the same way as the counting sequence, especially resetting (input 68 ₁ of divider 68) .

As described above, each area includes 20 lines in the case of the 525 method and 24 lines in the 625 method. Due to the different number of lines of each of the respective areas, the interpolation effect executed by the integration of the eleventh (aa) to eleventh (f) diagrams can be applied to different parameters according to the standard method, It is obvious that it uses.

In one embodiment, all correction signals are replaced with values that vary in inverse proportion to the number of lines in each region, with all values corresponding to the segment (70 ₁ , 70 ₂ , etc.) (Figure 11 (aa) Lt; RTI ID = 0.0 > microprocessor configured to < / RTI >

In another simple embodiment, the amplitude of the signal delivered by D-4 converters 22 and 23 is changed, for example, by varying the reference voltage in inverse proportion to the number of lines in each region, And 23, the gains of the convergence amplifiers 16 and 17 can be used. In the above embodiment, the initial adjustment values indicated by the segments 70 and 71 (eleventh (aa) and eleventh (bb) diagrams) are also changed. Thus, one signal value per column is changed.

Through the above embodiment, when the adjustment is made in the 625 line standard method and the video projector for the 525 line standard method is used, the reference voltage of the converters 22 and 23 or the gain of the amplifiers 16 and 17 (24/20) = 6/5 ratio, and the initial value (V ₀ ) is multiplied by an inverse rate constant, i.e., 5/6.

The calculation essentially uses the approximation method, e.g., returning from the 525 line back to the other standard way back to line 625, so that the initial value need not be found again and during the first adjustment operation, It needs to be stored in the memory. To this end, the areas of the RAM 28 are used to maintain the calculated values during adjustment, and their values are not actually changed, but are used as a reference in each conversion of the standard method.

Therefore, video projectors can easily be used with other standard methods.

If the adjustment is made in the 525 line standard method to the 625 standard method, the initial value (V ₀ ) is multiplied by 6/5, and the reference voltage of the DA converter or the gain of the amplifier is changed to a 5/6 ratio.

[Remote control device 110 (FIG. 14)]

To control and adjust the video projector, the operator uses the remote control device 110 shown in FIG. 14. The remote control device 110 has a normal key. The key 111 stores a channel number, and the key 112 is used for volume, brightness, color density adjustment, station tuning, and tuning frequency . The remote control device 110 also has a key assembly 113 and is used for geometric and convergence adjustments. The switch 114 may also switch the remote control device 110 according to its position to the N mode for controlling the function of the video projector, i.e., the mode of use of the keys 111 and 112, or two modes as shown in FIG. 14 525 < / RTI > and 625 line schemes. Also, the position indicated by RESET is used to reset or restore the contents of memory 28 to the initial state.

For example, the adjustment is performed in the following two modes. The first is the so-called passive mode, in which the adjustment in which the convergence adjustment is performed in one area does not affect the adjustment in the other area, and the adjustment of the convergence is done in each area. The second is an automatic mode, in which the entire image is displayed for each adjustment. The operation of the key 115 controls the adjustment of the manual mode. The operation of the key 116 is to direct movement to the automatic mode.

In the manual adjustment mode, the operation is as follows. For example, the user presses the key 115 by the user switching to the convergence position corresponding to the scheme using the switch 114, for example, using 625 lines per frame. Thereby, at least one pattern 87 or 88 and at least one slider 85 or 86 appear on the screen. Thus, the operator operates the keys 119 ₁ to 119 ₄ to move the sliders 85 and 86 to the pattern area where convergence adjustment is required. The operation of the key 119 ₁ moves the slider downward in the vertical direction, the key 119 ₂ controls the slider movement upward in the vertical direction, and the key 119 ₃ moves the slider in the horizontal direction to the left And the key 119 ₄ controls the movement of the slider upward in the horizontal direction.

By the movement control, when the slider is moved within the desired area, the operator presses the red key 117 or the blue key 118. In this case, a slider of the selected color (red and blue), a pattern of the same color, a green slider 86, and a green pattern 88 appear on the screen. Here, the operation of the key 119 can move the red (blue) slider 85 to the green slider 86. Thus, each time the key 119 is operated, the correction value in the memory 28 is changed for the corresponding area under the control of the microprocessor, and the correction value in the memory 28 is changed for the selected red or blue color. For example, each time an arbitrary key 119 ₁ corresponding to moving the slider downward in the vertical direction is activated, the corresponding value is incremented by an increment in the memory 28, and key 119 ₂ The value of the corresponding equivalent amount in the memory 28 is reduced each time it is activated. In this manner, when the adjustment for one color is performed, the other key 118 or 117 is pressed to perform the same adjustment for the other color.

In this manual adjustment mode, the correction signals for the convergence of the respective areas are independently generated as the correction signals for the other areas of the image. However, in order to assure such independence, a vertical change must be made in the adjacent region as described with reference to Figures 11 (c) and 11 (d).

Such manual adjustment results in good results, but can be tedious, in particular taking a relatively long time, since the image contains multiple areas. This is because such manual adjustment is used as an aid for automatic adjustment. That is, the manual adjustment is used as an aid to automatic adjustment in which corrections are made through a group of image areas in the entire image or in a sequence of adjustments.

In the automatic mode, the microprocessor assigns one adjustment sequence. That is, in this mode, the operator can not freely select the area where the slider pair is located. For example, in the first adjustment step, the pair is automatically positioned at a given position, e.g., the center of the screen. When the red slider is superimposed on the green slider and then the blue slider is superimposed on the green slider, a pressing of the key ADVANCE (120) below the key AUTO (116) And automatically moves to the second position. It is preferable that the number of adjustment sequences is smaller than the number of image areas. For example, the number of positions of the slider obtained by adjustment is 13.

In the first step, the correction is made to the entire region. The correction from the second step is performed for the whole area which is one-half of the image, and therefore, for the one-quarter area of the image in the next step.

FIG. 15 shows a position where the pair of sliders appears continuously with respect to the image 125 when the automatic mode is used.

In FIG. 15, point 1 is the center of the image and movement of the red or blue slider towards the green slider causes a general shift of the red or blue image. That is, this first adjustment step affects the entire position of the red or blue image.

Point 2 is in the upper half center of the image. The adjustment made at this point causes adjustment of the amplitude and tilt of the upper 1/2 image. That is, the size and inclination of the half blue and red half images of the green half image are adjusted.

Point 3 is the center of the bottom 1/2 image. The adjustment in this case is the same as point 2, but for the adjustment for the lower half image.

Point 4 is the center of the 1/2 image on the right. This adjustment is to adjust the amplitude and tilt of the right half image.

Point 5 is the center of the left 1/2 image, and the amplitude and the slope of the left 1/2 image are adjusted.

Point 6 and point 7 are respectively in the middle of the upper and lower short sides of the image. Adjustment at these points corrects the vertical linearity and the vertical curvature of the red and blue images for the upper and lower half images, respectively.

Point 8 is the middle of the right vertical side, and point 9 is the middle of the left vertical side. Adjustment at these points is correction of the horizontal line shape and the horizontal grain of the red and blue images for the right and left half images, respectively.

Finally, the points 10, 11, 12, and 13 are located at the four corners of the image. Horizontal and vertical trapezoidal shape corrections for the corresponding 1/4 picture are made for the sliders at these positions.

For each adjustment step in the automatic mode, the correction table stored in the memory of the microprocessor 27 corresponds. This correction table is different for each step. Each time the key 119 ₁ is operated, the movement of one step of the red or blue slider by the operation of the key 119 is performed in the memory (not shown) so as to obtain a desired effect, 28) by one incremental value. That is, in the first adjustment step, the driving of the key 119 changes the correction signal for all areas of the image, but the correction signal for only one area of the image in the manual mode.

For each correction table, the increment, which is added to or subtracted from the value corresponding to the memory 28, is 8-bit coded, which includes a signal bit, three integer part bits, and four fractional bits after the decimal point.

In a signal in a different memory that has been teardown with a limited number of bits, the result of each increment or each subtraction at each location in the memory 28 is generally a value close to a value that is either increased or decreased. As a result, it is not difficult to add and subtract one increment to the approximate value. However, without any preparation, accumulation of such approximations when several increments are added or subtracted in succession can cause errors that affect the quality of the adjustment. To avoid such an error, addition and subtraction of increments are performed in the following manner each time the adjustment is made.

The number of operations N of each key 119 ₁ is stored in a count (not shown) or in a memory or memory 28 in the microprocessor. The counting is performed for each direction (horizontal and vertical directions) so that 1 is added to the number of times N for one direction of operation and 1 is decreased for operation in the other direction. For example, with respect to the vertical direction, the number of times N increases each time the key 119 ₁ is pressed, while the number of times N decreases as the key 119 ₂ is pressed.

The value supplied to the memory 28 for the corresponding direction when the number of times N is increased by 1 is calculated as follows. The increment is subtracted N times from the value in the memory 28, resulting in an increment / decrement of N + 1 (or N-1) times in the opposite direction. Thus, in order to prevent accumulation of inaccuracy, the inaccuracy or error is limited to its minimum value.

For a better understanding of the features of the present invention, reference will be made below using numerical examples in decimal (decimal) form. The simplest case in which the increment corresponds to the transition (transition) step will be described.

The increment value is 2.45, but the memory 28 only stores the integer value. Thus, the value " 2 " is stored in the memory 1 in one step. Thus, as a result of the four steps, if their steps are accumulated in succession, the value ' 8 ' is stored in memory. However, the logical value corresponds to 4 x 2.45, i.e., 9.90, and actually corresponds to 10. So, two units of error are in memory. This is not actually allowed. On the other hand, according to the adjustment described above, 2 is recorded in the memory as a result of the first step, and 2-2.45 = 0.45 in the second step is stored. Therefore, 2 × 2.45 = 4.90 which is 5 is added to the value. In the third step, 5-2 x 2.45 = 0.1 which is 0 is stored, and 3 x 2.45 = 7.35 is added, that is, 7 is obtained. In the fourth step, 7-3 × 2.45 = -0.35 which is 0 is stored, 4 × 2.45 = 9.90 is added, and 10 is obtained. They are close to the actual value of 9.90. In other words, for each step, the rounding error is corrected for the preceding step.

These calculations are performed under the control of the microprocessor 27. The process of eliminating the rounding error can be applied in manual mode adjustment.

To summarize the automatic mode adjustment, the microprocessor 27 performs the following operations in each adjustment step. That is, the address of the slider pair is transmitted. And the operation keys 119 are signaled. That is, it increments by one increment in the horizontal or vertical direction. Refer to the adjustment table corresponding to the number of points in the step, that is, the 15th step. For each region, change in the memory 28 according to the value of the increment. And finally, by the operation of the key ADVANCE 120, automatically moves to the next adjustment point. However, in the automatic adjustment mode, the patterns 87 and 88 are not projected on the screen.

There may be a case where the projection tube is misplaced with respect to the screen or the number of adjustment steps is increased due to the number of operation errors and the capacity of the memory 75 of the interpolator 29 shown in FIG. 10 is exceeded. In this case, the contents of the memory are returned to the zero value, and the slider where the adjustment made previously has failed returns to the final position. The operator can interpret this as a defect in the convergence adjustment circuit. To overcome this disadvantage, the microprocessor 27 calculates the value to be introduced into the memory 75 for each increment, and calculates the increment to avoid when the contents of the memory 75 are exceeded Programmed. That is, in this case, the slider is maintained without movement, which indicates to the operator that the operator can not continue the adjustment and must perform an adjustment in the reverse direction or check the position of the projection tube relative to the screen.

The reset RESET of the switch 114 in FIG. 14 resets the contents of each area of the memory 28 or sets them to the given value. This is particularly effective when the irregular display is adjusted to be given to the image, that is, when all the adjusting operations are restarted from the starting point when the arbitrary area is adjusted to the manual mode.

If, in the automatic mode, the calculation is performed at each step for all the areas to be changed, the adjustment time can be considerably longer due to the multiple operations of the interpolator 29. The adjustment time also includes a calculation time executed by the microprocessor that checks whether or not the capacity of the memory 75 is exceeded. This is because, in its automatic mode, the microprocessor 27 is programmed to make the following adjustments:

While the key 119 is depressed, the adjustment according to the change of the value of the memory 28 is performed for the area corresponding to the slider and for the area immediately adjacent to both the vertical and horizontal directions. As a result, On the screen, and the number of adjustment steps performed is stored. The correction made according to the number of recorded steps when the operator is not pressed for the given time, i.e., 1/2 second, is extended to all the areas involved by the adjustment step. For example, if adjustment is made at point 1 shown in FIG. 15, it extends to the entire area.

Of course, when the key 119 is operated again, the operation is started again. That is, the correction is made only in the area corresponding to the slider, and the correction is made to the entire area related to the given time.

According to the adjustment, the check of whether the capacity of the memory 75 of the interpolator 29 is exceeded is executed only after the operation of the key 119 ₁ is stopped for 1/2 second. Therefore, if it is determined that the capacity of the memory 75 is exceeded by calculation of the microprocessor, only a corresponding increase number of allowable maximum values is introduced into the memory.

The adjustment circuit can inform the operator that the data is not stored in the memory 28. [ In addition, values corresponding to the horizontal adjustment, for example, a value for the average slope of the plane by the three axes of the three projection tubes with respect to the vertical plane of the screen, The values for the average inclination angles of the red and blue colors for the projection tube may be stored in advance in the memory 28 before shipment from the factory. In this case, when switch 114 is placed in position RAZ (FIG. 14), it does not delete memory 28, but has the advantage of returning to pre-adjustment values.

The convergence and geometric adjustment circuit of the present invention can be used not only for adjustment by the operator but also for quality control during manufacture.

Typically, DC supply currents for different electronic components are generated from the VHT power supply. Thus, it is used for the D-A converters 22 and 23 with respect to a single reference voltage. It is very important that the reference voltage remains constant or maintain a constant value, in order to always obtain the same effect depending on the electron beam.

Now as the power supplied by the VHT increases, the voltage to accelerate the electron beam decreases and the efficiency of the convergence deflector becomes larger, thereby changing the adjustment. To overcome this disadvantage, an adjustment circuit is provided that reduces the reference voltage of the D-A converter when the VHT power is increased.

A switch for avoiding an error in handling the remote control device after the adjustment is executed is a switch for prohibiting the operation of the key 113 when the switch is in a predetermined position.

Claims (29)

The first, second, and third images, which project the projected image on the screen 9 to form a composite image and project the first, second and third images of the predetermined color, which are divided into the convergence regions, A convergence adjustment apparatus for a color video projector having three monochromatic video projection tubes (11, 12, 13), characterized by comprising: a convergence adjustment section for projecting a first image projected on a screen (9) The second and third projection tubes 12 and 13 are scanned to converge the second and third images, and in accordance with the adjustment command by the operator observing the composite convergence image, in the convergence adjustment device having an adjustment mode and the normal mode that can change the value applied to the line (fh) and a frame (fv) input for receiving a signal of the scanning frequency (19 _1, 19 _2), and adjustment of the operator Another input 27 ₁ accompanied by a command signal, undefined means 20 _And a convergence adjustment circuit (19) having an output (19 ₃ -19 ₆ ) for outputting a correction signal to be applied to a corresponding convergence area ( _R , 21 _R ; 20 _B , 21 _B ) Which is used to converge the second and third projected images for the first projected image on the second projection tube 12 and the third projection tube 13, respectively, A RAM 28 for storing the image data; Means (26) for retrieving the scan correction value from the RAM (28) in synchronization with the scanning of the second and third projection tubes (12 and 13); During the normal operation mode of the color video projector that said correction means _{(20 R, 21 R; 20} B, 21 B) in the means for applying the correction value (30, 22); And a microprocessor (27) for changing stored scan correction values for successive single regions such that correction is made for single signal regions in response to an adjustment command received at an input (27 ₁ ) of the convergence adjustment circuit Convergence adjustment device. The projector according to claim 1, characterized in that a first cursor (86) is projected onto a screen by the first projection tube (11) during the adjustment mode, and an arbitrary projection A cursor generator 92 for causing a tube to project a second cursor 85 similar in shape to the first cursor to the screen 9 and a second cursor 85 for the first cursor 86 under the control of the operator, The microprocessor 27 further comprises a second calculation means 110 and 114 for shifting the second cursor 85 so that the first cursor 85 and the second cursor 85 are coincident with each other, movement correction values stored in the RAM (28). 3. The apparatus according to claim 2, characterized in that the convergence adjustment circuit (19) comprises a first video projection tube and a video projection tube selected by the operator during the adjustment mode, together with first and second cursors (86, 85) (93) for simultaneously projecting first and second substantially identical patterns (87, 88) forming a vertical line corresponding to the division of the projected image onto the screen (9) The first and second patterns having a color corresponding to a color of the first and second cursors 85 and 86 and a convergence having a reduced luminance compared to the brightness of the first and second cursors, Adjusting device. 3. The microprocessor according to claim 2, characterized in that the microprocessor (27) is adapted to perform the steps of adjusting from a first single convergence region to a final region commanded by the microprocessor (27) The position of the first and second cursors 86 and 85 is determined near the center of the screen 9 during the first step and the microprocessor 27 determines the position of the first and second cursors 86 and 85, Is stored in the RAM (28) with respect to the projection tube selected by the operator for all regions of the convergence region during the first adjustment step to perform translation of the cursor (85) and the second pattern (88) And the movement of the cursor and pattern is determined by an operator-controlled movement of the second cursor (85) in superposition with the first cursor (86). The microprocessor according to claim 2, wherein the microprocessor (27) directly changes the scan correction value only for the area immediately adjacent to the single area in which the cursor (85, 86) And changes the scan correction values for the other areas when the correction value of the other areas is changed at this step only after the movement is stopped. 6. The apparatus of claim 5, wherein the microprocessor (27) further comprises a convergence adjuster (52) that changes the scan correction value for the other areas only after the operator- . 3. The apparatus of claim 2, wherein the second calculation means (110,114) comprises moving means for moving the second cursor (85) to steps of a predetermined length, And has a corresponding predetermined change value used by the microprocessor (27) during the change. 8. The apparatus according to claim 7, wherein said microprocessor (27) comprises changing means (102, 28, 75) for subtracting a determined amount from said previously determined scan correction value by n times said selected change value, n is an integer corresponding to the number of the plurality of adjustment steps of the predetermined length and generates a difference from the subtraction and thereafter the changing means changes the selection direction according to the moving direction of the second cursor And adds n + 1 or n-1 times of the difference value to the difference value. 2. The microprocessor according to claim 1, characterized in that the convergence adjustment circuit (19) comprises an adjustment operation comprising a sequence of adjustment steps imposed by the microprocessor (27), or an adjustment comprising adjustment steps for successive single convergence areas Further comprising control means (69) for selecting an operation. 10. The system of claim 9, wherein the RAM (28) includes first and second areas, wherein the first area stores predetermined scanning correction values, and the second area is scanned And stores the correction value so that the selected scan correction value can be retrieved at any time, if any. 2. The apparatus according to claim 1, wherein the convergence adjustment circuit (19) further comprises a linear interpolator (29) for smoothing the scan correction value between areas adjacent to each other in the vertical direction, Wherein the scan correction value for the following region is the initial value Ve and the correction value for the other regions is the change rate of the scan correction signal. 12. The apparatus of claim 11, wherein the convergence adjustment circuit (19) is adapted to adjust the convergence adjustment circuit (19) based on the ratio of the number of lines of the previous and currently selected video standards in response to the video standard selection (69) for changing the scanning correction signal in accordance with the scanning correction signal and changing the scanning correction signal in reverse of the ratio. 13. The system of claim 12, wherein the convergence adjustment circuit (19) comprises a digital-to-analog converter (22, 23) coupled to receive a scan correction signal from a RAM (28) -6 is coupled to the amplifiers 16 and 17 and the control means 69 changes the gains of the amplifiers 16 and 17 by the inverse ratio to change the correction signal. 13. The apparatus according to claim 12, wherein the convergence adjustment circuit (19) further comprises a digital-to-analog converter (22, 23) coupled to receive a scan correction value from a RAM (28) Analog converters by changing the reference voltage of the converters by the inverse ratio. The video game system according to claim 1, wherein the second and third monochromatic video projection tubes (12, 13) include a sub scanning coil (14, 15), and the sub scanning coils (14, 15) (19-3, 19-6) of the convergence adjustment device. 16. The apparatus according to claim 15, further comprising: a geometric correction circuit (18) for generating geometric correction signals, said first monochromatic video projection tube (11) having a secondary scanning coil (14v, 15v) 18-2 of the first, second and third projection tubes 11, 12, 13 are coupled to the auxiliary scanning coils 14-15 of all the first, second and third projection tubes 11, 12, 13. 17. The apparatus of claim 16, wherein the geometric correction circuit (18) comprises means (51) for generating a geometric correction signal with vertical amplitude, vertical linear and horizontal trapezoidal correction signals in response to operator adjustment commands Device. _18. The convergence adjustment apparatus according to claim 17, wherein said means (51) is responsive to a single common signal ( _Vcont ) used to generate vertical amplitude, vertical linear and horizontal trapezoidal correction signals in response to operator adjustment commands. The method of claim 18, wherein said geometric correction circuit 18 the first and the second including integrating means, said first integrating means (31, 32, 51) is initially set by the single common signal (V _cont) And the second integration means (33, 43, 54) generates the vertical amplitude and horizontal trapezoid correction signals by integrating the frame frequency signal of the color video projector starting from the value And is driven by the output of the first integrating means (31, 32, 51). 2. The apparatus of claim 1, wherein the convergence adjustment circuit (19) further comprises means (26) for dividing the projected images into 16 equal length regions in the horizontal direction and 14 equal length regions in the vertical direction Device. 2. An apparatus according to claim 1, further comprising an operator control remote control means (110) coupled to the convergence correction circuit (19) via an infrared communication link to generate the operator adjustment command in response to an operator operation of the adjustment mode key Wherein the remote control means (110) controlled by the operator further comprises a normal operation mode key (111). 22. The system of claim 21, further comprising a geometric correction circuit (18) for generating geometric correction signals, the geometric correction signal being coupled to the monochromatic video projection tube, and the operator- And a key (130) for controlling the geometric correction means (18). 12. The apparatus of claim 11, wherein said linear interpolator comprises an integrator formed primarily of a memory device (75) and an adder (76), said convergence adjustment circuit being connected to said second (12) Further comprising demultiplexing means (30) for activating the memory device (75) and the adder (76) to be used to smooth the scan correction value to the video projection tube. 24. The apparatus of claim 23, wherein the convergence adjustment apparatus uses a memory device (75) to change the scan correction value, and the convergence adjustment apparatus adjusts the scan correction value so that the capacity of the memory device (75) And stops changing the scan correction value when the capacity of the memory device is exceeded. 2. A video projection system according to claim 1, further comprising amplifiers (16,17) and scan coils (14,15) for said second and third video projection tubes (12,13) And the outputs of the amplifiers 16 and 17 are connected to the scan coils 14 and 15 and the amplifiers 16 and 17 and the scan coils 14 and 15 are connected to the amplifiers 16 and 17, The scanning currents supplied to the scanning coils 14 and 15 are smoothed when the second and third video projection tubes 12 and 13 are scanned in the horizontal direction, And a response indicating a result. The apparatus of claim 1, wherein the means for retrieving the scan correction value comprises an address generator (26) for dividing the projected image into the plurality of convergence regions in synchronization with the scanning of the second and third video projection tubes ) And the address generator (26) comprises a 1 MHz pulse generator (64) having an output connected to frequency dividing means (65, 68) having parallel outputs, wherein the parallel outputs of the frequency dividing means output convergence adjustment device comprising two group output with (65 _9, ..., 66 ₅₎ and output (68 _6, ..., 68 ₉₎ of the second group indicating the vertical address area of the first group shown. 27. The method of claim 26, wherein the RAM (28) stores four scan correction values for each area, and the four scan correction values are for one And the parallel outputs of said frequency dividing means (65, 68) comprise a third group of outputs comprising two outputs having the two highest frequencies of said parallel outputs (65 ₀ , ..., 65 ₁ ). Wherein the apparatus further comprises selection means for selecting one of four scan correction values read out or read out from the RAM (28) in response to an output of the third group. 28. The method of claim 27, wherein said frequency dividing means (65, 68) has an output (65 _9, ... 66 ₅₎ of a first group of said output and the third output (65 _0, ..., 65 ₁₎ generating a group of the group A second frequency divider 68 driven by an output of a first frequency divider generating the second group of outputs 68 ₆ , ..., 68 ₉ , And programming means (69) for programming said second frequency divider to control the number of horizontal image scan lines of each region in proportion to the number of horizontal scan lines. 2. The microprocessor of claim 1, wherein the convergence adjustment circuit (19) comprises a microprocessor (27) that commands in an automatic adjustment mode in which a single convergence region is first adjusted and then another region is adjusted until termination of the adjustment, Each of the series of corrections is an adjustment step and the first one of the series of corrections to the last area commanded by the microprocessor 27 is changed to a first single Wherein the number of adjustment steps in the sequence is less than the total number of areas and the number of corrected correction values in the single areas is greater than the number of consecutive steps in the sequence And the convergence adjustment device which becomes smaller and smaller.

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