KR0167902B1 - Circuit for automatic focus and tracking offset in the cdp - Google Patents

Abstract

The focus and tracking offset adjustment circuit is for shortening the lead-in time of the system by setting an offset adjustment range for focus and tracking in a compact disc player and automatically adjusting the offset only within the adjustment range. For this purpose, this circuit logically combines the offset adjustment signal output from the terminal amplifier, the microcomputer, the offset adjustment range detector, the counter, the latch control unit, and the offset adjustment range detector with the monitor output signal for the minimum and maximum values of the counter and offsets it into the microcomputer. A first logic element which transmits whether to perform an adjustment operation; And a digital / analog converter for converting the signal output from the counter into an analog signal and outputting the offset adjustment signal of the termination amplifier.

Description

Focus and Tracking Offset Automatic Adjustment Circuit in Compact Disc Players

1 is a detailed view of a focus and tracking offset automatic adjustment circuit according to the present invention in a compact disc player.

2 is a detailed circuit diagram of the latch pulse generator shown in FIG.

* Explanation of symbols for main parts of the drawings

100: terminal amplifier 110: offset adjustment range detection unit

120: counter 130: latch control unit

140: D / A converter 131: latch pulse generator

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a focus and tracking offset automatic adjustment circuit in a compact disc player, and more particularly to a focus and tracking offset automatic adjustment circuit that can improve the read in time performance of a system.

The servo system of the compact disc player includes a focus servo unit for controlling the focus focus position between the disc and the pick-up, and a tracking servo unit for following the track of the disc to read data. Since the two servos control the actuator between the disc and the objective lens based on the fine signal output from the optical pickup, the accuracy is required.

However, these focus servo units and tracking servo units have their respective offsets, and these offsets are added through a loop on a set, so that an offset exceeding the actual specification is generated at the servo end, thereby degrading the accuracy of the servo unit.

In order to solve this problem, the conventional compact disc player has been manually adjusted from the outside using a variable resistor for focus offset adjustment, such as Febias Pin, and the offset of the tracking servo is also adjusted during the tracking balance adjustment. However, there is a problem not only that the offset adjustment is cumbersome but also accurate adjustment due to such manual adjustment or tracking balance adjustment.

As a result, a function of automatically adjusting the offset of the focus and tracking before the laser diode is turned on has been proposed, but the terminal amplifier is adjusted by adjusting the offset based on the zero point (1 / 2Vcc) of the output of the focus amplifier and the tracking loop termination amplifier. The offset adjustment is performed on all signals output from the CSI, and the read-in time of the compact disc is delayed by the offset adjustment to an area where the offset adjustment is not required.

Accordingly, an object of the present invention is to provide a focus and tracking offset automatic adjustment circuit for shortening the lead-in time of a system by determining an offset adjustment range for focus and tracking in a compact disc player and automatically adjusting the offset only within the adjustment range. It is.

The offset automatic adjustment circuit according to the present invention is a focus and tracking offset adjustment circuit of a compact disc player having a microcomputer for controlling the end amplifier and the overall function of the focus and tracking loop, wherein the signal output from the end amplifier and the predetermined An offset adjustment range detection unit for detecting an offset adjustment range using a reference value of: a counter for up or down counting by a signal output from the offset adjustment range detection unit and reset by an offset control signal provided from a microcomputer; A latch control unit for controlling a latch state of a counter by an offset control signal provided by a microcomputer, a monitor output signal for the minimum and maximum values of the counter, and a latch control signal of the counter; A first logic element which logically combines the offset adjustment signal output from the offset adjustment range detection unit with the monitor output signal for the minimum and maximum values of the counter and transmits whether to perform an offset adjustment operation to the microcomputer; And a digital / analog converter for converting the signal output from the counter into an analog signal and outputting the offset adjustment signal of the termination amplifier.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a detailed view of a focus and tracking offset automatic adjustment circuit according to the present invention in a compact disc player. The terminal amplifier 100 and the termination amplifier 100 of the focus and tracking loop whose tracking or focus error signals are input signals. The offset adjustment range detection unit 110 for detecting the offset adjustment range using the signal output from the predetermined value and the predetermined reference value, reset by the offset control signal provided from a microcomputer not shown and output from the offset adjustment range detection unit 110 Counter 120 for up or down counting by a signal, an offset control signal provided by a microcomputer, a monitor output signal for the minimum and maximum values of the counter 120, and a counter control signal by a latch control signal of the counter 120. Offset control unit outputting from the latch control unit 130, the offset adjustment range detection unit 110 for controlling the latch state of Logic combination of the signal and the monitor output signal for the minimum and maximum values of the counter 120, the logic element (OR4) for transmitting the offset adjustment operation to the microcomputer (not shown), the signal output from the counter 120 A digital / analog converter 140 converts an analog signal and outputs the offset adjustment signal of the terminal amplifier 100.

In FIG. 1 configured as described above, the terminal amplifier 100 finally amplifies a signal output through an RF unit and a servo unit not shown in the compact disc player, thereby driving a compact disc player driving circuit (not shown) and an offset adjustment range to be described later. Transmission to the detection unit 110.

The offset adjustment range detection unit 110 sets the first offset (COM1) and (+) connected to set the + 50mV as the reference offset voltage at the (-) input terminal and to apply the output signal of the termination amplifier 100 to the (+) input terminal. Output from the second comparator COM2, the first comparator COM1 and the second comparator COM2 connected to the input terminal with -50mV set as the reference voltage and connected so that the output signal of the termination amplifier 100 is applied to the negative input terminal. Comprising a logic element (OR1) for the logical sum of the signals to determine whether or not the signal output from the terminal amplifier 100 is required to adjust the offset, and if the offset adjustment is required to output the required offset adjustment amount. Here, ± 50mV is set as an optimal value for focus and tracking offset adjustment, and may be set to another value when the optimal condition is changed.

When the offset output from the terminal amplifier 100 is generated within ± 50 mV as described above, the offset adjustment range detection unit 110 determines that the offset adjustment is not to be performed, and thus the first comparator COM1 and the second comparator COM2 are determined. ) Prints 'L' respectively. The outputs of the first comparator COM1 and the second comparator COM2 are output to the up or down input terminals of the logic element OR1 and the counter 120 described above. The logic element OR1 outputs the L state because all signals applied to the two input terminals are in the L state. The signal output from the logic device OR1 is an offset adjustment signal, and is transmitted as a signal for controlling the stop mode of the counter 120.

The counter 120 maintains the stop state because the transmitted control signal is in the L state, and latches the current count value by the control signal provided from the latch control unit 130 to be described later. At this time, the latched count value is '1000', which is the center value when the counter used is a 4-bit counter. This value is set when the counter 120 is reset by an offset control signal provided from a microcomputer not shown when power is applied.

The latch control unit 130 includes an offset adjustment range detection unit through a logic element OR2 and an inverter IN1 for logically combining an offset control signal provided by a microcomputer (not shown) and a signal output from the latch pulse generator 131 which will be described later. Logic element OR3 and logic element for logically combining the inverted offset adjustment signal output from 110 with the signal output from the above-described logic element OR2 and transmitting the result to the latch control signal input terminal of the counter 120. OR3) and a logic element AND1 for logically multiplying the monitor output (hereinafter referred to as G) with respect to the minimum and maximum values of the counter 120, the signal output from the logic element AND1, and the above-mentioned US. The latch pulse generator 131 is configured to be reset by the offset control signal output from the illustrated microcomputer to generate the latch pulse and transmit the latch pulse to the logic element OR2. The latch state of the counter 120 is controlled. That is, the latch controller 130 may output the G value output from the counter 120 in the 'H' state because the offset value is not necessary and the count value output from the counter 120 becomes the maximum value and the minimum value. When the count value of the counter 120 is controlled to be latched.

However, at this time, when the offset adjustment is not necessary and the signal output from the logic element OR1 of the offset adjustment range detection unit 110 is output as 'L', it is converted into the 'H' state through the inverter IN1 and latched. Since the logic element OR3 is transmitted to one input terminal of the logic element OR3 in the controller 130, the logic element OR3 provides 'H' to the latch state control signal input terminal of the counter 120 regardless of a signal applied through the other input terminal. Causes 120 to latch the current value.

As shown in FIG. 2, the latch pulse generator 131 is controlled by an inverter IN2 for inverting a signal output from the logic device AND1 and an offset control signal provided from a microcomputer (not shown). Two inverters (B1, B2) for latching the signal output from (IN2), and an inverter (IN4) for inverting the logic state of the signal latched and output through the three-phase buffers (B1, B2). To latch the state of the signal output from the logic element AND1.

In addition, the logic device OR4 transmits the 'H' state through the interleaver IN1 regardless of the logic state of the signal output through the G output terminal of the counter 120, so that the sense of the 'H' state to the micom is not shown. The SENSE signal is output to indicate that the offset adjustment has been completed so that the microcomputer (not shown) performs the next operation.

The D / A converter 140 is a '1000' in which the signal output when the counter 120 is stopped is latched as described above, and the 1000 has the same voltage as the reference voltage VC of the termination amplifier 100. The termination amplifier 100 does not perform offset adjustment.

On the other hand, when the offset output from the termination amplifier 100 is -50mV or less, the first comparator COM1 in the offset adjustment range detector 110 outputs the 'L' state while the second comparator COM2 is the 'H'. Since the logic device OR1 outputs the high state, the counter 120 releases the stop state, and at the same time the 'H' signal is applied to the up count input terminal, the counter 120 receives the 88.1K clock signal ( WDCK) and up count.

The counter 120 transmits the counted result value to the D / A converter 140, converts it into an analog signal, and transmits it to the termination amplifier 100 to induce the offset output from the termination amplifier 100 to increase.

When the offset output from the termination amplifier 100 is +50 mV or more, the first comparator COM1 in the offset adjustment range detector 110 outputs the 'H' state and the second comparator COM2 outputs the 'L' state. Since the logic device OR1 outputs 'H', the counter 120 counts in synchronization with the clock signal WDCK applied when the stop state is released as in the case of -50 mV or less. However, at this time, since the counter 120 is applied with 'H' as the down count input terminal, the counter 120 outputs the down count at the center value 1000 set at the above-mentioned reset.

The output value is transmitted to the terminal amplifier 100 through the D / A converter 140 is induced to drop the offset voltage.

When the count value reaches the minimum value of 0000 and the maximum value of 1111 by the up and down counting operations, 'H' is output through the G output terminal of the counter 120 to the microcomputer not shown through the logic device OR4. Notify that the offset adjustment is finished, and let Micom do another task. As a result, the offset control signal applied from the microcomputer is in a high state to latch the counter 120 through the logic element OR2 and the logic element OR3.

As described above, the focus and tracking offset adjustment circuit according to the present invention has the effect of minimizing the lead-in time of the system due to the offset adjustment by selecting the portion requiring the offset adjustment and performing the offset adjustment. .

Claims (8)

A focus and tracking offset adjustment circuit of a compact disc player having a focus amplifier and a tracking amplifier end amplifier for amplifying a signal reproduced on a compact disc and a microcomputer for controlling the operation of the compact disc player, wherein the output signal of the termination amplifier is preset. An offset adjustment range detecting unit for comparing the set reference value to detect an offset adjustment range: reset according to an offset control signal output by the microcomputer and performing an up count or a down count according to an offset adjustment range output by the offset adjustment range detection unit To counter; A latch control unit controlling a latch state of the counter according to an offset control signal output by the microcomputer, a monitor output signal for the minimum and maximum values output by the counter, and a latch control signal of the counter; A first logic element configured to logically combine an offset adjustment range signal output from the offset adjustment range detection unit and a monitor output signal for the minimum and maximum values of the counter to inform the microcomputer whether to perform an offset adjustment operation; And a digital / analog converter for converting the output signal of the counter into an analog signal and outputting the offset signal as the offset adjustment signal of the termination amplifier. The apparatus of claim 1, wherein the offset adjustment range detection unit; A first comparator for controlling a down counter of the counter by comparing a first reference voltage with an output signal level of the termination amplifier; A second comparator for controlling an up count of the counter by comparing a second reference voltage with an output signal level of the termination amplifier; And a second logic element configured to logically combine the output signals of the first comparator and the second comparator to determine whether to adjust the offset. 2. The apparatus of claim 2, wherein the offset adjustment range detection unit; And an inverter for inverting an output signal of the second logic element to provide a signal of an offset adjustment range applied to the first logic element. The apparatus of claim 2, wherein the offset adjustment range detection unit; And the first reference voltage is set at +50 mV, and the second reference voltage is set at -50 mV. 2. The apparatus of claim 1, wherein the counter; Preset count when the count is stopped and reset according to the offset control signal output by the microcomputer when it is determined that the offset adjustment to the output signal of the termination amplifier is not necessary by the adjustment range signal of the offset adjustment range detector. A focus and tracking offset automatic adjustment circuit in a compact disc player, characterized in that for controlling a reference value under the control of the latch control unit. The method of claim 1 or 5, wherein the counter; In the compact disc player, the count value is latched according to the control of the latch control unit when the count value becomes the minimum value or the maximum value by the monitor output signal for the minimum value and the maximum value output by the counter. Tracking offset automatic adjustment circuit. The method of claim 3, wherein the latch control unit; A third logic element for logically multiplying a control signal in a latch state applied to the counter and a monitor output signal for the minimum and maximum values; A latch pulse generator for generating a pulse of latching an output signal of the third logic element; A fourth logic element configured to logically sum an output signal of the latch signal generator and an offset control signal output by the microcomputer; And a fifth logical element configured to logically sum an output signal of the fourth logical element and an output signal of the inverter. The device of claim 1, wherein the first logical element comprises: And a logic element that logically sums the signal of the offset adjustment range and the monitor output signal for the minimum and maximum values.